Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	449	1			T2	7		T20	1		T23	1
all_values[1]	432	1			T2	4		T20	1		T100	1
all_values[2]	472	1			T2	2		T14	1		T20	1
all_values[3]	461	1			T2	3		T14	1		T100	3
all_values[4]	473	1			T2	3		T39	1		T100	2
all_values[5]	413	1			T2	4		T20	2		T39	1
all_values[6]	415	1			T2	5		T20	1		T23	2
all_values[7]	475	1			T2	2		T20	1		T100	1
all_values[8]	421	1			T2	3		T21	1		T23	1
all_values[9]	439	1			T2	3		T20	1		T23	1
all_values[10]	453	1			T2	4		T23	1		T100	1
all_values[11]	449	1			T2	3		T20	2		T100	1
all_values[12]	457	1			T2	6		T14	1		T100	1
all_values[13]	436	1			T2	3		T21	1		T23	1
all_values[14]	459	1			T2	7		T20	2		T52	1
all_values[15]	430	1			T2	5		T20	2		T23	1
all_values[16]	446	1			T2	2		T14	1		T39	1
all_values[17]	423	1			T2	5		T20	1		T23	1
all_values[18]	421	1			T20	1		T23	1		T100	2
all_values[19]	416	1			T2	4		T14	1		T100	3
all_values[20]	459	1			T2	2		T21	1		T23	1
all_values[21]	469	1			T2	6		T23	2		T54	5
all_values[22]	467	1			T2	6		T20	1		T52	1
all_values[23]	426	1			T2	3		T20	1		T39	1
all_values[24]	408	1			T2	5		T20	2		T23	2
all_values[25]	489	1			T2	6		T14	1		T20	1
all_values[26]	424	1			T2	3		T20	2		T39	2