Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 492 1 T1 2 T3 2 T24 7
all_values[1] 463 1 T1 2 T3 1 T24 4
all_values[2] 491 1 T1 1 T13 1 T24 1
all_values[3] 465 1 T1 2 T3 1 T4 1
all_values[4] 443 1 T1 1 T3 1 T24 8
all_values[5] 465 1 T14 1 T24 3 T28 1
all_values[6] 490 1 T3 1 T13 1 T24 5
all_values[7] 451 1 T1 1 T3 1 T13 1
all_values[8] 449 1 T13 1 T14 1 T24 4
all_values[9] 480 1 T1 1 T3 1 T14 1
all_values[10] 436 1 T1 2 T4 1 T24 6
all_values[11] 436 1 T1 1 T3 2 T24 4
all_values[12] 435 1 T1 1 T24 6 T39 3
all_values[13] 423 1 T1 2 T4 1 T13 1
all_values[14] 440 1 T3 1 T4 1 T18 1
all_values[15] 461 1 T1 1 T18 1 T24 6
all_values[16] 471 1 T1 2 T3 1 T24 5
all_values[17] 452 1 T3 1 T13 2 T24 3
all_values[18] 453 1 T1 1 T14 2 T24 6
all_values[19] 447 1 T3 2 T24 6 T28 2
all_values[20] 493 1 T1 3 T13 1 T14 1
all_values[21] 447 1 T1 1 T3 1 T13 1
all_values[22] 449 1 T1 1 T14 2 T24 3
all_values[23] 451 1 T24 7 T39 3 T40 3
all_values[24] 410 1 T1 1 T3 1 T4 1
all_values[25] 432 1 T1 1 T14 1 T24 6
all_values[26] 459 1 T14 2 T24 4 T39 2

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