Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	410	1			T2	2		T4	4		T43	1
all_values[1]	472	1			T2	3		T4	1		T43	1
all_values[2]	412	1			T2	4		T4	3		T22	2
all_values[3]	406	1			T2	5		T4	3		T22	1
all_values[4]	409	1			T2	4		T4	3		T51	1
all_values[5]	423	1			T2	1		T4	4		T22	2
all_values[6]	406	1			T2	4		T4	6		T22	1
all_values[7]	457	1			T2	6		T4	1		T22	2
all_values[8]	432	1			T2	3		T4	3		T22	2
all_values[9]	397	1			T2	5		T4	1		T22	1
all_values[10]	429	1			T2	5		T4	2		T52	3
all_values[11]	426	1			T4	1		T22	1		T51	1
all_values[12]	384	1			T2	1		T4	5		T22	5
all_values[13]	394	1			T2	3		T4	1		T22	1
all_values[14]	403	1			T2	2		T4	2		T22	3
all_values[15]	414	1			T2	3		T4	2		T22	1
all_values[16]	409	1			T2	6		T4	4		T22	1
all_values[17]	421	1			T2	4		T4	2		T22	3
all_values[18]	414	1			T2	5		T4	3		T22	1
all_values[19]	445	1			T2	2		T4	5		T22	2
all_values[20]	414	1			T2	1		T4	3		T22	3
all_values[21]	399	1			T2	2		T4	3		T22	2
all_values[22]	443	1			T2	4		T4	2		T22	1
all_values[23]	418	1			T2	2		T4	3		T52	2
all_values[24]	401	1			T2	6		T4	4		T52	3
all_values[25]	461	1			T2	6		T4	5		T22	4
all_values[26]	471	1			T2	6		T4	1		T22	3