Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	403	1			T23	3		T26	7		T41	1
all_values[1]	399	1			T23	4		T26	3		T37	3
all_values[2]	371	1			T23	4		T26	8		T41	1
all_values[3]	450	1			T15	1		T23	8		T26	3
all_values[4]	399	1			T23	9		T26	4		T37	6
all_values[5]	403	1			T23	4		T26	5		T41	1
all_values[6]	425	1			T15	1		T23	4		T26	3
all_values[7]	392	1			T23	3		T26	4		T41	1
all_values[8]	376	1			T23	2		T26	7		T41	1
all_values[9]	436	1			T23	7		T26	9		T37	6
all_values[10]	423	1			T23	3		T26	3		T37	4
all_values[11]	422	1			T23	9		T26	5		T37	2
all_values[12]	409	1			T23	3		T26	4		T37	1
all_values[13]	433	1			T23	7		T26	4		T37	7
all_values[14]	403	1			T23	2		T26	5		T37	2
all_values[15]	397	1			T15	1		T23	8		T26	1
all_values[16]	400	1			T15	1		T23	7		T26	4
all_values[17]	374	1			T23	7		T26	2		T41	3
all_values[18]	443	1			T23	8		T26	5		T41	1
all_values[19]	373	1			T23	6		T26	3		T41	1
all_values[20]	399	1			T23	6		T26	3		T37	2
all_values[21]	378	1			T23	3		T26	8		T37	1
all_values[22]	399	1			T15	1		T23	7		T26	5
all_values[23]	431	1			T23	4		T26	5		T41	3
all_values[24]	424	1			T23	5		T26	2		T41	2
all_values[25]	410	1			T23	5		T26	4		T41	2
all_values[26]	387	1			T23	10		T26	6		T37	3