Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 438 1 T2 1 T4 4 T19 1
all_values[1] 417 1 T4 4 T14 2 T45 6
all_values[2] 430 1 T2 3 T4 3 T19 1
all_values[3] 411 1 T2 1 T4 3 T14 4
all_values[4] 412 1 T4 3 T14 7 T25 2
all_values[5] 427 1 T4 3 T19 1 T14 3
all_values[6] 401 1 T2 1 T19 3 T14 5
all_values[7] 441 1 T2 4 T4 1 T19 1
all_values[8] 391 1 T4 1 T12 1 T25 2
all_values[9] 399 1 T4 2 T12 1 T19 1
all_values[10] 447 1 T2 1 T4 1 T19 1
all_values[11] 437 1 T2 1 T4 1 T14 1
all_values[12] 414 1 T2 2 T4 1 T19 2
all_values[13] 390 1 T2 1 T4 1 T19 2
all_values[14] 405 1 T2 1 T4 1 T14 1
all_values[15] 432 1 T2 1 T4 2 T12 1
all_values[16] 455 1 T2 4 T4 3 T19 1
all_values[17] 367 1 T4 2 T12 1 T19 1
all_values[18] 376 1 T2 1 T4 3 T14 4
all_values[19] 380 1 T2 3 T4 3 T12 2
all_values[20] 417 1 T2 2 T4 3 T19 1
all_values[21] 414 1 T2 3 T4 2 T14 1
all_values[22] 408 1 T2 1 T4 1 T19 1
all_values[23] 409 1 T2 3 T4 2 T12 1
all_values[24] 389 1 T2 3 T4 2 T12 1
all_values[25] 418 1 T2 1 T12 1 T14 5
all_values[26] 486 1 T2 1 T4 3 T19 1

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