Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	426	1			T18	12		T6	5		T34	1
all_values[1]	465	1			T18	11		T6	7		T41	5
all_values[2]	457	1			T18	9		T6	4		T41	6
all_values[3]	454	1			T18	4		T6	7		T41	10
all_values[4]	450	1			T18	7		T6	7		T41	4
all_values[5]	445	1			T18	13		T6	6		T35	2
all_values[6]	452	1			T18	4		T6	5		T41	4
all_values[7]	445	1			T18	8		T6	9		T34	1
all_values[8]	414	1			T18	8		T6	3		T41	4
all_values[9]	454	1			T18	8		T6	9		T34	2
all_values[10]	430	1			T18	10		T6	8		T34	1
all_values[11]	421	1			T18	8		T6	3		T41	4
all_values[12]	455	1			T18	9		T6	9		T34	2
all_values[13]	461	1			T18	6		T6	6		T34	2
all_values[14]	403	1			T18	5		T6	5		T34	1
all_values[15]	426	1			T18	12		T6	4		T41	4
all_values[16]	411	1			T18	10		T6	8		T41	4
all_values[17]	415	1			T18	7		T6	3		T34	1
all_values[18]	459	1			T18	13		T6	3		T41	5
all_values[19]	427	1			T18	9		T6	5		T34	1
all_values[20]	431	1			T18	3		T6	6		T34	1
all_values[21]	420	1			T18	11		T6	13		T41	4
all_values[22]	419	1			T18	10		T6	3		T41	6
all_values[23]	438	1			T18	16		T6	4		T34	1
all_values[24]	442	1			T18	5		T6	3		T41	8
all_values[25]	445	1			T18	3		T6	4		T35	1
all_values[26]	459	1			T18	9		T6	1		T41	4