Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 435 1 T13 1 T17 3 T21 2
all_values[1] 432 1 T13 1 T19 2 T21 6
all_values[2] 429 1 T13 3 T19 2 T21 3
all_values[3] 434 1 T13 1 T17 1 T21 3
all_values[4] 442 1 T13 2 T17 2 T19 1
all_values[5] 439 1 T13 1 T17 2 T21 5
all_values[6] 438 1 T17 1 T21 8 T38 1
all_values[7] 420 1 T17 1 T19 1 T21 10
all_values[8] 428 1 T13 3 T17 1 T19 1
all_values[9] 464 1 T13 3 T21 3 T46 1
all_values[10] 424 1 T13 2 T17 1 T19 2
all_values[11] 450 1 T17 2 T21 1 T38 1
all_values[12] 455 1 T13 2 T17 1 T19 1
all_values[13] 418 1 T17 4 T21 2 T46 2
all_values[14] 459 1 T13 1 T17 1 T19 1
all_values[15] 421 1 T13 1 T19 1 T21 8
all_values[16] 450 1 T19 4 T21 7 T203 1
all_values[17] 400 1 T21 1 T203 1 T66 4
all_values[18] 414 1 T13 1 T17 7 T21 2
all_values[19] 415 1 T13 1 T17 3 T19 1
all_values[20] 451 1 T17 3 T21 5 T38 1
all_values[21] 413 1 T17 2 T21 3 T203 5
all_values[22] 442 1 T13 3 T17 1 T21 2
all_values[23] 458 1 T13 1 T17 2 T19 1
all_values[24] 453 1 T13 2 T21 4 T203 2
all_values[25] 433 1 T21 7 T46 2 T203 2
all_values[26] 479 1 T13 2 T21 3 T203 2

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