Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	409	1			T17	5		T33	6		T222	2
all_values[1]	389	1			T17	3		T15	1		T52	1
all_values[2]	402	1			T17	3		T52	2		T33	7
all_values[3]	474	1			T4	1		T17	2		T26	1
all_values[4]	392	1			T14	1		T17	3		T34	1
all_values[5]	464	1			T17	3		T28	1		T34	2
all_values[6]	421	1			T17	3		T28	3		T34	1
all_values[7]	450	1			T17	1		T28	3		T34	1
all_values[8]	446	1			T22	1		T17	5		T28	2
all_values[9]	463	1			T22	1		T17	6		T28	1
all_values[10]	405	1			T22	1		T17	1		T52	2
all_values[11]	465	1			T17	1		T28	1		T33	6
all_values[12]	454	1			T17	5		T26	1		T28	1
all_values[13]	403	1			T17	6		T28	1		T33	10
all_values[14]	425	1			T17	1		T28	1		T33	8
all_values[15]	459	1			T17	4		T33	8		T75	1
all_values[16]	463	1			T33	5		T75	1		T222	3
all_values[17]	410	1			T17	2		T34	1		T33	6
all_values[18]	388	1			T17	3		T33	9		T75	4
all_values[19]	431	1			T4	1		T17	2		T52	1
all_values[20]	391	1			T17	4		T52	1		T33	4
all_values[21]	428	1			T17	6		T28	5		T74	1
all_values[22]	405	1			T17	1		T26	1		T33	7
all_values[23]	438	1			T17	1		T26	1		T28	1
all_values[24]	428	1			T17	3		T52	2		T34	2
all_values[25]	439	1			T17	4		T26	1		T15	1
all_values[26]	436	1			T17	6		T52	1		T33	6