Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables |
27 |
0 |
27 |
100.00 |
Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_dev |
27 |
0 |
27 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_dev
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
27 |
0 |
27 |
100.00 |
User Defined Bins for cp_dev
Excluded/Illegal bins
NAME | COUNT | STATUS |
bin_others |
0 |
Illegal |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
429 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T15 |
3 |
all_values[1] |
458 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T15 |
3 |
all_values[2] |
479 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T15 |
4 |
all_values[3] |
464 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T15 |
2 |
all_values[4] |
468 |
1 |
|
|
T2 |
2 |
|
T4 |
5 |
|
T15 |
4 |
all_values[5] |
473 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T15 |
3 |
all_values[6] |
458 |
1 |
|
|
T2 |
3 |
|
T4 |
5 |
|
T15 |
3 |
all_values[7] |
505 |
1 |
|
|
T2 |
2 |
|
T4 |
4 |
|
T15 |
7 |
all_values[8] |
441 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T15 |
4 |
all_values[9] |
425 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T15 |
2 |
all_values[10] |
412 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T15 |
2 |
all_values[11] |
440 |
1 |
|
|
T4 |
4 |
|
T15 |
3 |
|
T11 |
1 |
all_values[12] |
471 |
1 |
|
|
T4 |
5 |
|
T15 |
4 |
|
T11 |
4 |
all_values[13] |
445 |
1 |
|
|
T2 |
2 |
|
T4 |
3 |
|
T15 |
5 |
all_values[14] |
442 |
1 |
|
|
T2 |
3 |
|
T4 |
3 |
|
T15 |
2 |
all_values[15] |
443 |
1 |
|
|
T2 |
1 |
|
T4 |
7 |
|
T15 |
2 |
all_values[16] |
489 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T15 |
5 |
all_values[17] |
392 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T15 |
2 |
all_values[18] |
458 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T15 |
4 |
all_values[19] |
454 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T15 |
1 |
all_values[20] |
462 |
1 |
|
|
T4 |
2 |
|
T15 |
3 |
|
T11 |
4 |
all_values[21] |
447 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T15 |
3 |
all_values[22] |
448 |
1 |
|
|
T4 |
5 |
|
T15 |
3 |
|
T11 |
1 |
all_values[23] |
437 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T15 |
2 |
all_values[24] |
485 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T15 |
5 |
all_values[25] |
463 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T15 |
6 |
all_values[26] |
445 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T15 |
4 |
0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |