Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	425	1			T21	1		T59	2		T39	1
all_values[1]	460	1			T17	1		T21	2		T57	1
all_values[2]	491	1			T17	1		T22	1		T57	1
all_values[3]	461	1			T17	1		T22	1		T57	1
all_values[4]	454	1			T21	1		T57	1		T39	1
all_values[5]	464	1			T21	1		T59	1		T19	1
all_values[6]	458	1			T21	2		T57	5		T59	3
all_values[7]	503	1			T21	1		T59	3		T60	3
all_values[8]	477	1			T57	1		T59	1		T60	2
all_values[9]	494	1			T22	1		T59	1		T60	1
all_values[10]	415	1			T17	1		T57	2		T19	2
all_values[11]	484	1			T17	1		T22	1		T57	2
all_values[12]	471	1			T60	2		T43	1		T64	3
all_values[13]	449	1			T17	1		T21	1		T60	1
all_values[14]	485	1			T21	1		T57	1		T60	2
all_values[15]	476	1			T17	2		T59	1		T60	3
all_values[16]	447	1			T21	3		T60	3		T64	5
all_values[17]	439	1			T17	1		T57	1		T19	1
all_values[18]	488	1			T57	3		T59	4		T19	1
all_values[19]	477	1			T21	1		T59	2		T39	1
all_values[20]	489	1			T57	2		T19	1		T60	1
all_values[21]	453	1			T21	1		T19	1		T39	1
all_values[22]	461	1			T17	1		T57	3		T60	1
all_values[23]	496	1			T57	1		T39	1		T60	2
all_values[24]	443	1			T21	1		T59	1		T64	8
all_values[25]	439	1			T22	1		T21	1		T57	2
all_values[26]	447	1			T60	1		T42	1		T64	6