Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 441 1 T20 1 T17 1 T53 1
all_values[1] 443 1 T17 3 T19 1 T39 1
all_values[2] 462 1 T20 1 T17 1 T53 1
all_values[3] 455 1 T2 1 T18 1 T17 1
all_values[4] 469 1 T17 1 T53 2 T8 6
all_values[5] 476 1 T2 1 T20 2 T17 2
all_values[6] 456 1 T17 2 T39 2 T53 4
all_values[7] 456 1 T20 1 T17 2 T19 1
all_values[8] 451 1 T18 1 T17 2 T39 1
all_values[9] 434 1 T39 1 T53 1 T27 1
all_values[10] 467 1 T17 1 T19 1 T8 6
all_values[11] 466 1 T20 2 T17 2 T53 3
all_values[12] 461 1 T18 1 T17 1 T19 1
all_values[13] 463 1 T17 2 T53 3 T8 5
all_values[14] 476 1 T17 1 T53 2 T8 7
all_values[15] 461 1 T17 1 T19 2 T53 4
all_values[16] 483 1 T18 1 T53 2 T8 8
all_values[17] 464 1 T20 1 T19 1 T53 1
all_values[18] 533 1 T18 1 T17 1 T19 1
all_values[19] 455 1 T18 1 T19 2 T39 2
all_values[20] 445 1 T2 1 T19 1 T53 4
all_values[21] 441 1 T17 2 T19 1 T53 2
all_values[22] 457 1 T18 1 T53 1 T27 1
all_values[23] 483 1 T2 1 T17 1 T19 1
all_values[24] 488 1 T2 1 T17 1 T19 1
all_values[25] 438 1 T17 1 T19 1 T53 2
all_values[26] 481 1 T20 1 T18 2 T53 2

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