Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 415 1 T17 6 T19 4 T28 4
all_values[1] 462 1 T17 3 T19 5 T25 1
all_values[2] 433 1 T17 3 T19 2 T28 4
all_values[3] 437 1 T17 8 T19 5 T25 1
all_values[4] 408 1 T17 5 T19 2 T25 2
all_values[5] 435 1 T17 5 T19 1 T28 2
all_values[6] 451 1 T17 8 T19 6 T28 1
all_values[7] 445 1 T17 4 T19 8 T25 1
all_values[8] 417 1 T17 4 T19 4 T28 1
all_values[9] 411 1 T17 6 T19 4 T25 1
all_values[10] 422 1 T17 5 T19 1 T25 2
all_values[11] 416 1 T17 4 T19 6 T28 3
all_values[12] 427 1 T17 5 T19 6 T28 2
all_values[13] 440 1 T17 5 T19 3 T25 1
all_values[14] 421 1 T17 6 T19 4 T25 1
all_values[15] 416 1 T17 4 T19 8 T28 1
all_values[16] 443 1 T17 7 T19 1 T28 6
all_values[17] 411 1 T17 4 T19 4 T28 5
all_values[18] 414 1 T17 2 T19 6 T28 2
all_values[19] 396 1 T17 4 T19 3 T48 2
all_values[20] 462 1 T17 7 T19 5 T28 4
all_values[21] 429 1 T17 9 T19 3 T25 1
all_values[22] 425 1 T17 7 T19 3 T28 1
all_values[23] 407 1 T17 3 T19 5 T71 4
all_values[24] 434 1 T17 7 T19 3 T28 1
all_values[25] 448 1 T17 6 T19 3 T25 1
all_values[26] 454 1 T17 3 T19 8 T25 1

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