Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 459 1 T19 3 T25 3 T12 1
all_values[1] 466 1 T19 1 T25 7 T12 4
all_values[2] 440 1 T25 1 T12 5 T45 1
all_values[3] 465 1 T19 1 T24 1 T25 1
all_values[4] 422 1 T17 1 T24 1 T29 1
all_values[5] 449 1 T16 1 T19 2 T25 2
all_values[6] 463 1 T25 4 T29 1 T12 3
all_values[7] 483 1 T16 1 T25 2 T29 1
all_values[8] 451 1 T19 1 T24 1 T25 3
all_values[9] 465 1 T17 1 T16 1 T19 1
all_values[10] 451 1 T25 4 T12 3 T147 2
all_values[11] 442 1 T17 1 T24 2 T25 3
all_values[12] 439 1 T17 2 T25 3 T147 5
all_values[13] 464 1 T25 3 T12 4 T147 6
all_values[14] 458 1 T16 1 T25 2 T12 5
all_values[15] 448 1 T19 1 T24 1 T25 1
all_values[16] 439 1 T19 1 T25 2 T29 1
all_values[17] 438 1 T17 1 T19 2 T24 2
all_values[18] 424 1 T24 3 T25 1 T12 4
all_values[19] 421 1 T25 2 T29 2 T12 3
all_values[20] 438 1 T16 1 T19 1 T24 1
all_values[21] 434 1 T17 1 T24 1 T25 4
all_values[22] 452 1 T17 1 T24 1 T25 3
all_values[23] 437 1 T19 1 T24 1 T25 3
all_values[24] 410 1 T16 1 T24 1 T25 2
all_values[25] 439 1 T19 2 T25 3 T12 2
all_values[26] 459 1 T12 1 T147 2 T40 8

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