Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables |
27 |
0 |
27 |
100.00 |
Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_dev |
27 |
0 |
27 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_dev
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
27 |
0 |
27 |
100.00 |
User Defined Bins for cp_dev
Excluded/Illegal bins
NAME | COUNT | STATUS |
bin_others |
0 |
Illegal |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
490 |
1 |
|
|
T1 |
4 |
|
T4 |
4 |
|
T17 |
5 |
all_values[1] |
457 |
1 |
|
|
T1 |
2 |
|
T2 |
2 |
|
T3 |
1 |
all_values[2] |
499 |
1 |
|
|
T1 |
2 |
|
T2 |
4 |
|
T4 |
2 |
all_values[3] |
459 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T3 |
1 |
all_values[4] |
459 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
all_values[5] |
479 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
2 |
all_values[6] |
480 |
1 |
|
|
T1 |
4 |
|
T2 |
2 |
|
T3 |
1 |
all_values[7] |
501 |
1 |
|
|
T1 |
2 |
|
T2 |
2 |
|
T3 |
2 |
all_values[8] |
478 |
1 |
|
|
T1 |
5 |
|
T2 |
2 |
|
T3 |
2 |
all_values[9] |
512 |
1 |
|
|
T1 |
3 |
|
T2 |
2 |
|
T3 |
3 |
all_values[10] |
494 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
3 |
all_values[11] |
476 |
1 |
|
|
T1 |
4 |
|
T2 |
3 |
|
T3 |
1 |
all_values[12] |
476 |
1 |
|
|
T1 |
6 |
|
T2 |
1 |
|
T3 |
1 |
all_values[13] |
451 |
1 |
|
|
T1 |
3 |
|
T2 |
3 |
|
T4 |
3 |
all_values[14] |
526 |
1 |
|
|
T1 |
2 |
|
T2 |
3 |
|
T3 |
2 |
all_values[15] |
482 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
5 |
all_values[16] |
493 |
1 |
|
|
T1 |
5 |
|
T2 |
1 |
|
T3 |
1 |
all_values[17] |
464 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T3 |
1 |
all_values[18] |
500 |
1 |
|
|
T1 |
3 |
|
T2 |
2 |
|
T3 |
1 |
all_values[19] |
467 |
1 |
|
|
T1 |
2 |
|
T2 |
3 |
|
T3 |
3 |
all_values[20] |
495 |
1 |
|
|
T1 |
4 |
|
T4 |
3 |
|
T17 |
1 |
all_values[21] |
464 |
1 |
|
|
T1 |
5 |
|
T2 |
2 |
|
T17 |
1 |
all_values[22] |
517 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T4 |
3 |
all_values[23] |
495 |
1 |
|
|
T1 |
7 |
|
T2 |
2 |
|
T3 |
1 |
all_values[24] |
502 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
2 |
all_values[25] |
475 |
1 |
|
|
T1 |
3 |
|
T2 |
5 |
|
T3 |
1 |
all_values[26] |
495 |
1 |
|
|
T1 |
1 |
|
T2 |
3 |
|
T3 |
3 |
0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |