Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	470	1			T17	6		T22	4		T44	1
all_values[1]	447	1			T17	5		T22	5		T44	6
all_values[2]	412	1			T1	1		T17	8		T21	2
all_values[3]	469	1			T1	2		T17	6		T22	4
all_values[4]	467	1			T1	2		T17	8		T22	2
all_values[5]	432	1			T1	1		T17	10		T21	2
all_values[6]	448	1			T17	13		T22	2		T44	3
all_values[7]	469	1			T1	1		T17	8		T21	2
all_values[8]	460	1			T1	3		T17	8		T21	3
all_values[9]	487	1			T1	2		T17	10		T22	1
all_values[10]	460	1			T1	3		T17	6		T22	3
all_values[11]	468	1			T1	3		T17	6		T21	2
all_values[12]	451	1			T17	9		T21	1		T22	6
all_values[13]	451	1			T1	5		T17	13		T22	1
all_values[14]	475	1			T1	2		T17	11		T21	3
all_values[15]	442	1			T1	1		T17	6		T21	3
all_values[16]	437	1			T17	9		T21	1		T22	5
all_values[17]	464	1			T1	3		T17	8		T21	1
all_values[18]	483	1			T1	6		T17	10		T22	3
all_values[19]	480	1			T1	2		T17	7		T21	2
all_values[20]	463	1			T1	3		T17	8		T22	3
all_values[21]	439	1			T1	1		T17	11		T22	3
all_values[22]	440	1			T1	1		T17	8		T21	3
all_values[23]	466	1			T1	3		T17	12		T21	4
all_values[24]	460	1			T1	1		T17	10		T22	3
all_values[25]	459	1			T1	1		T17	5		T21	2
all_values[26]	448	1			T1	2		T17	14		T22	2