Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 496 1 T12 3 T20 4 T35 1
all_values[1] 507 1 T1 1 T2 3 T12 5
all_values[2] 535 1 T1 1 T2 1 T12 2
all_values[3] 457 1 T1 2 T2 3 T12 7
all_values[4] 517 1 T1 1 T2 1 T12 4
all_values[5] 516 1 T1 2 T12 4 T40 1
all_values[6] 494 1 T2 2 T12 5 T20 4
all_values[7] 528 1 T1 1 T2 4 T12 8
all_values[8] 475 1 T1 1 T2 3 T12 6
all_values[9] 503 1 T1 1 T12 6 T20 1
all_values[10] 543 1 T2 1 T12 9 T20 3
all_values[11] 514 1 T2 1 T12 5 T20 5
all_values[12] 525 1 T1 1 T12 5 T20 4
all_values[13] 526 1 T2 2 T12 7 T20 1
all_values[14] 517 1 T2 2 T12 8 T20 3
all_values[15] 530 1 T1 1 T2 2 T12 6
all_values[16] 490 1 T12 9 T20 4 T35 2
all_values[17] 524 1 T1 1 T2 1 T12 8
all_values[18] 495 1 T12 7 T20 2 T35 1
all_values[19] 486 1 T2 1 T12 9 T20 3
all_values[20] 491 1 T12 2 T20 3 T39 5
all_values[21] 466 1 T1 3 T2 3 T12 2
all_values[22] 507 1 T1 1 T2 2 T12 6
all_values[23] 485 1 T2 1 T12 6 T20 1
all_values[24] 504 1 T1 1 T2 2 T12 6
all_values[25] 525 1 T12 7 T39 6 T49 1
all_values[26] 501 1 T1 2 T2 3 T12 9

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