Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	454	1			T20	1		T14	10		T22	2
all_values[1]	465	1			T18	1		T14	7		T22	1
all_values[2]	443	1			T14	9		T22	1		T23	1
all_values[3]	469	1			T14	3		T195	4		T148	1
all_values[4]	450	1			T18	1		T20	1		T14	9
all_values[5]	484	1			T15	1		T14	7		T24	3
all_values[6]	456	1			T14	9		T195	1		T32	1
all_values[7]	409	1			T20	1		T14	8		T23	1
all_values[8]	464	1			T20	1		T14	7		T22	2
all_values[9]	450	1			T14	6		T22	2		T24	1
all_values[10]	450	1			T15	1		T14	8		T22	1
all_values[11]	464	1			T18	2		T14	8		T22	1
all_values[12]	457	1			T14	5		T24	1		T26	1
all_values[13]	465	1			T6	1		T14	5		T24	2
all_values[14]	435	1			T6	1		T18	1		T14	5
all_values[15]	440	1			T6	2		T18	2		T14	9
all_values[16]	463	1			T16	1		T17	1		T18	1
all_values[17]	449	1			T15	1		T14	13		T22	1
all_values[18]	446	1			T6	1		T18	1		T14	8
all_values[19]	456	1			T6	1		T14	7		T22	1
all_values[20]	456	1			T18	1		T20	1		T14	4
all_values[21]	465	1			T14	6		T22	1		T150	1
all_values[22]	425	1			T6	2		T14	6		T43	1
all_values[23]	471	1			T16	1		T14	10		T23	1
all_values[24]	467	1			T16	1		T17	1		T14	4
all_values[25]	485	1			T6	1		T20	2		T14	6
all_values[26]	476	1			T17	1		T14	8		T148	2