Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	433	1			T3	5		T20	10		T38	3
all_values[1]	442	1			T3	4		T19	1		T20	4
all_values[2]	424	1			T3	9		T17	1		T20	6
all_values[3]	422	1			T3	2		T20	13		T26	1
all_values[4]	402	1			T3	6		T15	1		T20	6
all_values[5]	391	1			T3	3		T17	1		T20	5
all_values[6]	432	1			T3	6		T17	1		T20	6
all_values[7]	408	1			T3	4		T17	1		T20	7
all_values[8]	461	1			T3	9		T20	2		T38	3
all_values[9]	430	1			T3	5		T20	9		T26	2
all_values[10]	427	1			T3	3		T20	10		T37	2
all_values[11]	418	1			T3	1		T17	1		T19	1
all_values[12]	404	1			T3	7		T15	2		T20	7
all_values[13]	454	1			T3	8		T17	1		T20	8
all_values[14]	398	1			T3	7		T20	4		T38	2
all_values[15]	370	1			T3	4		T15	2		T20	8
all_values[16]	395	1			T3	3		T15	2		T20	4
all_values[17]	448	1			T3	3		T19	1		T15	2
all_values[18]	434	1			T3	9		T15	1		T20	9
all_values[19]	435	1			T3	6		T20	6		T26	3
all_values[20]	421	1			T3	5		T17	2		T20	5
all_values[21]	439	1			T3	3		T15	1		T20	7
all_values[22]	395	1			T3	5		T17	1		T15	1
all_values[23]	447	1			T3	2		T17	1		T15	2
all_values[24]	445	1			T3	6		T15	1		T20	8
all_values[25]	393	1			T3	8		T15	2		T20	10
all_values[26]	451	1			T3	11		T17	1		T15	1