Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	471	1			T23	14		T32	1		T33	2
all_values[1]	437	1			T23	9		T25	1		T4	4
all_values[2]	403	1			T18	2		T23	5		T33	2
all_values[3]	456	1			T18	1		T23	7		T4	6
all_values[4]	433	1			T18	1		T23	11		T25	1
all_values[5]	392	1			T23	9		T33	1		T4	3
all_values[6]	419	1			T23	7		T33	2		T4	4
all_values[7]	434	1			T17	1		T18	2		T23	13
all_values[8]	460	1			T23	6		T25	1		T33	1
all_values[9]	403	1			T23	9		T4	3		T42	1
all_values[10]	414	1			T17	1		T23	4		T27	1
all_values[11]	409	1			T23	8		T25	1		T4	3
all_values[12]	436	1			T18	2		T23	15		T42	1
all_values[13]	413	1			T23	7		T4	2		T42	2
all_values[14]	430	1			T17	1		T18	1		T23	9
all_values[15]	397	1			T17	1		T23	12		T42	1
all_values[16]	424	1			T23	10		T25	1		T4	6
all_values[17]	412	1			T23	2		T25	1		T33	1
all_values[18]	456	1			T23	14		T25	1		T33	2
all_values[19]	438	1			T23	12		T32	1		T4	5
all_values[20]	407	1			T17	1		T23	9		T33	1
all_values[21]	407	1			T18	1		T23	5		T25	1
all_values[22]	469	1			T18	1		T23	6		T4	1
all_values[23]	409	1			T23	3		T25	1		T32	2
all_values[24]	395	1			T23	11		T25	2		T33	2
all_values[25]	408	1			T23	9		T25	1		T4	6
all_values[26]	382	1			T23	8		T33	1		T4	6