Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	471	1			T1	2		T7	2		T10	1
all_values[1]	450	1			T1	6		T18	2		T7	7
all_values[2]	462	1			T1	3		T7	6		T40	1
all_values[3]	487	1			T1	9		T7	5		T39	1
all_values[4]	462	1			T1	3		T7	4		T10	2
all_values[5]	489	1			T1	5		T7	3		T39	1
all_values[6]	465	1			T1	4		T7	5		T37	1
all_values[7]	474	1			T1	5		T7	4		T10	1
all_values[8]	453	1			T1	5		T7	5		T11	2
all_values[9]	498	1			T1	4		T7	6		T11	1
all_values[10]	474	1			T1	8		T18	1		T7	8
all_values[11]	444	1			T1	3		T7	7		T37	2
all_values[12]	452	1			T1	5		T7	1		T10	1
all_values[13]	480	1			T1	6		T7	7		T10	1
all_values[14]	476	1			T1	5		T18	3		T7	8
all_values[15]	481	1			T1	3		T18	1		T7	3
all_values[16]	492	1			T1	4		T7	8		T40	2
all_values[17]	470	1			T1	3		T7	7		T11	3
all_values[18]	502	1			T1	7		T18	2		T7	9
all_values[19]	433	1			T1	10		T7	1		T37	2
all_values[20]	488	1			T1	5		T18	1		T7	2
all_values[21]	485	1			T1	7		T7	2		T39	1
all_values[22]	497	1			T1	5		T18	2		T7	1
all_values[23]	495	1			T1	4		T18	1		T7	4
all_values[24]	451	1			T1	6		T7	9		T39	1
all_values[25]	498	1			T1	3		T18	1		T7	2
all_values[26]	478	1			T1	1		T7	8		T39	1