Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	451	1			T17	3		T15	1		T49	5
all_values[1]	459	1			T2	1		T17	3		T24	1
all_values[2]	431	1			T2	1		T5	1		T49	2
all_values[3]	443	1			T17	2		T24	1		T49	2
all_values[4]	451	1			T2	1		T5	1		T17	1
all_values[5]	426	1			T2	1		T17	2		T15	1
all_values[6]	457	1			T17	4		T49	1		T28	1
all_values[7]	464	1			T49	1		T30	5		T47	5
all_values[8]	467	1			T2	1		T17	2		T49	2
all_values[9]	482	1			T17	4		T49	1		T28	2
all_values[10]	435	1			T2	1		T49	2		T30	3
all_values[11]	435	1			T17	2		T49	4		T28	1
all_values[12]	494	1			T5	1		T17	3		T49	1
all_values[13]	456	1			T2	1		T17	3		T49	1
all_values[14]	449	1			T17	2		T30	6		T191	1
all_values[15]	473	1			T5	2		T24	1		T49	1
all_values[16]	421	1			T24	1		T49	3		T28	1
all_values[17]	472	1			T5	1		T17	1		T49	1
all_values[18]	442	1			T2	2		T5	1		T17	2
all_values[19]	453	1			T24	1		T49	1		T30	4
all_values[20]	451	1			T17	1		T49	2		T28	1
all_values[21]	418	1			T17	2		T24	1		T49	4
all_values[22]	462	1			T2	1		T17	2		T24	1
all_values[23]	454	1			T17	2		T49	4		T28	1
all_values[24]	446	1			T49	3		T30	9		T47	10
all_values[25]	492	1			T2	1		T17	4		T24	1
all_values[26]	438	1			T17	3		T24	1		T49	2