Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 430 1 T1 2 T14 2 T33 2
all_values[1] 452 1 T1 1 T22 1 T14 1
all_values[2] 457 1 T1 1 T22 2 T14 2
all_values[3] 455 1 T1 1 T15 1 T22 1
all_values[4] 409 1 T1 2 T14 2 T36 1
all_values[5] 434 1 T1 2 T22 2 T14 1
all_values[6] 450 1 T15 1 T22 2 T14 2
all_values[7] 434 1 T1 2 T14 1 T23 1
all_values[8] 440 1 T15 1 T22 2 T14 4
all_values[9] 461 1 T1 2 T15 1 T14 5
all_values[10] 456 1 T1 1 T22 2 T14 1
all_values[11] 418 1 T15 1 T22 1 T14 4
all_values[12] 418 1 T1 1 T14 2 T23 1
all_values[13] 422 1 T15 1 T36 1 T83 2
all_values[14] 441 1 T15 1 T22 2 T14 1
all_values[15] 448 1 T1 1 T38 1 T83 1
all_values[16] 419 1 T15 1 T14 2 T83 1
all_values[17] 444 1 T1 1 T15 2 T14 3
all_values[18] 447 1 T1 1 T15 2 T14 1
all_values[19] 391 1 T15 1 T22 1 T23 1
all_values[20] 416 1 T15 1 T22 1 T14 1
all_values[21] 417 1 T14 2 T33 1 T83 1
all_values[22] 419 1 T14 3 T39 1 T11 6
all_values[23] 466 1 T1 4 T15 1 T14 4
all_values[24] 464 1 T14 3 T23 2 T38 1
all_values[25] 455 1 T1 1 T15 1 T22 2
all_values[26] 415 1 T15 2 T33 2 T38 2

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