Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 467 1 T23 1 T21 1 T40 1
all_values[1] 436 1 T1 1 T5 1 T21 1
all_values[2] 417 1 T1 1 T5 3 T23 1
all_values[3] 466 1 T5 3 T23 2 T40 1
all_values[4] 442 1 T5 3 T26 2 T45 1
all_values[5] 430 1 T5 3 T21 1 T40 2
all_values[6] 439 1 T5 2 T23 1 T21 1
all_values[7] 473 1 T1 1 T5 2 T21 1
all_values[8] 454 1 T1 3 T23 1 T29 7
all_values[9] 447 1 T1 2 T29 1 T38 7
all_values[10] 446 1 T1 1 T5 1 T21 3
all_values[11] 460 1 T1 1 T5 4 T26 1
all_values[12] 450 1 T21 2 T40 1 T29 5
all_values[13] 459 1 T5 3 T23 1 T21 1
all_values[14] 474 1 T5 4 T26 1 T45 1
all_values[15] 474 1 T5 3 T23 1 T21 1
all_values[16] 467 1 T1 1 T5 3 T23 1
all_values[17] 447 1 T5 3 T23 1 T40 1
all_values[18] 485 1 T5 1 T23 2 T40 2
all_values[19] 468 1 T5 3 T40 1 T45 2
all_values[20] 449 1 T21 1 T40 2 T26 2
all_values[21] 435 1 T5 1 T23 2 T21 1
all_values[22] 422 1 T1 1 T5 4 T29 2
all_values[23] 457 1 T5 4 T23 2 T21 2
all_values[24] 471 1 T5 1 T29 9 T38 6
all_values[25] 448 1 T5 5 T23 1 T40 1
all_values[26] 438 1 T5 3 T21 2 T40 3

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