Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	512	1			T5	11		T33	6		T21	1
all_values[1]	519	1			T4	1		T5	4		T33	1
all_values[2]	498	1			T14	1		T5	10		T33	4
all_values[3]	496	1			T5	6		T33	3		T22	1
all_values[4]	513	1			T4	1		T14	1		T5	9
all_values[5]	471	1			T5	8		T33	2		T22	1
all_values[6]	452	1			T4	2		T5	7		T33	5
all_values[7]	482	1			T5	9		T33	3		T21	4
all_values[8]	491	1			T5	7		T33	4		T22	1
all_values[9]	497	1			T4	1		T3	1		T5	11
all_values[10]	534	1			T5	8		T33	3		T26	2
all_values[11]	514	1			T4	1		T5	12		T33	10
all_values[12]	503	1			T3	1		T14	1		T5	9
all_values[13]	514	1			T4	1		T5	7		T33	4
all_values[14]	522	1			T5	13		T33	4		T22	1
all_values[15]	546	1			T3	1		T14	1		T5	8
all_values[16]	492	1			T4	1		T14	1		T5	13
all_values[17]	491	1			T3	1		T14	2		T5	7
all_values[18]	495	1			T3	1		T5	7		T33	5
all_values[19]	496	1			T4	1		T5	9		T33	2
all_values[20]	512	1			T3	1		T14	1		T5	9
all_values[21]	504	1			T5	10		T33	9		T21	1
all_values[22]	477	1			T5	3		T33	3		T21	1
all_values[23]	481	1			T4	1		T5	11		T33	2
all_values[24]	470	1			T4	1		T5	3		T33	4
all_values[25]	460	1			T5	2		T33	3		T22	1
all_values[26]	468	1			T5	9		T33	4		T21	1