Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 430 1 T15 2 T18 2 T76 9
all_values[1] 439 1 T15 4 T76 8 T41 2
all_values[2] 476 1 T15 6 T76 10 T77 2
all_values[3] 428 1 T15 1 T13 1 T18 1
all_values[4] 456 1 T15 2 T20 1 T76 4
all_values[5] 489 1 T13 1 T76 8 T9 1
all_values[6] 471 1 T15 2 T76 6 T77 2
all_values[7] 427 1 T15 1 T18 1 T76 2
all_values[8] 443 1 T15 3 T76 4 T77 2
all_values[9] 451 1 T15 9 T18 3 T39 1
all_values[10] 411 1 T15 1 T18 1 T75 2
all_values[11] 433 1 T15 2 T18 1 T76 5
all_values[12] 489 1 T15 4 T13 1 T18 1
all_values[13] 456 1 T15 1 T13 1 T18 1
all_values[14] 450 1 T15 3 T13 1 T18 1
all_values[15] 438 1 T15 1 T18 1 T39 1
all_values[16] 453 1 T15 5 T18 1 T20 1
all_values[17] 459 1 T15 4 T13 1 T18 2
all_values[18] 443 1 T15 2 T13 1 T76 6
all_values[19] 460 1 T15 3 T13 1 T18 2
all_values[20] 412 1 T15 5 T18 1 T20 2
all_values[21] 459 1 T15 3 T76 3 T9 1
all_values[22] 429 1 T15 1 T18 2 T39 1
all_values[23] 451 1 T15 4 T18 1 T39 1
all_values[24] 399 1 T15 1 T39 2 T75 1
all_values[25] 469 1 T15 3 T18 2 T76 5
all_values[26] 435 1 T15 4 T18 1 T76 7

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