Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 414 1 T2 6 T21 2 T22 2
all_values[1] 395 1 T2 2 T22 3 T14 6
all_values[2] 441 1 T2 4 T21 1 T22 5
all_values[3] 383 1 T2 6 T21 1 T22 4
all_values[4] 435 1 T2 7 T22 5 T14 5
all_values[5] 426 1 T2 3 T22 3 T14 6
all_values[6] 409 1 T2 5 T22 5 T14 4
all_values[7] 432 1 T2 9 T22 5 T14 7
all_values[8] 425 1 T2 3 T22 5 T14 1
all_values[9] 388 1 T2 5 T22 9 T14 2
all_values[10] 418 1 T2 3 T22 3 T14 4
all_values[11] 397 1 T2 3 T22 3 T14 6
all_values[12] 420 1 T2 2 T22 7 T14 3
all_values[13] 395 1 T2 4 T21 2 T22 4
all_values[14] 409 1 T2 6 T22 4 T14 1
all_values[15] 396 1 T2 6 T22 1 T14 3
all_values[16] 424 1 T2 5 T21 2 T22 6
all_values[17] 407 1 T2 5 T21 1 T22 4
all_values[18] 435 1 T2 7 T21 1 T22 3
all_values[19] 420 1 T2 3 T22 6 T28 4
all_values[20] 401 1 T2 3 T22 4 T14 5
all_values[21] 429 1 T2 6 T22 2 T14 2
all_values[22] 380 1 T2 4 T22 3 T14 4
all_values[23] 437 1 T2 4 T22 3 T14 7
all_values[24] 399 1 T2 4 T22 3 T14 4
all_values[25] 409 1 T2 7 T21 2 T22 3
all_values[26] 396 1 T2 4 T22 3 T14 3

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