Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	498	1			T21	6		T18	1		T196	1
all_values[1]	515	1			T4	1		T21	5		T28	1
all_values[2]	482	1			T4	1		T21	4		T18	1
all_values[3]	505	1			T4	2		T21	5		T18	2
all_values[4]	498	1			T21	2		T28	2		T61	1
all_values[5]	503	1			T21	5		T196	5		T61	2
all_values[6]	523	1			T21	7		T28	1		T196	1
all_values[7]	497	1			T21	2		T28	1		T196	1
all_values[8]	471	1			T4	1		T21	4		T49	1
all_values[9]	479	1			T21	4		T28	1		T196	2
all_values[10]	488	1			T21	4		T196	3		T13	4
all_values[11]	494	1			T4	1		T21	1		T28	1
all_values[12]	505	1			T21	2		T18	1		T164	1
all_values[13]	499	1			T21	2		T83	1		T13	3
all_values[14]	502	1			T21	3		T28	1		T196	1
all_values[15]	504	1			T21	3		T196	1		T61	2
all_values[16]	506	1			T21	4		T18	1		T196	1
all_values[17]	487	1			T4	1		T21	3		T28	1
all_values[18]	473	1			T21	2		T61	1		T48	2
all_values[19]	456	1			T21	3		T61	2		T48	1
all_values[20]	502	1			T21	7		T196	1		T61	2
all_values[21]	498	1			T21	2		T28	1		T83	1
all_values[22]	467	1			T21	3		T196	2		T48	1
all_values[23]	442	1			T21	3		T28	2		T61	2
all_values[24]	477	1			T21	4		T18	2		T196	3
all_values[25]	467	1			T21	2		T28	1		T61	3
all_values[26]	501	1			T4	1		T21	5		T196	1