Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	504	1			T18	2		T21	1		T27	2
all_values[1]	451	1			T17	1		T18	1		T27	2
all_values[2]	485	1			T17	1		T18	1		T27	1
all_values[3]	438	1			T17	1		T18	1		T27	3
all_values[4]	478	1			T27	2		T124	3		T47	1
all_values[5]	502	1			T124	2		T56	2		T49	1
all_values[6]	489	1			T21	1		T27	1		T124	3
all_values[7]	471	1			T18	1		T21	1		T27	1
all_values[8]	470	1			T17	1		T27	1		T56	2
all_values[9]	403	1			T124	1		T50	3		T58	1
all_values[10]	481	1			T17	1		T27	2		T124	3
all_values[11]	520	1			T27	2		T124	2		T50	3
all_values[12]	481	1			T18	1		T27	1		T124	2
all_values[13]	460	1			T18	2		T21	1		T27	3
all_values[14]	490	1			T17	1		T27	2		T124	3
all_values[15]	484	1			T27	4		T124	1		T55	1
all_values[16]	451	1			T17	1		T18	2		T27	3
all_values[17]	491	1			T27	3		T124	3		T55	1
all_values[18]	492	1			T18	2		T27	2		T124	1
all_values[19]	483	1			T17	2		T18	1		T124	4
all_values[20]	436	1			T17	1		T21	1		T27	2
all_values[21]	470	1			T27	4		T124	1		T55	3
all_values[22]	488	1			T17	1		T27	1		T47	1
all_values[23]	458	1			T17	1		T18	2		T27	2
all_values[24]	441	1			T17	1		T18	1		T21	1
all_values[25]	473	1			T17	2		T21	2		T124	2
all_values[26]	486	1			T18	1		T27	1		T124	1