Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 474 1 T14 1 T17 1 T18 3
all_values[1] 470 1 T18 1 T25 5 T8 10
all_values[2] 483 1 T24 1 T25 4 T8 7
all_values[3] 464 1 T14 1 T17 1 T18 1
all_values[4] 455 1 T14 1 T17 2 T25 9
all_values[5] 414 1 T17 1 T18 1 T24 1
all_values[6] 447 1 T1 1 T18 3 T25 4
all_values[7] 462 1 T14 1 T18 1 T25 9
all_values[8] 473 1 T24 1 T25 13 T8 12
all_values[9] 461 1 T14 1 T17 1 T25 4
all_values[10] 424 1 T17 1 T18 1 T25 8
all_values[11] 430 1 T17 2 T18 2 T24 2
all_values[12] 496 1 T24 1 T25 9 T8 4
all_values[13] 452 1 T25 7 T8 9 T57 10
all_values[14] 452 1 T14 1 T18 1 T25 9
all_values[15] 459 1 T1 3 T17 1 T24 2
all_values[16] 454 1 T1 1 T24 2 T25 10
all_values[17] 479 1 T18 1 T25 8 T8 4
all_values[18] 448 1 T17 2 T25 5 T8 8
all_values[19] 462 1 T1 1 T14 1 T18 3
all_values[20] 492 1 T24 3 T25 9 T8 7
all_values[21] 457 1 T14 2 T24 1 T25 13
all_values[22] 482 1 T14 2 T17 1 T18 1
all_values[23] 439 1 T18 2 T24 2 T25 5
all_values[24] 449 1 T14 1 T17 1 T18 1
all_values[25] 470 1 T1 1 T17 1 T18 1
all_values[26] 477 1 T17 1 T18 1 T24 1

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