Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 444 1 T1 2 T4 2 T17 2
all_values[1] 443 1 T4 2 T5 1 T17 1
all_values[2] 440 1 T1 1 T4 4 T17 3
all_values[3] 407 1 T4 2 T17 2 T23 1
all_values[4] 414 1 T1 1 T4 2 T65 2
all_values[5] 465 1 T18 2 T4 4 T19 1
all_values[6] 421 1 T1 1 T4 1 T19 1
all_values[7] 420 1 T4 4 T19 1 T17 4
all_values[8] 444 1 T18 1 T4 1 T17 1
all_values[9] 437 1 T18 1 T4 2 T23 1
all_values[10] 410 1 T18 1 T4 2 T17 3
all_values[11] 448 1 T18 3 T4 1 T19 2
all_values[12] 422 1 T4 3 T17 2 T44 2
all_values[13] 440 1 T19 2 T17 3 T31 1
all_values[14] 427 1 T18 1 T4 2 T19 1
all_values[15] 447 1 T18 1 T17 1 T23 3
all_values[16] 407 1 T1 1 T18 1 T19 1
all_values[17] 423 1 T18 1 T4 4 T17 1
all_values[18] 427 1 T18 1 T17 4 T23 1
all_values[19] 421 1 T1 1 T4 5 T17 2
all_values[20] 457 1 T1 2 T18 1 T4 3
all_values[21] 392 1 T1 1 T4 4 T23 1
all_values[22] 454 1 T18 1 T4 2 T17 5
all_values[23] 423 1 T18 2 T4 4 T17 3
all_values[24] 397 1 T4 2 T19 1 T17 1
all_values[25] 439 1 T4 5 T19 2 T17 3
all_values[26] 433 1 T1 1 T4 3 T17 1

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