Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/xbar_peri-sim-vcs/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	493	1			T22	1		T50	2		T237	1
all_values[1]	442	1			T49	1		T53	3		T269	1
all_values[2]	421	1			T22	1		T50	1		T237	1
all_values[3]	430	1			T22	1		T237	2		T53	1
all_values[4]	465	1			T3	1		T22	2		T49	1
all_values[5]	438	1			T22	1		T49	2		T50	1
all_values[6]	456	1			T22	1		T269	2		T313	1
all_values[7]	432	1			T3	1		T22	1		T50	1
all_values[8]	456	1			T49	1		T237	3		T53	2
all_values[9]	482	1			T3	2		T50	1		T237	5
all_values[10]	440	1			T3	1		T237	1		T269	1
all_values[11]	456	1			T22	1		T53	1		T269	3
all_values[12]	457	1			T49	2		T50	2		T237	2
all_values[13]	497	1			T49	1		T50	2		T53	5
all_values[14]	470	1			T49	1		T50	1		T237	2
all_values[15]	481	1			T49	1		T237	3		T53	1
all_values[16]	415	1			T50	1		T237	3		T269	1
all_values[17]	413	1			T50	2		T53	1		T71	1
all_values[18]	486	1			T237	1		T269	5		T313	1
all_values[19]	454	1			T237	1		T53	2		T269	2
all_values[20]	439	1			T21	1		T50	2		T53	1
all_values[21]	467	1			T49	1		T237	1		T53	5
all_values[22]	437	1			T50	1		T269	1		T313	1
all_values[23]	451	1			T22	1		T53	1		T269	3
all_values[24]	460	1			T53	1		T269	4		T313	1
all_values[25]	440	1			T3	1		T22	1		T49	1
all_values[26]	440	1			T53	2		T269	2		T243	1