| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 99.27 | 100.00 | 95.61 | 100.00 | 100.00 | 100.00 | 100.00 |
| T772 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random_zero_delays.4234163718 | Aug 23 01:21:18 AM UTC 24 | Aug 23 01:21:23 AM UTC 24 | 68081461 ps | ||
| T190 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_rand_reset.1894703854 | Aug 23 01:18:58 AM UTC 24 | Aug 23 01:21:23 AM UTC 24 | 5620214543 ps | ||
| T773 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_slow_rsp.3968658908 | Aug 23 01:21:16 AM UTC 24 | Aug 23 01:21:24 AM UTC 24 | 2144987223 ps | ||
| T774 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_large_delays.3516147956 | Aug 23 01:21:14 AM UTC 24 | Aug 23 01:21:25 AM UTC 24 | 3244791532 ps | ||
| T775 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_error.3012243224 | Aug 23 01:19:59 AM UTC 24 | Aug 23 01:21:25 AM UTC 24 | 9072703294 ps | ||
| T134 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all.501423332 | Aug 23 01:20:36 AM UTC 24 | Aug 23 01:21:26 AM UTC 24 | 4221123380 ps | ||
| T776 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_random_large_delays.506928086 | Aug 23 01:20:06 AM UTC 24 | Aug 23 01:21:27 AM UTC 24 | 23230399335 ps | ||
| T777 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all.1644947378 | Aug 23 01:21:08 AM UTC 24 | Aug 23 01:21:28 AM UTC 24 | 415204974 ps | ||
| T778 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_same_source.1752153659 | Aug 23 01:21:25 AM UTC 24 | Aug 23 01:21:30 AM UTC 24 | 128872828 ps | ||
| T779 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_rand_reset.1570638464 | Aug 23 01:21:08 AM UTC 24 | Aug 23 01:21:30 AM UTC 24 | 88301493 ps | ||
| T780 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_error.3363116578 | Aug 23 01:20:38 AM UTC 24 | Aug 23 01:21:30 AM UTC 24 | 10799042418 ps | ||
| T781 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_error_and_unmapped_addr.3700364128 | Aug 23 01:21:27 AM UTC 24 | Aug 23 01:21:32 AM UTC 24 | 444915773 ps | ||
| T782 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_error_random.2671482586 | Aug 23 01:21:27 AM UTC 24 | Aug 23 01:21:33 AM UTC 24 | 126058569 ps | ||
| T783 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_error.1687117652 | Aug 23 01:21:10 AM UTC 24 | Aug 23 01:21:34 AM UTC 24 | 1756206241 ps | ||
| T784 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke.3204554027 | Aug 23 01:21:31 AM UTC 24 | Aug 23 01:21:34 AM UTC 24 | 75760955 ps | ||
| T785 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_rand_reset.459186769 | Aug 23 01:20:17 AM UTC 24 | Aug 23 01:21:35 AM UTC 24 | 8077182856 ps | ||
| T107 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_access_same_device.3146124728 | Aug 23 01:21:24 AM UTC 24 | Aug 23 01:21:35 AM UTC 24 | 927478867 ps | ||
| T786 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_zero_delays.1769343412 | Aug 23 01:21:34 AM UTC 24 | Aug 23 01:21:36 AM UTC 24 | 8709674 ps | ||
| T787 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_unmapped_addr.595526502 | Aug 23 01:21:27 AM UTC 24 | Aug 23 01:21:36 AM UTC 24 | 949454826 ps | ||
| T788 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_rand_reset.1528194619 | Aug 23 01:21:30 AM UTC 24 | Aug 23 01:21:41 AM UTC 24 | 63396116 ps | ||
| T789 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random.3984533681 | Aug 23 01:21:36 AM UTC 24 | Aug 23 01:21:43 AM UTC 24 | 934176893 ps | ||
| T790 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_large_delays.2603569446 | Aug 23 01:21:35 AM UTC 24 | Aug 23 01:21:43 AM UTC 24 | 2906303761 ps | ||
| T247 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_access_same_device_slow_rsp.1136392855 | Aug 23 01:21:24 AM UTC 24 | Aug 23 01:21:43 AM UTC 24 | 2638965434 ps | ||
| T791 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random_zero_delays.2414558652 | Aug 23 01:21:38 AM UTC 24 | Aug 23 01:21:43 AM UTC 24 | 91974565 ps | ||
| T792 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all.922705013 | Aug 23 01:21:28 AM UTC 24 | Aug 23 01:21:45 AM UTC 24 | 230946136 ps | ||
| T793 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_random_large_delays.3473883210 | Aug 23 01:19:47 AM UTC 24 | Aug 23 01:21:46 AM UTC 24 | 167259521223 ps | ||
| T794 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_slow_rsp.2252722999 | Aug 23 01:21:35 AM UTC 24 | Aug 23 01:21:46 AM UTC 24 | 1735273428 ps | ||
| T795 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_reset_error.3909165006 | Aug 23 01:21:11 AM UTC 24 | Aug 23 01:21:46 AM UTC 24 | 421308243 ps | ||
| T796 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_error_random.1149880620 | Aug 23 01:21:45 AM UTC 24 | Aug 23 01:21:49 AM UTC 24 | 546778740 ps | ||
| T108 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_random_slow_rsp.482860167 | Aug 23 01:20:30 AM UTC 24 | Aug 23 01:21:50 AM UTC 24 | 22919705298 ps | ||
| T797 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_same_source.1105015495 | Aug 23 01:21:45 AM UTC 24 | Aug 23 01:21:51 AM UTC 24 | 383256368 ps | ||
| T798 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_rand_reset.4232251198 | Aug 23 01:20:38 AM UTC 24 | Aug 23 01:21:51 AM UTC 24 | 3813778307 ps | ||
| T799 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_error_and_unmapped_addr.248533200 | Aug 23 01:21:45 AM UTC 24 | Aug 23 01:21:51 AM UTC 24 | 76354340 ps | ||
| T800 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_access_same_device.1123923011 | Aug 23 01:21:38 AM UTC 24 | Aug 23 01:21:52 AM UTC 24 | 1088427681 ps | ||
| T801 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_unmapped_addr.419570053 | Aug 23 01:21:45 AM UTC 24 | Aug 23 01:21:52 AM UTC 24 | 92586064 ps | ||
| T802 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke_zero_delays.3122269394 | Aug 23 01:21:51 AM UTC 24 | Aug 23 01:21:53 AM UTC 24 | 10673864 ps | ||
| T803 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke.1513090232 | Aug 23 01:21:51 AM UTC 24 | Aug 23 01:21:53 AM UTC 24 | 53676712 ps | ||
| T804 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random_zero_delays.1836955134 | Aug 23 01:21:53 AM UTC 24 | Aug 23 01:21:56 AM UTC 24 | 9047559 ps | ||
| T805 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_access_same_device.2766010024 | Aug 23 01:21:55 AM UTC 24 | Aug 23 01:21:59 AM UTC 24 | 15661006 ps | ||
| T806 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random.4035065598 | Aug 23 01:21:53 AM UTC 24 | Aug 23 01:22:00 AM UTC 24 | 91465222 ps | ||
| T807 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke_slow_rsp.187321127 | Aug 23 01:21:53 AM UTC 24 | Aug 23 01:22:03 AM UTC 24 | 1825313463 ps | ||
| T808 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke_large_delays.685803460 | Aug 23 01:21:53 AM UTC 24 | Aug 23 01:22:03 AM UTC 24 | 1770028301 ps | ||
| T809 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_same_source.4017764363 | Aug 23 01:21:59 AM UTC 24 | Aug 23 01:22:04 AM UTC 24 | 52115909 ps | ||
| T810 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all_with_error.3947434662 | Aug 23 01:21:48 AM UTC 24 | Aug 23 01:22:05 AM UTC 24 | 348107501 ps | ||
| T811 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_error_random.3274009962 | Aug 23 01:22:01 AM UTC 24 | Aug 23 01:22:05 AM UTC 24 | 81514025 ps | ||
| T812 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_reset_error.4125926926 | Aug 23 01:20:19 AM UTC 24 | Aug 23 01:22:11 AM UTC 24 | 879417744 ps | ||
| T813 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_unmapped_addr.563878861 | Aug 23 01:22:04 AM UTC 24 | Aug 23 01:22:11 AM UTC 24 | 894639973 ps | ||
| T814 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random_large_delays.2335078869 | Aug 23 01:21:38 AM UTC 24 | Aug 23 01:22:14 AM UTC 24 | 17332922187 ps | ||
| T815 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_error_and_unmapped_addr.3252998223 | Aug 23 01:22:04 AM UTC 24 | Aug 23 01:22:14 AM UTC 24 | 517344938 ps | ||
| T816 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random_slow_rsp.1607817307 | Aug 23 01:21:53 AM UTC 24 | Aug 23 01:22:14 AM UTC 24 | 4419889577 ps | ||
| T817 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke.2954083069 | Aug 23 01:22:13 AM UTC 24 | Aug 23 01:22:15 AM UTC 24 | 48897982 ps | ||
| T818 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random_large_delays.783379982 | Aug 23 01:21:19 AM UTC 24 | Aug 23 01:22:17 AM UTC 24 | 62485888693 ps | ||
| T217 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_access_same_device_slow_rsp.494898188 | Aug 23 01:16:31 AM UTC 24 | Aug 23 01:22:17 AM UTC 24 | 84094724916 ps | ||
| T819 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke_zero_delays.1646186031 | Aug 23 01:22:16 AM UTC 24 | Aug 23 01:22:18 AM UTC 24 | 9521742 ps | ||
| T820 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all.60573892 | Aug 23 01:20:50 AM UTC 24 | Aug 23 01:22:19 AM UTC 24 | 7783144929 ps | ||
| T821 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all_with_reset_error.2041472928 | Aug 23 01:22:11 AM UTC 24 | Aug 23 01:22:19 AM UTC 24 | 108455897 ps | ||
| T822 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random_zero_delays.3963861121 | Aug 23 01:22:18 AM UTC 24 | Aug 23 01:22:22 AM UTC 24 | 91898516 ps | ||
| T823 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_error.1023059405 | Aug 23 01:21:31 AM UTC 24 | Aug 23 01:22:22 AM UTC 24 | 10421019340 ps | ||
| T824 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke_slow_rsp.617600362 | Aug 23 01:22:16 AM UTC 24 | Aug 23 01:22:22 AM UTC 24 | 5532369958 ps | ||
| T825 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke_large_delays.4169803776 | Aug 23 01:22:16 AM UTC 24 | Aug 23 01:22:23 AM UTC 24 | 3309335137 ps | ||
| T826 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_random_slow_rsp.311591122 | Aug 23 01:20:45 AM UTC 24 | Aug 23 01:22:24 AM UTC 24 | 55233808465 ps | ||
| T827 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random.2485339253 | Aug 23 01:22:16 AM UTC 24 | Aug 23 01:22:26 AM UTC 24 | 1081798574 ps | ||
| T828 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_same_source.3887247521 | Aug 23 01:22:23 AM UTC 24 | Aug 23 01:22:26 AM UTC 24 | 77230454 ps | ||
| T829 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_unmapped_addr.2274974491 | Aug 23 01:22:25 AM UTC 24 | Aug 23 01:22:27 AM UTC 24 | 53204859 ps | ||
| T830 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random_large_delays.1795132599 | Aug 23 01:22:18 AM UTC 24 | Aug 23 01:22:27 AM UTC 24 | 4364257821 ps | ||
| T831 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random_slow_rsp.2004280540 | Aug 23 01:21:38 AM UTC 24 | Aug 23 01:22:30 AM UTC 24 | 11644281409 ps | ||
| T832 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_error_and_unmapped_addr.3223677964 | Aug 23 01:22:25 AM UTC 24 | Aug 23 01:22:30 AM UTC 24 | 276947727 ps | ||
| T833 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke.1439815107 | Aug 23 01:22:29 AM UTC 24 | Aug 23 01:22:31 AM UTC 24 | 38766695 ps | ||
| T834 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all.4000737608 | Aug 23 01:22:26 AM UTC 24 | Aug 23 01:22:33 AM UTC 24 | 113351391 ps | ||
| T835 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke_zero_delays.3517800271 | Aug 23 01:22:31 AM UTC 24 | Aug 23 01:22:33 AM UTC 24 | 8774329 ps | ||
| T836 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_error_random.4142590967 | Aug 23 01:22:25 AM UTC 24 | Aug 23 01:22:36 AM UTC 24 | 647548264 ps | ||
| T109 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_access_same_device.3589978141 | Aug 23 01:22:21 AM UTC 24 | Aug 23 01:22:36 AM UTC 24 | 1007150366 ps | ||
| T837 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke_large_delays.2515160984 | Aug 23 01:22:31 AM UTC 24 | Aug 23 01:22:39 AM UTC 24 | 4251171931 ps | ||
| T838 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all_with_reset_error.2815133443 | Aug 23 01:21:48 AM UTC 24 | Aug 23 01:22:40 AM UTC 24 | 626928805 ps | ||
| T171 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random_slow_rsp.158662232 | Aug 23 01:21:22 AM UTC 24 | Aug 23 01:22:40 AM UTC 24 | 23676196479 ps | ||
| T169 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random.3790462394 | Aug 23 01:22:34 AM UTC 24 | Aug 23 01:22:40 AM UTC 24 | 1342571917 ps | ||
| T159 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all.4201738851 | Aug 23 01:22:04 AM UTC 24 | Aug 23 01:22:41 AM UTC 24 | 8285579212 ps | ||
| T839 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke_slow_rsp.664237389 | Aug 23 01:22:33 AM UTC 24 | Aug 23 01:22:42 AM UTC 24 | 1092476396 ps | ||
| T840 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random_zero_delays.1095097975 | Aug 23 01:22:34 AM UTC 24 | Aug 23 01:22:42 AM UTC 24 | 72008732 ps | ||
| T8 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_reset_error.2675502333 | Aug 23 01:20:54 AM UTC 24 | Aug 23 01:22:42 AM UTC 24 | 1069476953 ps | ||
| T841 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_reset_error.1450645053 | Aug 23 01:21:31 AM UTC 24 | Aug 23 01:22:43 AM UTC 24 | 2686944612 ps | ||
| T842 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_rand_reset.1853088369 | Aug 23 01:20:50 AM UTC 24 | Aug 23 01:22:44 AM UTC 24 | 1072448792 ps | ||
| T843 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all_with_error.2714220724 | Aug 23 01:22:06 AM UTC 24 | Aug 23 01:22:45 AM UTC 24 | 4087855672 ps | ||
| T844 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_unmapped_addr.958137289 | Aug 23 01:22:43 AM UTC 24 | Aug 23 01:22:45 AM UTC 24 | 10124635 ps | ||
| T845 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random_slow_rsp.2671261613 | Aug 23 01:22:37 AM UTC 24 | Aug 23 01:22:45 AM UTC 24 | 1532210228 ps | ||
| T846 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_same_source.2137212226 | Aug 23 01:22:43 AM UTC 24 | Aug 23 01:22:46 AM UTC 24 | 136903911 ps | ||
| T847 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_random_large_delays.118561128 | Aug 23 01:20:58 AM UTC 24 | Aug 23 01:22:47 AM UTC 24 | 177473831271 ps | ||
| T848 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all_with_error.3627066351 | Aug 23 01:22:28 AM UTC 24 | Aug 23 01:22:48 AM UTC 24 | 8959738150 ps | ||
| T849 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke.4033778408 | Aug 23 01:22:46 AM UTC 24 | Aug 23 01:22:48 AM UTC 24 | 59421856 ps | ||
| T850 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_error_and_unmapped_addr.3740420687 | Aug 23 01:22:46 AM UTC 24 | Aug 23 01:22:50 AM UTC 24 | 47491587 ps | ||
| T851 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_error_random.4012454111 | Aug 23 01:22:43 AM UTC 24 | Aug 23 01:22:50 AM UTC 24 | 421068352 ps | ||
| T852 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all_with_error.195450414 | Aug 23 01:22:46 AM UTC 24 | Aug 23 01:22:50 AM UTC 24 | 42797598 ps | ||
| T853 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke_zero_delays.2238632884 | Aug 23 01:22:48 AM UTC 24 | Aug 23 01:22:50 AM UTC 24 | 16284412 ps | ||
| T854 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random.2958321859 | Aug 23 01:22:49 AM UTC 24 | Aug 23 01:22:52 AM UTC 24 | 186256405 ps | ||
| T110 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_access_same_device.1453039359 | Aug 23 01:22:39 AM UTC 24 | Aug 23 01:22:53 AM UTC 24 | 1279845078 ps | ||
| T855 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke_slow_rsp.797788957 | Aug 23 01:22:49 AM UTC 24 | Aug 23 01:22:54 AM UTC 24 | 602778588 ps | ||
| T856 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random_zero_delays.3313044608 | Aug 23 01:22:51 AM UTC 24 | Aug 23 01:22:55 AM UTC 24 | 63467122 ps | ||
| T857 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random_slow_rsp.1428218898 | Aug 23 01:22:20 AM UTC 24 | Aug 23 01:22:56 AM UTC 24 | 5673031748 ps | ||
| T858 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke_large_delays.2801782351 | Aug 23 01:22:49 AM UTC 24 | Aug 23 01:22:56 AM UTC 24 | 2332694976 ps | ||
| T230 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_access_same_device_slow_rsp.2108402855 | Aug 23 01:20:32 AM UTC 24 | Aug 23 01:22:56 AM UTC 24 | 21981695865 ps | ||
| T859 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_error_and_unmapped_addr.3163900088 | Aug 23 01:22:55 AM UTC 24 | Aug 23 01:22:57 AM UTC 24 | 9474862 ps | ||
| T860 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all_with_rand_reset.2295797095 | Aug 23 01:21:47 AM UTC 24 | Aug 23 01:22:57 AM UTC 24 | 2381779899 ps | ||
| T861 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_error_random.4183561131 | Aug 23 01:22:53 AM UTC 24 | Aug 23 01:22:57 AM UTC 24 | 255763776 ps | ||
| T862 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all.177556600 | Aug 23 01:21:47 AM UTC 24 | Aug 23 01:22:58 AM UTC 24 | 9795157294 ps | ||
| T863 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all.271394067 | Aug 23 01:22:56 AM UTC 24 | Aug 23 01:22:58 AM UTC 24 | 17658460 ps | ||
| T864 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_same_source.3164773378 | Aug 23 01:22:53 AM UTC 24 | Aug 23 01:22:59 AM UTC 24 | 68034037 ps | ||
| T865 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_unmapped_addr.2154098211 | Aug 23 01:22:55 AM UTC 24 | Aug 23 01:23:00 AM UTC 24 | 81240438 ps | ||
| T866 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_access_same_device_slow_rsp.238479811 | Aug 23 01:21:56 AM UTC 24 | Aug 23 01:23:01 AM UTC 24 | 16383037285 ps | ||
| T867 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all.306609670 | Aug 23 01:22:46 AM UTC 24 | Aug 23 01:23:01 AM UTC 24 | 332562632 ps | ||
| T868 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke_zero_delays.449604579 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:02 AM UTC 24 | 25927149 ps | ||
| T869 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke.2552530989 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:02 AM UTC 24 | 22294776 ps | ||
| T870 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random.1479284570 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:04 AM UTC 24 | 344205513 ps | ||
| T871 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all_with_reset_error.2329792545 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:06 AM UTC 24 | 101762466 ps | ||
| T872 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random_zero_delays.3163755692 | Aug 23 01:23:02 AM UTC 24 | Aug 23 01:23:06 AM UTC 24 | 44064822 ps | ||
| T873 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_error_random.4292109856 | Aug 23 01:23:04 AM UTC 24 | Aug 23 01:23:07 AM UTC 24 | 22916651 ps | ||
| T874 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_access_same_device.4181464692 | Aug 23 01:22:53 AM UTC 24 | Aug 23 01:23:07 AM UTC 24 | 3305386795 ps | ||
| T875 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke_large_delays.1634868225 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:08 AM UTC 24 | 10616092806 ps | ||
| T876 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_same_source.999216098 | Aug 23 01:23:04 AM UTC 24 | Aug 23 01:23:08 AM UTC 24 | 51122719 ps | ||
| T877 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke_slow_rsp.2421086288 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:10 AM UTC 24 | 1914333283 ps | ||
| T878 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_error_and_unmapped_addr.2848080666 | Aug 23 01:23:07 AM UTC 24 | Aug 23 01:23:13 AM UTC 24 | 130383802 ps | ||
| T879 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_unmapped_addr.1014579271 | Aug 23 01:23:07 AM UTC 24 | Aug 23 01:23:13 AM UTC 24 | 66129769 ps | ||
| T880 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all_with_reset_error.1024366837 | Aug 23 01:22:29 AM UTC 24 | Aug 23 01:23:15 AM UTC 24 | 342762303 ps | ||
| T881 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_access_same_device.293536841 | Aug 23 01:23:04 AM UTC 24 | Aug 23 01:23:15 AM UTC 24 | 129799352 ps | ||
| T882 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all_with_error.3618023963 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:23:21 AM UTC 24 | 2576218285 ps | ||
| T883 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random_large_delays.2529795507 | Aug 23 01:21:53 AM UTC 24 | Aug 23 01:23:23 AM UTC 24 | 22908622959 ps | ||
| T884 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all_with_rand_reset.4155379113 | Aug 23 01:23:09 AM UTC 24 | Aug 23 01:23:25 AM UTC 24 | 148785011 ps | ||
| T885 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random_large_delays.1028478423 | Aug 23 01:23:02 AM UTC 24 | Aug 23 01:23:27 AM UTC 24 | 9255840515 ps | ||
| T886 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_access_same_device_slow_rsp.2034075363 | Aug 23 01:19:53 AM UTC 24 | Aug 23 01:23:36 AM UTC 24 | 46977513375 ps | ||
| T237 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_access_same_device_slow_rsp.3325896274 | Aug 23 01:19:30 AM UTC 24 | Aug 23 01:23:39 AM UTC 24 | 48641077627 ps | ||
| T9 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all_with_error.1750991695 | Aug 23 01:23:09 AM UTC 24 | Aug 23 01:23:39 AM UTC 24 | 476469571 ps | ||
| T887 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all_with_rand_reset.3312696689 | Aug 23 01:22:06 AM UTC 24 | Aug 23 01:23:40 AM UTC 24 | 2430148025 ps | ||
| T888 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_random_slow_rsp.1701147457 | Aug 23 01:20:59 AM UTC 24 | Aug 23 01:23:47 AM UTC 24 | 238776969033 ps | ||
| T889 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_access_same_device_slow_rsp.4241639700 | Aug 23 01:21:42 AM UTC 24 | Aug 23 01:23:48 AM UTC 24 | 99169684471 ps | ||
| T890 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random_slow_rsp.2581610190 | Aug 23 01:22:51 AM UTC 24 | Aug 23 01:23:49 AM UTC 24 | 33526764122 ps | ||
| T122 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all.93413414 | Aug 23 01:23:07 AM UTC 24 | Aug 23 01:23:51 AM UTC 24 | 15844957021 ps | ||
| T891 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random_large_delays.3434321433 | Aug 23 01:22:51 AM UTC 24 | Aug 23 01:23:53 AM UTC 24 | 71701236537 ps | ||
| T892 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all_with_rand_reset.2513452221 | Aug 23 01:22:28 AM UTC 24 | Aug 23 01:23:57 AM UTC 24 | 8909376219 ps | ||
| T111 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random_slow_rsp.3148431532 | Aug 23 01:23:02 AM UTC 24 | Aug 23 01:24:10 AM UTC 24 | 68752552174 ps | ||
| T893 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_access_same_device_slow_rsp.1463226790 | Aug 23 01:22:53 AM UTC 24 | Aug 23 01:24:13 AM UTC 24 | 81604817658 ps | ||
| T894 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_access_same_device_slow_rsp.849245695 | Aug 23 01:20:47 AM UTC 24 | Aug 23 01:24:14 AM UTC 24 | 76611912302 ps | ||
| T895 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all_with_rand_reset.324936220 | Aug 23 01:23:00 AM UTC 24 | Aug 23 01:24:19 AM UTC 24 | 707970253 ps | ||
| T896 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all_with_reset_error.2404598048 | Aug 23 01:23:09 AM UTC 24 | Aug 23 01:24:37 AM UTC 24 | 2529734689 ps | ||
| T897 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all_with_reset_error.2086259666 | Aug 23 01:22:46 AM UTC 24 | Aug 23 01:24:57 AM UTC 24 | 5472878612 ps | ||
| T898 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random_large_delays.761335673 | Aug 23 01:22:37 AM UTC 24 | Aug 23 01:25:10 AM UTC 24 | 70646149579 ps | ||
| T238 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_access_same_device_slow_rsp.2413643075 | Aug 23 01:21:02 AM UTC 24 | Aug 23 01:25:16 AM UTC 24 | 304296273109 ps | ||
| T135 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all_with_rand_reset.3729743170 | Aug 23 01:22:46 AM UTC 24 | Aug 23 01:25:28 AM UTC 24 | 6986669671 ps | ||
| T112 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_access_same_device_slow_rsp.3234195201 | Aug 23 01:23:04 AM UTC 24 | Aug 23 01:25:35 AM UTC 24 | 22867133157 ps | ||
| T899 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_access_same_device_slow_rsp.3132601725 | Aug 23 01:22:21 AM UTC 24 | Aug 23 01:25:38 AM UTC 24 | 34570949160 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_access_same_device_slow_rsp.3075154079 | Aug 23 01:20:10 AM UTC 24 | Aug 23 01:26:05 AM UTC 24 | 109208187908 ps | ||
| T900 | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_access_same_device_slow_rsp.3652888010 | Aug 23 01:22:43 AM UTC 24 | Aug 23 01:27:02 AM UTC 24 | 235126017023 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_error_and_unmapped_addr.3500125146 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 475353954 ps |
| CPU time | 4.97 seconds |
| Started | Aug 23 01:07:23 AM UTC 24 |
| Finished | Aug 23 01:07:29 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500125146 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_error_and_unmapped_addr.3500125146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_access_same_device_slow_rsp.2176567925 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 84533842720 ps |
| CPU time | 317.88 seconds |
| Started | Aug 23 01:11:00 AM UTC 24 |
| Finished | Aug 23 01:16:22 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176567925 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_access_same_device_slow_rsp.2176567925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_access_same_device_slow_rsp.1734217121 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 65861375111 ps |
| CPU time | 302.51 seconds |
| Started | Aug 23 01:08:48 AM UTC 24 |
| Finished | Aug 23 01:13:54 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734217121 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_access_same_device_slow_rsp.1734217121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_access_same_device_slow_rsp.2949897625 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 46023651490 ps |
| CPU time | 301.63 seconds |
| Started | Aug 23 01:07:29 AM UTC 24 |
| Finished | Aug 23 01:12:35 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949897625 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_access_same_device_slow_rsp.2949897625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_access_same_device_slow_rsp.494898188 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 84094724916 ps |
| CPU time | 342.22 seconds |
| Started | Aug 23 01:16:31 AM UTC 24 |
| Finished | Aug 23 01:22:17 AM UTC 24 |
| Peak memory | 219996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494898188 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_access_same_device_slow_rsp.494898188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_unmapped_addr.3576695038 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 19183389 ps |
| CPU time | 1.91 seconds |
| Started | Aug 23 01:07:23 AM UTC 24 |
| Finished | Aug 23 01:07:26 AM UTC 24 |
| Peak memory | 211248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576695038 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_unmapped_addr.3576695038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_stress_all_with_rand_reset.2118708808 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 2622612595 ps |
| CPU time | 42.45 seconds |
| Started | Aug 23 01:07:23 AM UTC 24 |
| Finished | Aug 23 01:08:07 AM UTC 24 |
| Peak memory | 216292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118708808 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_stress_all_with_rand_reset.2118708808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_stress_all_with_rand_reset.3500395301 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 329236207 ps |
| CPU time | 38.62 seconds |
| Started | Aug 23 01:08:09 AM UTC 24 |
| Finished | Aug 23 01:08:49 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500395301 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_stress_all_with_rand_reset.3500395301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_access_same_device_slow_rsp.350814439 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 46365343539 ps |
| CPU time | 156.03 seconds |
| Started | Aug 23 01:15:34 AM UTC 24 |
| Finished | Aug 23 01:18:13 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=350814439 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_access_same_device_slow_rsp.350814439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_random.65038530 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 537250246 ps |
| CPU time | 8.55 seconds |
| Started | Aug 23 01:07:19 AM UTC 24 |
| Finished | Aug 23 01:07:28 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=65038530 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_random.65038530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_random_large_delays.902697418 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 11075135003 ps |
| CPU time | 45.02 seconds |
| Started | Aug 23 01:07:20 AM UTC 24 |
| Finished | Aug 23 01:08:06 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=902697418 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_random_large_delays.902697418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_access_same_device_slow_rsp.3075154079 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 109208187908 ps |
| CPU time | 350.88 seconds |
| Started | Aug 23 01:20:10 AM UTC 24 |
| Finished | Aug 23 01:26:05 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075154079 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_access_same_device_slow_rsp.3075154079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_access_same_device.758758569 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 3652701326 ps |
| CPU time | 16.1 seconds |
| Started | Aug 23 01:08:47 AM UTC 24 |
| Finished | Aug 23 01:09:04 AM UTC 24 |
| Peak memory | 212452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758758569 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_access_same_device.758758569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_stress_all_with_reset_error.3567218349 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 3519406138 ps |
| CPU time | 95.08 seconds |
| Started | Aug 23 01:08:35 AM UTC 24 |
| Finished | Aug 23 01:10:12 AM UTC 24 |
| Peak memory | 216292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567218349 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_stress_all_with_reset_error.3567218349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_access_same_device_slow_rsp.563033266 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 94330005196 ps |
| CPU time | 195.33 seconds |
| Started | Aug 23 01:15:16 AM UTC 24 |
| Finished | Aug 23 01:18:34 AM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=563033266 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_access_same_device_slow_rsp.563033266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_stress_all.843627576 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 23625021642 ps |
| CPU time | 132.19 seconds |
| Started | Aug 23 01:08:33 AM UTC 24 |
| Finished | Aug 23 01:10:47 AM UTC 24 |
| Peak memory | 214496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=843627576 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_stress_all.843627576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_stress_all_with_reset_error.2192926441 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 1123867442 ps |
| CPU time | 137.73 seconds |
| Started | Aug 23 01:07:35 AM UTC 24 |
| Finished | Aug 23 01:09:56 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192926441 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_stress_all_with_reset_error.2192926441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_reset_error.3870790399 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 1122688504 ps |
| CPU time | 77.04 seconds |
| Started | Aug 23 01:18:22 AM UTC 24 |
| Finished | Aug 23 01:19:41 AM UTC 24 |
| Peak memory | 218464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870790399 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_stress_all_with_reset_error.3870790399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_stress_all_with_reset_error.436702937 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 434132452 ps |
| CPU time | 36.27 seconds |
| Started | Aug 23 01:07:24 AM UTC 24 |
| Finished | Aug 23 01:08:02 AM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=436702937 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_stress_all_with_reset_error.436702937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all.976448437 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 4185104048 ps |
| CPU time | 45.56 seconds |
| Started | Aug 23 01:19:57 AM UTC 24 |
| Finished | Aug 23 01:20:44 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=976448437 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_stress_all.976448437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_reset_error.2675502333 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 1069476953 ps |
| CPU time | 106.41 seconds |
| Started | Aug 23 01:20:54 AM UTC 24 |
| Finished | Aug 23 01:22:42 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675502333 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_stress_all_with_reset_error.2675502333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_access_same_device_slow_rsp.1411199833 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 283497897185 ps |
| CPU time | 385.37 seconds |
| Started | Aug 23 01:10:29 AM UTC 24 |
| Finished | Aug 23 01:16:59 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411199833 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_access_same_device_slow_rsp.1411199833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_random.644877237 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 2330100193 ps |
| CPU time | 9.95 seconds |
| Started | Aug 23 01:07:40 AM UTC 24 |
| Finished | Aug 23 01:07:51 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644877237 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_random.644877237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_random_zero_delays.4009266575 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 58527751 ps |
| CPU time | 10.01 seconds |
| Started | Aug 23 01:07:28 AM UTC 24 |
| Finished | Aug 23 01:07:39 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009266575 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_random_zero_delays.4009266575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_stress_all.1816244102 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 4807685295 ps |
| CPU time | 77.33 seconds |
| Started | Aug 23 01:08:53 AM UTC 24 |
| Finished | Aug 23 01:10:13 AM UTC 24 |
| Peak memory | 214436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816244102 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_stress_all.1816244102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all_with_rand_reset.1729050253 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 545009010 ps |
| CPU time | 63.02 seconds |
| Started | Aug 23 01:16:21 AM UTC 24 |
| Finished | Aug 23 01:17:26 AM UTC 24 |
| Peak memory | 216232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729050253 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_stress_all_with_rand_reset.1729050253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_random_slow_rsp.3080435759 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 21767519533 ps |
| CPU time | 125.07 seconds |
| Started | Aug 23 01:17:51 AM UTC 24 |
| Finished | Aug 23 01:19:58 AM UTC 24 |
| Peak memory | 212184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080435759 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_random_slow_rsp.3080435759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_access_same_device.4106800234 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 358814301 ps |
| CPU time | 4.7 seconds |
| Started | Aug 23 01:11:50 AM UTC 24 |
| Finished | Aug 23 01:11:56 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106800234 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_access_same_device.4106800234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_stress_all.2481006198 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 29666982245 ps |
| CPU time | 78.14 seconds |
| Started | Aug 23 01:09:31 AM UTC 24 |
| Finished | Aug 23 01:10:52 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481006198 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_stress_all.2481006198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all_with_reset_error.791881926 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 8669444504 ps |
| CPU time | 129.46 seconds |
| Started | Aug 23 01:16:22 AM UTC 24 |
| Finished | Aug 23 01:18:34 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=791881926 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_stress_all_with_reset_error.791881926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all.401525811 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 2446161696 ps |
| CPU time | 46.94 seconds |
| Started | Aug 23 01:12:24 AM UTC 24 |
| Finished | Aug 23 01:13:12 AM UTC 24 |
| Peak memory | 212432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401525811 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_stress_all.401525811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_access_same_device.436134974 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 838423641 ps |
| CPU time | 16.12 seconds |
| Started | Aug 23 01:07:22 AM UTC 24 |
| Finished | Aug 23 01:07:40 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=436134974 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_access_same_device.436134974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_access_same_device_slow_rsp.1310350020 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 60939343941 ps |
| CPU time | 83.67 seconds |
| Started | Aug 23 01:07:22 AM UTC 24 |
| Finished | Aug 23 01:08:48 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310350020 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_access_same_device_slow_rsp.1310350020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_error_random.4151493853 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 43121702 ps |
| CPU time | 3.53 seconds |
| Started | Aug 23 01:07:23 AM UTC 24 |
| Finished | Aug 23 01:07:27 AM UTC 24 |
| Peak memory | 212212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151493853 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_error_random.4151493853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_random_slow_rsp.1287965822 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 71605629873 ps |
| CPU time | 113.81 seconds |
| Started | Aug 23 01:07:22 AM UTC 24 |
| Finished | Aug 23 01:09:19 AM UTC 24 |
| Peak memory | 212356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287965822 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_random_slow_rsp.1287965822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_random_zero_delays.517225732 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 34359695 ps |
| CPU time | 1.93 seconds |
| Started | Aug 23 01:07:19 AM UTC 24 |
| Finished | Aug 23 01:07:22 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=517225732 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_random_zero_delays.517225732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_same_source.4097464582 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 765417275 ps |
| CPU time | 5.88 seconds |
| Started | Aug 23 01:07:22 AM UTC 24 |
| Finished | Aug 23 01:07:30 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097464582 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_same_source.4097464582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_smoke.3437748941 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 23735924 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 01:07:16 AM UTC 24 |
| Finished | Aug 23 01:07:18 AM UTC 24 |
| Peak memory | 211676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437748941 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_smoke.3437748941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_smoke_large_delays.851970196 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 2173087563 ps |
| CPU time | 14.75 seconds |
| Started | Aug 23 01:07:19 AM UTC 24 |
| Finished | Aug 23 01:07:35 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851970196 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_smoke_large_delays.851970196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_smoke_slow_rsp.3109509923 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 3511365401 ps |
| CPU time | 8.59 seconds |
| Started | Aug 23 01:07:19 AM UTC 24 |
| Finished | Aug 23 01:07:28 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109509923 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_smoke_slow_rsp.3109509923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_smoke_zero_delays.2121751291 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 10567948 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 01:07:19 AM UTC 24 |
| Finished | Aug 23 01:07:21 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121751291 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_smoke_zero_delays.2121751291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_stress_all.304784642 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 16546493391 ps |
| CPU time | 82.21 seconds |
| Started | Aug 23 01:07:23 AM UTC 24 |
| Finished | Aug 23 01:08:47 AM UTC 24 |
| Peak memory | 216288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=304784642 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_stress_all.304784642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/0.xbar_stress_all_with_error.1731227477 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 7742396841 ps |
| CPU time | 80.79 seconds |
| Started | Aug 23 01:07:23 AM UTC 24 |
| Finished | Aug 23 01:08:45 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731227477 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_stress_all_with_error.1731227477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/0.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_access_same_device.396695108 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 3291431606 ps |
| CPU time | 12.38 seconds |
| Started | Aug 23 01:07:29 AM UTC 24 |
| Finished | Aug 23 01:07:42 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396695108 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_access_same_device.396695108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_error_and_unmapped_addr.466636751 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 128290784 ps |
| CPU time | 3 seconds |
| Started | Aug 23 01:07:34 AM UTC 24 |
| Finished | Aug 23 01:07:38 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=466636751 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_error_and_unmapped_addr.466636751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_error_random.4109273089 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 1164653895 ps |
| CPU time | 4.23 seconds |
| Started | Aug 23 01:07:30 AM UTC 24 |
| Finished | Aug 23 01:07:36 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109273089 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_error_random.4109273089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_random.3236423851 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 2506242912 ps |
| CPU time | 13.39 seconds |
| Started | Aug 23 01:07:27 AM UTC 24 |
| Finished | Aug 23 01:07:41 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236423851 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_random.3236423851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_random_large_delays.3723952821 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 8349140087 ps |
| CPU time | 37.58 seconds |
| Started | Aug 23 01:07:28 AM UTC 24 |
| Finished | Aug 23 01:08:07 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723952821 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_random_large_delays.3723952821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_random_slow_rsp.2300185071 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 10812273948 ps |
| CPU time | 83.23 seconds |
| Started | Aug 23 01:07:28 AM UTC 24 |
| Finished | Aug 23 01:08:53 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300185071 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_random_slow_rsp.2300185071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_same_source.34138567 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 760839293 ps |
| CPU time | 5.05 seconds |
| Started | Aug 23 01:07:30 AM UTC 24 |
| Finished | Aug 23 01:07:36 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34138567 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_same_source.34138567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_smoke.2291232949 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 15900185 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 01:07:24 AM UTC 24 |
| Finished | Aug 23 01:07:27 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291232949 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_smoke.2291232949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_smoke_large_delays.1984456331 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 1248780569 ps |
| CPU time | 8.12 seconds |
| Started | Aug 23 01:07:24 AM UTC 24 |
| Finished | Aug 23 01:07:34 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984456331 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_smoke_large_delays.1984456331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_smoke_slow_rsp.3875893583 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 1263870735 ps |
| CPU time | 7.65 seconds |
| Started | Aug 23 01:07:24 AM UTC 24 |
| Finished | Aug 23 01:07:33 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875893583 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_smoke_slow_rsp.3875893583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_smoke_zero_delays.2586112702 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 13210824 ps |
| CPU time | 1.75 seconds |
| Started | Aug 23 01:07:24 AM UTC 24 |
| Finished | Aug 23 01:07:27 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586112702 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_smoke_zero_delays.2586112702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_stress_all.3287387489 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 2835906281 ps |
| CPU time | 42.76 seconds |
| Started | Aug 23 01:07:34 AM UTC 24 |
| Finished | Aug 23 01:08:19 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287387489 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_stress_all.3287387489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_stress_all_with_error.169310069 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 15927585223 ps |
| CPU time | 67.77 seconds |
| Started | Aug 23 01:07:35 AM UTC 24 |
| Finished | Aug 23 01:08:45 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169310069 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_stress_all_with_error.169310069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_stress_all_with_rand_reset.857961603 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 56254195 ps |
| CPU time | 20.53 seconds |
| Started | Aug 23 01:07:34 AM UTC 24 |
| Finished | Aug 23 01:07:56 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=857961603 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_stress_all_with_rand_reset.857961603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/1.xbar_unmapped_addr.3073526034 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 553279438 ps |
| CPU time | 8.08 seconds |
| Started | Aug 23 01:07:32 AM UTC 24 |
| Finished | Aug 23 01:07:42 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073526034 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_unmapped_addr.3073526034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/1.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_access_same_device.2044712478 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 1093980873 ps |
| CPU time | 13.99 seconds |
| Started | Aug 23 01:10:29 AM UTC 24 |
| Finished | Aug 23 01:10:44 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044712478 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_access_same_device.2044712478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_error_and_unmapped_addr.2662828732 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 452526370 ps |
| CPU time | 5.95 seconds |
| Started | Aug 23 01:10:40 AM UTC 24 |
| Finished | Aug 23 01:10:47 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662828732 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_error_and_unmapped_addr.2662828732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_error_random.2129380997 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 1207277885 ps |
| CPU time | 5.03 seconds |
| Started | Aug 23 01:10:32 AM UTC 24 |
| Finished | Aug 23 01:10:39 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129380997 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_error_random.2129380997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_random.3253079864 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 379234483 ps |
| CPU time | 3.71 seconds |
| Started | Aug 23 01:10:25 AM UTC 24 |
| Finished | Aug 23 01:10:29 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253079864 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_random.3253079864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_random_large_delays.1157295731 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 200532649658 ps |
| CPU time | 188.09 seconds |
| Started | Aug 23 01:10:26 AM UTC 24 |
| Finished | Aug 23 01:13:37 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157295731 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_random_large_delays.1157295731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_random_slow_rsp.657422270 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 22166751201 ps |
| CPU time | 116 seconds |
| Started | Aug 23 01:10:26 AM UTC 24 |
| Finished | Aug 23 01:12:24 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657422270 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_random_slow_rsp.657422270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_random_zero_delays.3644946436 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 10028066 ps |
| CPU time | 1.74 seconds |
| Started | Aug 23 01:10:26 AM UTC 24 |
| Finished | Aug 23 01:10:29 AM UTC 24 |
| Peak memory | 211176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644946436 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_random_zero_delays.3644946436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_same_source.1851072665 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 903744200 ps |
| CPU time | 14.16 seconds |
| Started | Aug 23 01:10:30 AM UTC 24 |
| Finished | Aug 23 01:10:46 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851072665 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_same_source.1851072665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_smoke.3556096821 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 235305285 ps |
| CPU time | 2.64 seconds |
| Started | Aug 23 01:10:21 AM UTC 24 |
| Finished | Aug 23 01:10:25 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556096821 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_smoke.3556096821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_smoke_large_delays.1283145876 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 1978896929 ps |
| CPU time | 16.15 seconds |
| Started | Aug 23 01:10:22 AM UTC 24 |
| Finished | Aug 23 01:10:40 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283145876 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_smoke_large_delays.1283145876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_smoke_slow_rsp.179439257 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 5264545256 ps |
| CPU time | 20.58 seconds |
| Started | Aug 23 01:10:23 AM UTC 24 |
| Finished | Aug 23 01:10:46 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179439257 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_smoke_slow_rsp.179439257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_smoke_zero_delays.951512005 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 8720374 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 01:10:22 AM UTC 24 |
| Finished | Aug 23 01:10:25 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951512005 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_smoke_zero_delays.951512005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_stress_all.4279512774 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 3671181771 ps |
| CPU time | 24.05 seconds |
| Started | Aug 23 01:10:41 AM UTC 24 |
| Finished | Aug 23 01:11:06 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279512774 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_stress_all.4279512774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_stress_all_with_error.1200382950 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 2156573672 ps |
| CPU time | 24.65 seconds |
| Started | Aug 23 01:10:45 AM UTC 24 |
| Finished | Aug 23 01:11:11 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200382950 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_stress_all_with_error.1200382950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_stress_all_with_rand_reset.2783031222 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 825102286 ps |
| CPU time | 155.37 seconds |
| Started | Aug 23 01:10:42 AM UTC 24 |
| Finished | Aug 23 01:13:20 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783031222 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_stress_all_with_rand_reset.2783031222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_stress_all_with_reset_error.1447505797 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 321559607 ps |
| CPU time | 47.32 seconds |
| Started | Aug 23 01:10:46 AM UTC 24 |
| Finished | Aug 23 01:11:35 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447505797 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_stress_all_with_reset_error.1447505797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/10.xbar_unmapped_addr.3130848229 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 403795300 ps |
| CPU time | 5.51 seconds |
| Started | Aug 23 01:10:40 AM UTC 24 |
| Finished | Aug 23 01:10:46 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130848229 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 10.xbar_unmapped_addr.3130848229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/10.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_access_same_device.3135774387 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 112846709 ps |
| CPU time | 15.19 seconds |
| Started | Aug 23 01:10:56 AM UTC 24 |
| Finished | Aug 23 01:11:13 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135774387 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_access_same_device.3135774387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_error_and_unmapped_addr.2987855344 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 3258869261 ps |
| CPU time | 11.41 seconds |
| Started | Aug 23 01:11:08 AM UTC 24 |
| Finished | Aug 23 01:11:20 AM UTC 24 |
| Peak memory | 212396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987855344 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_error_and_unmapped_addr.2987855344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_error_random.3099856172 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 37971116 ps |
| CPU time | 4.91 seconds |
| Started | Aug 23 01:11:06 AM UTC 24 |
| Finished | Aug 23 01:11:12 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099856172 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_error_random.3099856172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_random.1292154670 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 1041536637 ps |
| CPU time | 15.61 seconds |
| Started | Aug 23 01:10:49 AM UTC 24 |
| Finished | Aug 23 01:11:06 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292154670 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_random.1292154670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_random_large_delays.106253647 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 9920891113 ps |
| CPU time | 34.02 seconds |
| Started | Aug 23 01:10:51 AM UTC 24 |
| Finished | Aug 23 01:11:27 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=106253647 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_random_large_delays.106253647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_random_slow_rsp.483910455 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 14462715984 ps |
| CPU time | 120.74 seconds |
| Started | Aug 23 01:10:53 AM UTC 24 |
| Finished | Aug 23 01:12:56 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483910455 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_random_slow_rsp.483910455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_random_zero_delays.554120678 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 28641463 ps |
| CPU time | 4.09 seconds |
| Started | Aug 23 01:10:50 AM UTC 24 |
| Finished | Aug 23 01:10:55 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554120678 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_random_zero_delays.554120678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_same_source.3159166695 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 64248796 ps |
| CPU time | 2.75 seconds |
| Started | Aug 23 01:11:02 AM UTC 24 |
| Finished | Aug 23 01:11:06 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159166695 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_same_source.3159166695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_smoke.700507655 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 9905983 ps |
| CPU time | 1.79 seconds |
| Started | Aug 23 01:10:46 AM UTC 24 |
| Finished | Aug 23 01:10:49 AM UTC 24 |
| Peak memory | 211128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=700507655 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_smoke.700507655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_smoke_large_delays.3599131792 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 2952508746 ps |
| CPU time | 13.04 seconds |
| Started | Aug 23 01:10:47 AM UTC 24 |
| Finished | Aug 23 01:11:01 AM UTC 24 |
| Peak memory | 212184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599131792 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_smoke_large_delays.3599131792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_smoke_slow_rsp.290637268 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 3039909395 ps |
| CPU time | 20.71 seconds |
| Started | Aug 23 01:10:47 AM UTC 24 |
| Finished | Aug 23 01:11:09 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290637268 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_smoke_slow_rsp.290637268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_smoke_zero_delays.2728197289 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 17304244 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 01:10:47 AM UTC 24 |
| Finished | Aug 23 01:10:50 AM UTC 24 |
| Peak memory | 211184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728197289 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_smoke_zero_delays.2728197289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_stress_all.2809885439 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 147954956 ps |
| CPU time | 15.68 seconds |
| Started | Aug 23 01:11:10 AM UTC 24 |
| Finished | Aug 23 01:11:27 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809885439 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_stress_all.2809885439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_stress_all_with_error.1358923664 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 782049549 ps |
| CPU time | 40.8 seconds |
| Started | Aug 23 01:11:12 AM UTC 24 |
| Finished | Aug 23 01:11:54 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358923664 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_stress_all_with_error.1358923664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_stress_all_with_rand_reset.799057563 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 1169460339 ps |
| CPU time | 47.55 seconds |
| Started | Aug 23 01:11:11 AM UTC 24 |
| Finished | Aug 23 01:12:00 AM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=799057563 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_stress_all_with_rand_reset.799057563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_stress_all_with_reset_error.2055004560 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 1747029026 ps |
| CPU time | 85.04 seconds |
| Started | Aug 23 01:11:12 AM UTC 24 |
| Finished | Aug 23 01:12:39 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055004560 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_stress_all_with_reset_error.2055004560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/11.xbar_unmapped_addr.3274767604 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 120394171 ps |
| CPU time | 3.24 seconds |
| Started | Aug 23 01:11:07 AM UTC 24 |
| Finished | Aug 23 01:11:11 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274767604 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 11.xbar_unmapped_addr.3274767604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/11.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_access_same_device.1268052114 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 59043978 ps |
| CPU time | 9.79 seconds |
| Started | Aug 23 01:11:24 AM UTC 24 |
| Finished | Aug 23 01:11:35 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268052114 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_access_same_device.1268052114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_access_same_device_slow_rsp.3220011787 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 14061678883 ps |
| CPU time | 47.11 seconds |
| Started | Aug 23 01:11:27 AM UTC 24 |
| Finished | Aug 23 01:12:16 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220011787 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_access_same_device_slow_rsp.3220011787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_error_and_unmapped_addr.2235721898 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 147428774 ps |
| CPU time | 5.31 seconds |
| Started | Aug 23 01:11:31 AM UTC 24 |
| Finished | Aug 23 01:11:37 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235721898 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_error_and_unmapped_addr.2235721898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_error_random.341758906 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 813869756 ps |
| CPU time | 13.68 seconds |
| Started | Aug 23 01:11:29 AM UTC 24 |
| Finished | Aug 23 01:11:44 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=341758906 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_error_random.341758906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_random.2985656068 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 469418745 ps |
| CPU time | 5.7 seconds |
| Started | Aug 23 01:11:17 AM UTC 24 |
| Finished | Aug 23 01:11:23 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985656068 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_random.2985656068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_random_large_delays.2454176766 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 37886298859 ps |
| CPU time | 149.58 seconds |
| Started | Aug 23 01:11:22 AM UTC 24 |
| Finished | Aug 23 01:13:54 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454176766 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_random_large_delays.2454176766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_random_slow_rsp.213643642 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 1325999751 ps |
| CPU time | 8.84 seconds |
| Started | Aug 23 01:11:22 AM UTC 24 |
| Finished | Aug 23 01:11:32 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=213643642 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_random_slow_rsp.213643642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_random_zero_delays.4274715540 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 40959494 ps |
| CPU time | 6.51 seconds |
| Started | Aug 23 01:11:21 AM UTC 24 |
| Finished | Aug 23 01:11:28 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274715540 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_random_zero_delays.4274715540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_same_source.3978255974 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 1113818614 ps |
| CPU time | 13.82 seconds |
| Started | Aug 23 01:11:27 AM UTC 24 |
| Finished | Aug 23 01:11:42 AM UTC 24 |
| Peak memory | 212448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978255974 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_same_source.3978255974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_smoke.3692343186 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 105761304 ps |
| CPU time | 2.05 seconds |
| Started | Aug 23 01:11:13 AM UTC 24 |
| Finished | Aug 23 01:11:16 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3692343186 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_smoke.3692343186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_smoke_large_delays.2745422340 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 3148752869 ps |
| CPU time | 14.81 seconds |
| Started | Aug 23 01:11:15 AM UTC 24 |
| Finished | Aug 23 01:11:30 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2745422340 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_smoke_large_delays.2745422340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_smoke_slow_rsp.1903029820 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 1203843732 ps |
| CPU time | 12.01 seconds |
| Started | Aug 23 01:11:17 AM UTC 24 |
| Finished | Aug 23 01:11:30 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903029820 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_smoke_slow_rsp.1903029820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_smoke_zero_delays.1369685937 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 10748648 ps |
| CPU time | 1.71 seconds |
| Started | Aug 23 01:11:13 AM UTC 24 |
| Finished | Aug 23 01:11:16 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369685937 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_smoke_zero_delays.1369685937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all.2674811683 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 11487876377 ps |
| CPU time | 72.68 seconds |
| Started | Aug 23 01:11:32 AM UTC 24 |
| Finished | Aug 23 01:12:46 AM UTC 24 |
| Peak memory | 214308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674811683 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_stress_all.2674811683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all_with_error.3742368934 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 374010404 ps |
| CPU time | 7.82 seconds |
| Started | Aug 23 01:11:36 AM UTC 24 |
| Finished | Aug 23 01:11:45 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742368934 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_stress_all_with_error.3742368934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all_with_rand_reset.2331971443 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 190506014 ps |
| CPU time | 40.41 seconds |
| Started | Aug 23 01:11:33 AM UTC 24 |
| Finished | Aug 23 01:12:15 AM UTC 24 |
| Peak memory | 214376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331971443 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_stress_all_with_rand_reset.2331971443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_stress_all_with_reset_error.3941741421 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 3085291621 ps |
| CPU time | 64.27 seconds |
| Started | Aug 23 01:11:36 AM UTC 24 |
| Finished | Aug 23 01:12:42 AM UTC 24 |
| Peak memory | 214236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941741421 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_stress_all_with_reset_error.3941741421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/12.xbar_unmapped_addr.1138187418 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 115616494 ps |
| CPU time | 6.61 seconds |
| Started | Aug 23 01:11:31 AM UTC 24 |
| Finished | Aug 23 01:11:38 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138187418 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_unmapped_addr.1138187418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/12.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_access_same_device_slow_rsp.1519848495 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 194217325103 ps |
| CPU time | 172.01 seconds |
| Started | Aug 23 01:11:52 AM UTC 24 |
| Finished | Aug 23 01:14:46 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519848495 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_access_same_device_slow_rsp.1519848495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_error_and_unmapped_addr.871380316 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 320659836 ps |
| CPU time | 8.7 seconds |
| Started | Aug 23 01:11:55 AM UTC 24 |
| Finished | Aug 23 01:12:05 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=871380316 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_error_and_unmapped_addr.871380316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_error_random.419262180 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 935105298 ps |
| CPU time | 5.39 seconds |
| Started | Aug 23 01:11:53 AM UTC 24 |
| Finished | Aug 23 01:11:59 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=419262180 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_error_random.419262180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_random.626790579 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 74672868 ps |
| CPU time | 8.2 seconds |
| Started | Aug 23 01:11:43 AM UTC 24 |
| Finished | Aug 23 01:11:52 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626790579 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_random.626790579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_random_large_delays.2870306501 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 32791949382 ps |
| CPU time | 116 seconds |
| Started | Aug 23 01:11:46 AM UTC 24 |
| Finished | Aug 23 01:13:44 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870306501 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_random_large_delays.2870306501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_random_slow_rsp.1029770447 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 15912530027 ps |
| CPU time | 58.16 seconds |
| Started | Aug 23 01:11:47 AM UTC 24 |
| Finished | Aug 23 01:12:47 AM UTC 24 |
| Peak memory | 212268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029770447 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_random_slow_rsp.1029770447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_random_zero_delays.2178689519 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 25288938 ps |
| CPU time | 4.41 seconds |
| Started | Aug 23 01:11:45 AM UTC 24 |
| Finished | Aug 23 01:11:51 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178689519 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_random_zero_delays.2178689519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_same_source.1178995241 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 899798507 ps |
| CPU time | 16.69 seconds |
| Started | Aug 23 01:11:53 AM UTC 24 |
| Finished | Aug 23 01:12:11 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178995241 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_same_source.1178995241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_smoke.1312240178 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 55029610 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 01:11:37 AM UTC 24 |
| Finished | Aug 23 01:11:40 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312240178 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_smoke.1312240178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_smoke_large_delays.217794004 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 4154430841 ps |
| CPU time | 16.08 seconds |
| Started | Aug 23 01:11:41 AM UTC 24 |
| Finished | Aug 23 01:11:58 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=217794004 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_smoke_large_delays.217794004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_smoke_slow_rsp.3635816882 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 744853587 ps |
| CPU time | 7.9 seconds |
| Started | Aug 23 01:11:43 AM UTC 24 |
| Finished | Aug 23 01:11:52 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635816882 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_smoke_slow_rsp.3635816882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_smoke_zero_delays.3118538185 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 10747462 ps |
| CPU time | 1.76 seconds |
| Started | Aug 23 01:11:39 AM UTC 24 |
| Finished | Aug 23 01:11:42 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118538185 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_smoke_zero_delays.3118538185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_stress_all.1736689471 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 274056432 ps |
| CPU time | 19.22 seconds |
| Started | Aug 23 01:11:57 AM UTC 24 |
| Finished | Aug 23 01:12:17 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736689471 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_stress_all.1736689471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_stress_all_with_error.3432679856 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 3563326986 ps |
| CPU time | 45.31 seconds |
| Started | Aug 23 01:12:00 AM UTC 24 |
| Finished | Aug 23 01:12:47 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432679856 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_stress_all_with_error.3432679856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_stress_all_with_rand_reset.1318767776 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 593382324 ps |
| CPU time | 82.61 seconds |
| Started | Aug 23 01:11:59 AM UTC 24 |
| Finished | Aug 23 01:13:24 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318767776 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_stress_all_with_rand_reset.1318767776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_stress_all_with_reset_error.2103742573 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 611322585 ps |
| CPU time | 43 seconds |
| Started | Aug 23 01:12:01 AM UTC 24 |
| Finished | Aug 23 01:12:46 AM UTC 24 |
| Peak memory | 214168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103742573 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_stress_all_with_reset_error.2103742573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/13.xbar_unmapped_addr.2039746467 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 686697628 ps |
| CPU time | 10.62 seconds |
| Started | Aug 23 01:11:53 AM UTC 24 |
| Finished | Aug 23 01:12:05 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039746467 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 13.xbar_unmapped_addr.2039746467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/13.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_access_same_device.1595746462 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 499576021 ps |
| CPU time | 5.66 seconds |
| Started | Aug 23 01:12:16 AM UTC 24 |
| Finished | Aug 23 01:12:23 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595746462 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_access_same_device.1595746462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_access_same_device_slow_rsp.1918703941 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 42318515362 ps |
| CPU time | 263.8 seconds |
| Started | Aug 23 01:12:17 AM UTC 24 |
| Finished | Aug 23 01:16:45 AM UTC 24 |
| Peak memory | 216488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918703941 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_access_same_device_slow_rsp.1918703941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_error_and_unmapped_addr.494840242 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 93024047 ps |
| CPU time | 4.27 seconds |
| Started | Aug 23 01:12:22 AM UTC 24 |
| Finished | Aug 23 01:12:28 AM UTC 24 |
| Peak memory | 212264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494840242 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_error_and_unmapped_addr.494840242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_error_random.1511389881 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 80830194 ps |
| CPU time | 3.87 seconds |
| Started | Aug 23 01:12:18 AM UTC 24 |
| Finished | Aug 23 01:12:24 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511389881 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_error_random.1511389881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_random.2663364484 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 399887227 ps |
| CPU time | 9.73 seconds |
| Started | Aug 23 01:12:10 AM UTC 24 |
| Finished | Aug 23 01:12:21 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663364484 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_random.2663364484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_random_large_delays.1295556449 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 17939163514 ps |
| CPU time | 61.97 seconds |
| Started | Aug 23 01:12:12 AM UTC 24 |
| Finished | Aug 23 01:13:15 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1295556449 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_random_large_delays.1295556449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_random_slow_rsp.3649784978 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 23404879626 ps |
| CPU time | 90.44 seconds |
| Started | Aug 23 01:12:16 AM UTC 24 |
| Finished | Aug 23 01:13:48 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649784978 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_random_slow_rsp.3649784978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_random_zero_delays.1566165403 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 35929697 ps |
| CPU time | 2.79 seconds |
| Started | Aug 23 01:12:12 AM UTC 24 |
| Finished | Aug 23 01:12:16 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566165403 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_random_zero_delays.1566165403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_same_source.3628380959 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 814573439 ps |
| CPU time | 5.18 seconds |
| Started | Aug 23 01:12:17 AM UTC 24 |
| Finished | Aug 23 01:12:24 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628380959 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_same_source.3628380959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_smoke.3655913379 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 9753576 ps |
| CPU time | 1.73 seconds |
| Started | Aug 23 01:12:03 AM UTC 24 |
| Finished | Aug 23 01:12:05 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655913379 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_smoke.3655913379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_smoke_large_delays.2170034945 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 2468264879 ps |
| CPU time | 7.82 seconds |
| Started | Aug 23 01:12:06 AM UTC 24 |
| Finished | Aug 23 01:12:15 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170034945 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_smoke_large_delays.2170034945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_smoke_slow_rsp.3451079783 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 2120524638 ps |
| CPU time | 14.18 seconds |
| Started | Aug 23 01:12:06 AM UTC 24 |
| Finished | Aug 23 01:12:21 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451079783 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_smoke_slow_rsp.3451079783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_smoke_zero_delays.3924294123 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 10047836 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 01:12:06 AM UTC 24 |
| Finished | Aug 23 01:12:09 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924294123 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_smoke_zero_delays.3924294123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all_with_error.2083158741 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 3982593384 ps |
| CPU time | 56.61 seconds |
| Started | Aug 23 01:12:25 AM UTC 24 |
| Finished | Aug 23 01:13:23 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083158741 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_stress_all_with_error.2083158741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all_with_rand_reset.4123895496 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 905979639 ps |
| CPU time | 108.12 seconds |
| Started | Aug 23 01:12:24 AM UTC 24 |
| Finished | Aug 23 01:14:14 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123895496 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_stress_all_with_rand_reset.4123895496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all_with_reset_error.624234 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 330461702 ps |
| CPU time | 32.22 seconds |
| Started | Aug 23 01:12:25 AM UTC 24 |
| Finished | Aug 23 01:12:58 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=624234 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM_T EST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_stress_all_with_reset_error.624234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/14.xbar_unmapped_addr.571011250 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 2893560822 ps |
| CPU time | 13.79 seconds |
| Started | Aug 23 01:12:21 AM UTC 24 |
| Finished | Aug 23 01:12:36 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=571011250 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 14.xbar_unmapped_addr.571011250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/14.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_access_same_device.4044682764 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 3324704518 ps |
| CPU time | 11.38 seconds |
| Started | Aug 23 01:12:43 AM UTC 24 |
| Finished | Aug 23 01:12:56 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044682764 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_access_same_device.4044682764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_access_same_device_slow_rsp.1866304549 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 12265150394 ps |
| CPU time | 58.76 seconds |
| Started | Aug 23 01:12:46 AM UTC 24 |
| Finished | Aug 23 01:13:47 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866304549 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_access_same_device_slow_rsp.1866304549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_error_and_unmapped_addr.4157367477 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 18903143 ps |
| CPU time | 2.08 seconds |
| Started | Aug 23 01:12:48 AM UTC 24 |
| Finished | Aug 23 01:12:51 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157367477 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_error_and_unmapped_addr.4157367477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_error_random.3937197802 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 37499788 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 01:12:48 AM UTC 24 |
| Finished | Aug 23 01:12:51 AM UTC 24 |
| Peak memory | 211156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937197802 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_error_random.3937197802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_random.122130263 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 1371476199 ps |
| CPU time | 15.22 seconds |
| Started | Aug 23 01:12:35 AM UTC 24 |
| Finished | Aug 23 01:12:52 AM UTC 24 |
| Peak memory | 212252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122130263 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_random.122130263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_random_large_delays.4041043003 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 22206519256 ps |
| CPU time | 63.35 seconds |
| Started | Aug 23 01:12:40 AM UTC 24 |
| Finished | Aug 23 01:13:45 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041043003 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_random_large_delays.4041043003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_random_slow_rsp.344053989 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 28790382298 ps |
| CPU time | 97.96 seconds |
| Started | Aug 23 01:12:43 AM UTC 24 |
| Finished | Aug 23 01:14:23 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=344053989 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_random_slow_rsp.344053989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_random_zero_delays.1988727644 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 28802854 ps |
| CPU time | 3.41 seconds |
| Started | Aug 23 01:12:38 AM UTC 24 |
| Finished | Aug 23 01:12:42 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988727644 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_random_zero_delays.1988727644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_same_source.3384940808 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 112037714 ps |
| CPU time | 6.1 seconds |
| Started | Aug 23 01:12:48 AM UTC 24 |
| Finished | Aug 23 01:12:55 AM UTC 24 |
| Peak memory | 212264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384940808 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_same_source.3384940808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_smoke.2543783124 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 282303149 ps |
| CPU time | 1.89 seconds |
| Started | Aug 23 01:12:25 AM UTC 24 |
| Finished | Aug 23 01:12:28 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543783124 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_smoke.2543783124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_smoke_large_delays.3824162685 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 2406594033 ps |
| CPU time | 20.62 seconds |
| Started | Aug 23 01:12:29 AM UTC 24 |
| Finished | Aug 23 01:12:51 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824162685 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_smoke_large_delays.3824162685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_smoke_slow_rsp.2776010726 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 1266076356 ps |
| CPU time | 12.4 seconds |
| Started | Aug 23 01:12:32 AM UTC 24 |
| Finished | Aug 23 01:12:46 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776010726 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_smoke_slow_rsp.2776010726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_smoke_zero_delays.2813355895 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 16153653 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 01:12:29 AM UTC 24 |
| Finished | Aug 23 01:12:32 AM UTC 24 |
| Peak memory | 211184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813355895 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_smoke_zero_delays.2813355895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all.3740168755 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 1181865936 ps |
| CPU time | 17.11 seconds |
| Started | Aug 23 01:12:48 AM UTC 24 |
| Finished | Aug 23 01:13:07 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740168755 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_stress_all.3740168755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all_with_error.3584442847 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 3419490551 ps |
| CPU time | 21.91 seconds |
| Started | Aug 23 01:12:52 AM UTC 24 |
| Finished | Aug 23 01:13:15 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584442847 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_stress_all_with_error.3584442847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all_with_rand_reset.1072305261 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 182829372 ps |
| CPU time | 28.06 seconds |
| Started | Aug 23 01:12:52 AM UTC 24 |
| Finished | Aug 23 01:13:21 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072305261 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_stress_all_with_rand_reset.1072305261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_stress_all_with_reset_error.969640871 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 2063557646 ps |
| CPU time | 71.39 seconds |
| Started | Aug 23 01:12:53 AM UTC 24 |
| Finished | Aug 23 01:14:06 AM UTC 24 |
| Peak memory | 216492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969640871 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_stress_all_with_reset_error.969640871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/15.xbar_unmapped_addr.2908848257 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 167579116 ps |
| CPU time | 5.91 seconds |
| Started | Aug 23 01:12:48 AM UTC 24 |
| Finished | Aug 23 01:12:55 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908848257 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 15.xbar_unmapped_addr.2908848257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/15.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_access_same_device.3539603043 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 55007169 ps |
| CPU time | 4.51 seconds |
| Started | Aug 23 01:13:01 AM UTC 24 |
| Finished | Aug 23 01:13:07 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539603043 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_access_same_device.3539603043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_access_same_device_slow_rsp.2438456979 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 23637614399 ps |
| CPU time | 162.9 seconds |
| Started | Aug 23 01:13:02 AM UTC 24 |
| Finished | Aug 23 01:15:48 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438456979 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_access_same_device_slow_rsp.2438456979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_error_and_unmapped_addr.1197490239 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 96475345 ps |
| CPU time | 4.06 seconds |
| Started | Aug 23 01:13:08 AM UTC 24 |
| Finished | Aug 23 01:13:13 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197490239 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_error_and_unmapped_addr.1197490239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_error_random.645482088 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 1565374140 ps |
| CPU time | 8.31 seconds |
| Started | Aug 23 01:13:07 AM UTC 24 |
| Finished | Aug 23 01:13:16 AM UTC 24 |
| Peak memory | 212260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=645482088 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_error_random.645482088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_random.1786855347 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 329820636 ps |
| CPU time | 7.11 seconds |
| Started | Aug 23 01:12:57 AM UTC 24 |
| Finished | Aug 23 01:13:05 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786855347 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_random.1786855347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_random_large_delays.117869235 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 37784651136 ps |
| CPU time | 103.76 seconds |
| Started | Aug 23 01:12:59 AM UTC 24 |
| Finished | Aug 23 01:14:45 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117869235 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_random_large_delays.117869235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_random_slow_rsp.2490537751 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 1527798970 ps |
| CPU time | 15.84 seconds |
| Started | Aug 23 01:13:00 AM UTC 24 |
| Finished | Aug 23 01:13:17 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490537751 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_random_slow_rsp.2490537751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_random_zero_delays.415261661 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 74659389 ps |
| CPU time | 2.11 seconds |
| Started | Aug 23 01:12:58 AM UTC 24 |
| Finished | Aug 23 01:13:01 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=415261661 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_random_zero_delays.415261661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_same_source.2832864245 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 1361777698 ps |
| CPU time | 11.12 seconds |
| Started | Aug 23 01:13:06 AM UTC 24 |
| Finished | Aug 23 01:13:18 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832864245 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_same_source.2832864245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_smoke.910890903 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 14862282 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 01:12:53 AM UTC 24 |
| Finished | Aug 23 01:12:56 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=910890903 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_smoke.910890903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_smoke_large_delays.3823942533 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 3569574196 ps |
| CPU time | 13.05 seconds |
| Started | Aug 23 01:12:57 AM UTC 24 |
| Finished | Aug 23 01:13:11 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823942533 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_smoke_large_delays.3823942533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_smoke_slow_rsp.3743868181 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 2057106012 ps |
| CPU time | 8.15 seconds |
| Started | Aug 23 01:12:57 AM UTC 24 |
| Finished | Aug 23 01:13:06 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743868181 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_smoke_slow_rsp.3743868181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_smoke_zero_delays.3473149735 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 8936847 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 01:12:56 AM UTC 24 |
| Finished | Aug 23 01:12:59 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473149735 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_smoke_zero_delays.3473149735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all.1995823166 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 575504977 ps |
| CPU time | 9.59 seconds |
| Started | Aug 23 01:13:11 AM UTC 24 |
| Finished | Aug 23 01:13:22 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1995823166 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_stress_all.1995823166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all_with_error.3414582469 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 283417971 ps |
| CPU time | 15.06 seconds |
| Started | Aug 23 01:13:13 AM UTC 24 |
| Finished | Aug 23 01:13:29 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414582469 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_stress_all_with_error.3414582469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all_with_rand_reset.789501885 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 1901995275 ps |
| CPU time | 82.2 seconds |
| Started | Aug 23 01:13:11 AM UTC 24 |
| Finished | Aug 23 01:14:36 AM UTC 24 |
| Peak memory | 216224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789501885 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_stress_all_with_rand_reset.789501885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_stress_all_with_reset_error.2399752205 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 5856055375 ps |
| CPU time | 121.65 seconds |
| Started | Aug 23 01:13:14 AM UTC 24 |
| Finished | Aug 23 01:15:18 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399752205 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_stress_all_with_reset_error.2399752205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/16.xbar_unmapped_addr.835442476 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 8748017 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 01:13:08 AM UTC 24 |
| Finished | Aug 23 01:13:11 AM UTC 24 |
| Peak memory | 211228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=835442476 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 16.xbar_unmapped_addr.835442476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/16.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_access_same_device.346485498 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 1169095126 ps |
| CPU time | 12.53 seconds |
| Started | Aug 23 01:13:21 AM UTC 24 |
| Finished | Aug 23 01:13:35 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346485498 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_access_same_device.346485498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_access_same_device_slow_rsp.457205680 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 2872982914 ps |
| CPU time | 16.11 seconds |
| Started | Aug 23 01:13:21 AM UTC 24 |
| Finished | Aug 23 01:13:39 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=457205680 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_access_same_device_slow_rsp.457205680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_error_and_unmapped_addr.2881663229 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 41427620 ps |
| CPU time | 2.79 seconds |
| Started | Aug 23 01:13:25 AM UTC 24 |
| Finished | Aug 23 01:13:29 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881663229 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_error_and_unmapped_addr.2881663229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_error_random.1155339898 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 105156700 ps |
| CPU time | 2.45 seconds |
| Started | Aug 23 01:13:24 AM UTC 24 |
| Finished | Aug 23 01:13:27 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155339898 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_error_random.1155339898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_random.2221907048 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 42275442 ps |
| CPU time | 2.83 seconds |
| Started | Aug 23 01:13:19 AM UTC 24 |
| Finished | Aug 23 01:13:22 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221907048 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_random.2221907048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_random_large_delays.2244112425 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 141957127120 ps |
| CPU time | 133.22 seconds |
| Started | Aug 23 01:13:20 AM UTC 24 |
| Finished | Aug 23 01:15:35 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244112425 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_random_large_delays.2244112425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_random_slow_rsp.704393826 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 19497709170 ps |
| CPU time | 94.33 seconds |
| Started | Aug 23 01:13:20 AM UTC 24 |
| Finished | Aug 23 01:14:56 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=704393826 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_random_slow_rsp.704393826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_random_zero_delays.3098948045 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 49614073 ps |
| CPU time | 5.55 seconds |
| Started | Aug 23 01:13:19 AM UTC 24 |
| Finished | Aug 23 01:13:25 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098948045 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_random_zero_delays.3098948045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_same_source.1949045711 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 32905173 ps |
| CPU time | 3.58 seconds |
| Started | Aug 23 01:13:23 AM UTC 24 |
| Finished | Aug 23 01:13:27 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949045711 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_same_source.1949045711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_smoke.1222723760 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 9728070 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 01:13:16 AM UTC 24 |
| Finished | Aug 23 01:13:18 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222723760 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_smoke.1222723760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_smoke_large_delays.3911349364 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 14890489421 ps |
| CPU time | 11.48 seconds |
| Started | Aug 23 01:13:17 AM UTC 24 |
| Finished | Aug 23 01:13:30 AM UTC 24 |
| Peak memory | 212256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911349364 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_smoke_large_delays.3911349364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_smoke_slow_rsp.1559033907 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 784445887 ps |
| CPU time | 6.62 seconds |
| Started | Aug 23 01:13:19 AM UTC 24 |
| Finished | Aug 23 01:13:26 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559033907 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_smoke_slow_rsp.1559033907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_smoke_zero_delays.2442742717 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 9124694 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 01:13:16 AM UTC 24 |
| Finished | Aug 23 01:13:18 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442742717 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_smoke_zero_delays.2442742717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all.1840979063 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 729762193 ps |
| CPU time | 36.37 seconds |
| Started | Aug 23 01:13:26 AM UTC 24 |
| Finished | Aug 23 01:14:04 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840979063 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_stress_all.1840979063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_error.2617119727 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 260562191 ps |
| CPU time | 24.03 seconds |
| Started | Aug 23 01:13:28 AM UTC 24 |
| Finished | Aug 23 01:13:54 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617119727 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_stress_all_with_error.2617119727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_rand_reset.2339185080 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 640550246 ps |
| CPU time | 83.32 seconds |
| Started | Aug 23 01:13:27 AM UTC 24 |
| Finished | Aug 23 01:14:52 AM UTC 24 |
| Peak memory | 216424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339185080 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_stress_all_with_rand_reset.2339185080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_stress_all_with_reset_error.2625247928 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 104188436 ps |
| CPU time | 8.46 seconds |
| Started | Aug 23 01:13:29 AM UTC 24 |
| Finished | Aug 23 01:13:38 AM UTC 24 |
| Peak memory | 212448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625247928 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_stress_all_with_reset_error.2625247928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/17.xbar_unmapped_addr.840304315 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 43760225 ps |
| CPU time | 2.64 seconds |
| Started | Aug 23 01:13:24 AM UTC 24 |
| Finished | Aug 23 01:13:28 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=840304315 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_unmapped_addr.840304315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/17.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_access_same_device.920082293 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 70122453 ps |
| CPU time | 8.93 seconds |
| Started | Aug 23 01:13:38 AM UTC 24 |
| Finished | Aug 23 01:13:48 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920082293 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_access_same_device.920082293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_access_same_device_slow_rsp.2097964221 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 27570798087 ps |
| CPU time | 117.67 seconds |
| Started | Aug 23 01:13:39 AM UTC 24 |
| Finished | Aug 23 01:15:38 AM UTC 24 |
| Peak memory | 214440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097964221 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_access_same_device_slow_rsp.2097964221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_error_and_unmapped_addr.2217152276 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 2763169911 ps |
| CPU time | 8.71 seconds |
| Started | Aug 23 01:13:42 AM UTC 24 |
| Finished | Aug 23 01:13:52 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217152276 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_error_and_unmapped_addr.2217152276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_error_random.2877678323 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 1087210949 ps |
| CPU time | 3.37 seconds |
| Started | Aug 23 01:13:41 AM UTC 24 |
| Finished | Aug 23 01:13:46 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877678323 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_error_random.2877678323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_random.1056701898 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 632172975 ps |
| CPU time | 6.89 seconds |
| Started | Aug 23 01:13:32 AM UTC 24 |
| Finished | Aug 23 01:13:40 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056701898 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_random.1056701898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_random_large_delays.2923653059 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 50281225758 ps |
| CPU time | 87.98 seconds |
| Started | Aug 23 01:13:35 AM UTC 24 |
| Finished | Aug 23 01:15:05 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923653059 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_random_large_delays.2923653059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_random_slow_rsp.2221269405 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 16306521871 ps |
| CPU time | 88.65 seconds |
| Started | Aug 23 01:13:38 AM UTC 24 |
| Finished | Aug 23 01:15:08 AM UTC 24 |
| Peak memory | 212396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221269405 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_random_slow_rsp.2221269405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_random_zero_delays.1690643856 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 38538228 ps |
| CPU time | 2.09 seconds |
| Started | Aug 23 01:13:33 AM UTC 24 |
| Finished | Aug 23 01:13:36 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690643856 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_random_zero_delays.1690643856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_same_source.1567880655 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 25974649 ps |
| CPU time | 2.71 seconds |
| Started | Aug 23 01:13:41 AM UTC 24 |
| Finished | Aug 23 01:13:45 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567880655 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_same_source.1567880655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke.1593333810 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 376883534 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 01:13:29 AM UTC 24 |
| Finished | Aug 23 01:13:31 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593333810 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_smoke.1593333810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke_large_delays.4049484777 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 1603769366 ps |
| CPU time | 7.91 seconds |
| Started | Aug 23 01:13:30 AM UTC 24 |
| Finished | Aug 23 01:13:39 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049484777 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_smoke_large_delays.4049484777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke_slow_rsp.676898325 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 9964087580 ps |
| CPU time | 8.42 seconds |
| Started | Aug 23 01:13:31 AM UTC 24 |
| Finished | Aug 23 01:13:41 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676898325 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_smoke_slow_rsp.676898325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_smoke_zero_delays.3443026951 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 8881524 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 01:13:30 AM UTC 24 |
| Finished | Aug 23 01:13:32 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443026951 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_smoke_zero_delays.3443026951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all.3646586448 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 25910111140 ps |
| CPU time | 58.05 seconds |
| Started | Aug 23 01:13:47 AM UTC 24 |
| Finished | Aug 23 01:14:46 AM UTC 24 |
| Peak memory | 214436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646586448 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_stress_all.3646586448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_error.1247586027 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 2846583588 ps |
| CPU time | 39 seconds |
| Started | Aug 23 01:13:47 AM UTC 24 |
| Finished | Aug 23 01:14:27 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247586027 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_stress_all_with_error.1247586027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_rand_reset.2722127080 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 127225350 ps |
| CPU time | 9.69 seconds |
| Started | Aug 23 01:13:47 AM UTC 24 |
| Finished | Aug 23 01:13:57 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722127080 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_stress_all_with_rand_reset.2722127080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_reset_error.3884843267 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 8569172468 ps |
| CPU time | 43.92 seconds |
| Started | Aug 23 01:13:47 AM UTC 24 |
| Finished | Aug 23 01:14:32 AM UTC 24 |
| Peak memory | 214432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884843267 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_stress_all_with_reset_error.3884843267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/18.xbar_unmapped_addr.2807363259 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 215500931 ps |
| CPU time | 4.05 seconds |
| Started | Aug 23 01:13:42 AM UTC 24 |
| Finished | Aug 23 01:13:47 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807363259 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 18.xbar_unmapped_addr.2807363259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/18.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_access_same_device.631828362 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 568438079 ps |
| CPU time | 10.92 seconds |
| Started | Aug 23 01:13:56 AM UTC 24 |
| Finished | Aug 23 01:14:08 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=631828362 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_access_same_device.631828362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_access_same_device_slow_rsp.1347331406 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 22917818570 ps |
| CPU time | 60.64 seconds |
| Started | Aug 23 01:13:56 AM UTC 24 |
| Finished | Aug 23 01:14:58 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347331406 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_access_same_device_slow_rsp.1347331406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_error_and_unmapped_addr.289759608 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 124064341 ps |
| CPU time | 2.58 seconds |
| Started | Aug 23 01:14:04 AM UTC 24 |
| Finished | Aug 23 01:14:07 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289759608 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_error_and_unmapped_addr.289759608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_error_random.159168981 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 143873659 ps |
| CPU time | 2.44 seconds |
| Started | Aug 23 01:14:00 AM UTC 24 |
| Finished | Aug 23 01:14:04 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=159168981 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_error_random.159168981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_random.1554318921 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 1097169738 ps |
| CPU time | 10.29 seconds |
| Started | Aug 23 01:13:53 AM UTC 24 |
| Finished | Aug 23 01:14:05 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554318921 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_random.1554318921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_random_large_delays.2210602288 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 24564663676 ps |
| CPU time | 19.66 seconds |
| Started | Aug 23 01:13:53 AM UTC 24 |
| Finished | Aug 23 01:14:14 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210602288 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_random_large_delays.2210602288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_random_slow_rsp.1704185478 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 13164996037 ps |
| CPU time | 24.28 seconds |
| Started | Aug 23 01:13:56 AM UTC 24 |
| Finished | Aug 23 01:14:22 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704185478 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_random_slow_rsp.1704185478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_random_zero_delays.3826888168 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 48067194 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 01:13:53 AM UTC 24 |
| Finished | Aug 23 01:13:56 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826888168 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_random_zero_delays.3826888168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_same_source.1089363953 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 572740995 ps |
| CPU time | 5.19 seconds |
| Started | Aug 23 01:13:58 AM UTC 24 |
| Finished | Aug 23 01:14:05 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089363953 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_same_source.1089363953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke.1653857427 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 10324632 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 01:13:49 AM UTC 24 |
| Finished | Aug 23 01:13:51 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653857427 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_smoke.1653857427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke_large_delays.1973919877 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 2746822173 ps |
| CPU time | 7.6 seconds |
| Started | Aug 23 01:13:49 AM UTC 24 |
| Finished | Aug 23 01:13:58 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973919877 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_smoke_large_delays.1973919877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke_slow_rsp.4268314723 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 2736283757 ps |
| CPU time | 12.04 seconds |
| Started | Aug 23 01:13:49 AM UTC 24 |
| Finished | Aug 23 01:14:02 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268314723 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_smoke_slow_rsp.4268314723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_smoke_zero_delays.2762092838 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 9190301 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 01:13:49 AM UTC 24 |
| Finished | Aug 23 01:13:51 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762092838 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_smoke_zero_delays.2762092838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all.3609077158 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 302978449 ps |
| CPU time | 30.9 seconds |
| Started | Aug 23 01:14:06 AM UTC 24 |
| Finished | Aug 23 01:14:38 AM UTC 24 |
| Peak memory | 214096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609077158 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_stress_all.3609077158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_error.2484036111 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 7195806065 ps |
| CPU time | 41.03 seconds |
| Started | Aug 23 01:14:06 AM UTC 24 |
| Finished | Aug 23 01:14:49 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484036111 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_stress_all_with_error.2484036111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_rand_reset.3162141660 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 1705389796 ps |
| CPU time | 67.07 seconds |
| Started | Aug 23 01:14:06 AM UTC 24 |
| Finished | Aug 23 01:15:15 AM UTC 24 |
| Peak memory | 214400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162141660 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_stress_all_with_rand_reset.3162141660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_reset_error.3936217795 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 1286579567 ps |
| CPU time | 45.56 seconds |
| Started | Aug 23 01:14:06 AM UTC 24 |
| Finished | Aug 23 01:14:53 AM UTC 24 |
| Peak memory | 214184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936217795 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_stress_all_with_reset_error.3936217795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/19.xbar_unmapped_addr.1112307888 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 999797768 ps |
| CPU time | 7.68 seconds |
| Started | Aug 23 01:14:00 AM UTC 24 |
| Finished | Aug 23 01:14:09 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112307888 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 19.xbar_unmapped_addr.1112307888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/19.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_access_same_device.3104023478 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 264973199 ps |
| CPU time | 5.6 seconds |
| Started | Aug 23 01:07:42 AM UTC 24 |
| Finished | Aug 23 01:07:49 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104023478 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_access_same_device.3104023478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_access_same_device_slow_rsp.1086021879 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 67445501107 ps |
| CPU time | 134.37 seconds |
| Started | Aug 23 01:07:43 AM UTC 24 |
| Finished | Aug 23 01:10:00 AM UTC 24 |
| Peak memory | 214440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086021879 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_access_same_device_slow_rsp.1086021879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_error_and_unmapped_addr.2435932428 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 556669571 ps |
| CPU time | 12.06 seconds |
| Started | Aug 23 01:07:49 AM UTC 24 |
| Finished | Aug 23 01:08:03 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435932428 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_error_and_unmapped_addr.2435932428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_error_random.2402863975 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 1258972820 ps |
| CPU time | 11.19 seconds |
| Started | Aug 23 01:07:47 AM UTC 24 |
| Finished | Aug 23 01:07:59 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402863975 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_error_random.2402863975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_random_large_delays.3600930401 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 36647835563 ps |
| CPU time | 45.95 seconds |
| Started | Aug 23 01:07:41 AM UTC 24 |
| Finished | Aug 23 01:08:28 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600930401 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_random_large_delays.3600930401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_random_slow_rsp.2185323006 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 29176051337 ps |
| CPU time | 123.13 seconds |
| Started | Aug 23 01:07:42 AM UTC 24 |
| Finished | Aug 23 01:09:48 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185323006 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_random_slow_rsp.2185323006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_random_zero_delays.3596685979 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 50360041 ps |
| CPU time | 3.61 seconds |
| Started | Aug 23 01:07:41 AM UTC 24 |
| Finished | Aug 23 01:07:46 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596685979 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_random_zero_delays.3596685979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_same_source.1987204884 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 4556200273 ps |
| CPU time | 15.5 seconds |
| Started | Aug 23 01:07:47 AM UTC 24 |
| Finished | Aug 23 01:08:03 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987204884 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_same_source.1987204884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_smoke.2946338202 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 82107692 ps |
| CPU time | 2.19 seconds |
| Started | Aug 23 01:07:37 AM UTC 24 |
| Finished | Aug 23 01:07:40 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946338202 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_smoke.2946338202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_smoke_large_delays.1560749327 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 2319279465 ps |
| CPU time | 11.82 seconds |
| Started | Aug 23 01:07:39 AM UTC 24 |
| Finished | Aug 23 01:07:52 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560749327 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_smoke_large_delays.1560749327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_smoke_slow_rsp.1159716672 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 1296783924 ps |
| CPU time | 8.04 seconds |
| Started | Aug 23 01:07:40 AM UTC 24 |
| Finished | Aug 23 01:07:49 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159716672 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_smoke_slow_rsp.1159716672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_smoke_zero_delays.3228454563 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 8563608 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 01:07:37 AM UTC 24 |
| Finished | Aug 23 01:07:39 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228454563 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_smoke_zero_delays.3228454563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_stress_all.1101248739 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 2410056776 ps |
| CPU time | 17.7 seconds |
| Started | Aug 23 01:07:51 AM UTC 24 |
| Finished | Aug 23 01:08:10 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101248739 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_stress_all.1101248739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_stress_all_with_error.4021888449 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 2039113646 ps |
| CPU time | 39.06 seconds |
| Started | Aug 23 01:07:52 AM UTC 24 |
| Finished | Aug 23 01:08:32 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021888449 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_stress_all_with_error.4021888449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_stress_all_with_rand_reset.4131572803 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 830579539 ps |
| CPU time | 111.97 seconds |
| Started | Aug 23 01:07:51 AM UTC 24 |
| Finished | Aug 23 01:09:45 AM UTC 24 |
| Peak memory | 216424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131572803 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_stress_all_with_rand_reset.4131572803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_stress_all_with_reset_error.1144628555 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 5570439955 ps |
| CPU time | 61.08 seconds |
| Started | Aug 23 01:07:53 AM UTC 24 |
| Finished | Aug 23 01:08:56 AM UTC 24 |
| Peak memory | 214440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144628555 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_stress_all_with_reset_error.1144628555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/2.xbar_unmapped_addr.3906465004 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 71796700 ps |
| CPU time | 5.7 seconds |
| Started | Aug 23 01:07:49 AM UTC 24 |
| Finished | Aug 23 01:07:56 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906465004 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_unmapped_addr.3906465004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/2.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_access_same_device.591019636 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 966045262 ps |
| CPU time | 12.82 seconds |
| Started | Aug 23 01:14:16 AM UTC 24 |
| Finished | Aug 23 01:14:30 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=591019636 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_access_same_device.591019636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_access_same_device_slow_rsp.2451848203 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 6102115888 ps |
| CPU time | 33.3 seconds |
| Started | Aug 23 01:14:16 AM UTC 24 |
| Finished | Aug 23 01:14:51 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451848203 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_access_same_device_slow_rsp.2451848203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_error_and_unmapped_addr.1567323412 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 686294906 ps |
| CPU time | 3.54 seconds |
| Started | Aug 23 01:14:23 AM UTC 24 |
| Finished | Aug 23 01:14:27 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567323412 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_error_and_unmapped_addr.1567323412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_error_random.3039483046 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 137295587 ps |
| CPU time | 5.61 seconds |
| Started | Aug 23 01:14:18 AM UTC 24 |
| Finished | Aug 23 01:14:25 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039483046 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_error_random.3039483046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_random.3885137893 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 48488540 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 01:14:13 AM UTC 24 |
| Finished | Aug 23 01:14:15 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885137893 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_random.3885137893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_random_large_delays.1226939387 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 6963393958 ps |
| CPU time | 28.51 seconds |
| Started | Aug 23 01:14:15 AM UTC 24 |
| Finished | Aug 23 01:14:45 AM UTC 24 |
| Peak memory | 212260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226939387 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_random_large_delays.1226939387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_random_slow_rsp.3465137824 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 63036818056 ps |
| CPU time | 91.13 seconds |
| Started | Aug 23 01:14:15 AM UTC 24 |
| Finished | Aug 23 01:15:48 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465137824 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_random_slow_rsp.3465137824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_random_zero_delays.4175446681 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 157340409 ps |
| CPU time | 5.13 seconds |
| Started | Aug 23 01:14:13 AM UTC 24 |
| Finished | Aug 23 01:14:19 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175446681 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_random_zero_delays.4175446681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_same_source.794526709 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 551402461 ps |
| CPU time | 6.73 seconds |
| Started | Aug 23 01:14:18 AM UTC 24 |
| Finished | Aug 23 01:14:26 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=794526709 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_same_source.794526709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke.1618523462 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 315193499 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 01:14:08 AM UTC 24 |
| Finished | Aug 23 01:14:11 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618523462 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_smoke.1618523462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke_large_delays.3926541561 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 1489203954 ps |
| CPU time | 5.5 seconds |
| Started | Aug 23 01:14:10 AM UTC 24 |
| Finished | Aug 23 01:14:17 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926541561 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_smoke_large_delays.3926541561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke_slow_rsp.2040006835 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 2343405552 ps |
| CPU time | 6.25 seconds |
| Started | Aug 23 01:14:11 AM UTC 24 |
| Finished | Aug 23 01:14:18 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040006835 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_smoke_slow_rsp.2040006835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_smoke_zero_delays.4225704152 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 11297984 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 01:14:08 AM UTC 24 |
| Finished | Aug 23 01:14:11 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225704152 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_smoke_zero_delays.4225704152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all.2868428299 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 280230303 ps |
| CPU time | 25.45 seconds |
| Started | Aug 23 01:14:24 AM UTC 24 |
| Finished | Aug 23 01:14:50 AM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868428299 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_stress_all.2868428299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_error.4273700104 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 230178222 ps |
| CPU time | 17.98 seconds |
| Started | Aug 23 01:14:26 AM UTC 24 |
| Finished | Aug 23 01:14:45 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273700104 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_stress_all_with_error.4273700104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_rand_reset.1853637850 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 141882223 ps |
| CPU time | 30.63 seconds |
| Started | Aug 23 01:14:25 AM UTC 24 |
| Finished | Aug 23 01:14:57 AM UTC 24 |
| Peak memory | 214376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853637850 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_stress_all_with_rand_reset.1853637850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_reset_error.3357770534 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 10055701405 ps |
| CPU time | 64.93 seconds |
| Started | Aug 23 01:14:27 AM UTC 24 |
| Finished | Aug 23 01:15:34 AM UTC 24 |
| Peak memory | 216284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357770534 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_stress_all_with_reset_error.3357770534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/20.xbar_unmapped_addr.1572453977 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 136477331 ps |
| CPU time | 3.62 seconds |
| Started | Aug 23 01:14:19 AM UTC 24 |
| Finished | Aug 23 01:14:24 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572453977 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 20.xbar_unmapped_addr.1572453977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/20.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_access_same_device.2414462542 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 668190807 ps |
| CPU time | 12.96 seconds |
| Started | Aug 23 01:14:37 AM UTC 24 |
| Finished | Aug 23 01:14:51 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414462542 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_access_same_device.2414462542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_access_same_device_slow_rsp.1721481229 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 29169688585 ps |
| CPU time | 41.46 seconds |
| Started | Aug 23 01:14:38 AM UTC 24 |
| Finished | Aug 23 01:15:21 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721481229 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_access_same_device_slow_rsp.1721481229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_error_and_unmapped_addr.2865696722 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 86611278 ps |
| CPU time | 5.22 seconds |
| Started | Aug 23 01:14:43 AM UTC 24 |
| Finished | Aug 23 01:14:49 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865696722 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_error_and_unmapped_addr.2865696722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_error_random.4259508370 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 492460334 ps |
| CPU time | 4.68 seconds |
| Started | Aug 23 01:14:40 AM UTC 24 |
| Finished | Aug 23 01:14:45 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259508370 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_error_random.4259508370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_random.1174424953 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 99343611 ps |
| CPU time | 3.89 seconds |
| Started | Aug 23 01:14:32 AM UTC 24 |
| Finished | Aug 23 01:14:36 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174424953 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_random.1174424953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_random_large_delays.217358565 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 21152228789 ps |
| CPU time | 47.31 seconds |
| Started | Aug 23 01:14:33 AM UTC 24 |
| Finished | Aug 23 01:15:22 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=217358565 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_random_large_delays.217358565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_random_slow_rsp.2517375085 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 2874921974 ps |
| CPU time | 7.55 seconds |
| Started | Aug 23 01:14:36 AM UTC 24 |
| Finished | Aug 23 01:14:45 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517375085 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_random_slow_rsp.2517375085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_random_zero_delays.2178754852 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 135520347 ps |
| CPU time | 4.52 seconds |
| Started | Aug 23 01:14:33 AM UTC 24 |
| Finished | Aug 23 01:14:38 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178754852 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_random_zero_delays.2178754852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_same_source.3777766797 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 38514682 ps |
| CPU time | 1.94 seconds |
| Started | Aug 23 01:14:40 AM UTC 24 |
| Finished | Aug 23 01:14:43 AM UTC 24 |
| Peak memory | 211180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777766797 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_same_source.3777766797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke.2349378366 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 133855012 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 01:14:28 AM UTC 24 |
| Finished | Aug 23 01:14:30 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349378366 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_smoke.2349378366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke_large_delays.3977900081 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 1337381551 ps |
| CPU time | 5.44 seconds |
| Started | Aug 23 01:14:31 AM UTC 24 |
| Finished | Aug 23 01:14:38 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977900081 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_smoke_large_delays.3977900081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke_slow_rsp.1128098409 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 1737758714 ps |
| CPU time | 6.99 seconds |
| Started | Aug 23 01:14:32 AM UTC 24 |
| Finished | Aug 23 01:14:40 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128098409 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_smoke_slow_rsp.1128098409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_smoke_zero_delays.3168156983 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 13991142 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 01:14:28 AM UTC 24 |
| Finished | Aug 23 01:14:30 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168156983 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_smoke_zero_delays.3168156983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all.3717808397 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 2988996761 ps |
| CPU time | 23.5 seconds |
| Started | Aug 23 01:14:44 AM UTC 24 |
| Finished | Aug 23 01:15:09 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717808397 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_stress_all.3717808397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all_with_error.967535551 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 386952009 ps |
| CPU time | 15.37 seconds |
| Started | Aug 23 01:14:45 AM UTC 24 |
| Finished | Aug 23 01:15:02 AM UTC 24 |
| Peak memory | 211836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=967535551 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_stress_all_with_error.967535551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all_with_rand_reset.1920544379 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 5780890191 ps |
| CPU time | 108.42 seconds |
| Started | Aug 23 01:14:45 AM UTC 24 |
| Finished | Aug 23 01:16:36 AM UTC 24 |
| Peak memory | 214020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920544379 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_stress_all_with_rand_reset.1920544379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all_with_reset_error.2114434327 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 1204417171 ps |
| CPU time | 83.44 seconds |
| Started | Aug 23 01:14:47 AM UTC 24 |
| Finished | Aug 23 01:16:12 AM UTC 24 |
| Peak memory | 216216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114434327 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_stress_all_with_reset_error.2114434327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/21.xbar_unmapped_addr.4178550005 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 16017833 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 01:14:41 AM UTC 24 |
| Finished | Aug 23 01:14:43 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178550005 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 21.xbar_unmapped_addr.4178550005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/21.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_access_same_device.3901602542 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 584074434 ps |
| CPU time | 6.77 seconds |
| Started | Aug 23 01:14:52 AM UTC 24 |
| Finished | Aug 23 01:15:00 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901602542 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_access_same_device.3901602542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_access_same_device_slow_rsp.3100084456 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 107592219695 ps |
| CPU time | 90.79 seconds |
| Started | Aug 23 01:14:52 AM UTC 24 |
| Finished | Aug 23 01:16:24 AM UTC 24 |
| Peak memory | 212152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100084456 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_access_same_device_slow_rsp.3100084456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_error_and_unmapped_addr.1105073431 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 357449658 ps |
| CPU time | 6.34 seconds |
| Started | Aug 23 01:14:55 AM UTC 24 |
| Finished | Aug 23 01:15:03 AM UTC 24 |
| Peak memory | 212204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105073431 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_error_and_unmapped_addr.1105073431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_error_random.2092931403 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 807765647 ps |
| CPU time | 10.45 seconds |
| Started | Aug 23 01:14:53 AM UTC 24 |
| Finished | Aug 23 01:15:05 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092931403 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_error_random.2092931403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_random.2126278812 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 645354346 ps |
| CPU time | 8.46 seconds |
| Started | Aug 23 01:14:49 AM UTC 24 |
| Finished | Aug 23 01:14:59 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126278812 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_random.2126278812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_random_large_delays.4065278557 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 55996530089 ps |
| CPU time | 57.23 seconds |
| Started | Aug 23 01:14:51 AM UTC 24 |
| Finished | Aug 23 01:15:49 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065278557 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_random_large_delays.4065278557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_random_slow_rsp.620180671 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 19632738112 ps |
| CPU time | 87.69 seconds |
| Started | Aug 23 01:14:51 AM UTC 24 |
| Finished | Aug 23 01:16:20 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=620180671 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_random_slow_rsp.620180671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_random_zero_delays.356851816 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 135214395 ps |
| CPU time | 5.86 seconds |
| Started | Aug 23 01:14:49 AM UTC 24 |
| Finished | Aug 23 01:14:56 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=356851816 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_random_zero_delays.356851816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_same_source.278363973 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 507697327 ps |
| CPU time | 5.55 seconds |
| Started | Aug 23 01:14:52 AM UTC 24 |
| Finished | Aug 23 01:14:59 AM UTC 24 |
| Peak memory | 212240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278363973 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_same_source.278363973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke.3427433030 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 77357251 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 01:14:47 AM UTC 24 |
| Finished | Aug 23 01:14:49 AM UTC 24 |
| Peak memory | 211232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427433030 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_smoke.3427433030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke_large_delays.641802629 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 2091094131 ps |
| CPU time | 8.7 seconds |
| Started | Aug 23 01:14:47 AM UTC 24 |
| Finished | Aug 23 01:14:57 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=641802629 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_smoke_large_delays.641802629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke_slow_rsp.2459584774 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 1048446772 ps |
| CPU time | 5.74 seconds |
| Started | Aug 23 01:14:48 AM UTC 24 |
| Finished | Aug 23 01:14:55 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459584774 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_smoke_slow_rsp.2459584774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_smoke_zero_delays.1526505146 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 9161598 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 01:14:47 AM UTC 24 |
| Finished | Aug 23 01:14:49 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526505146 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_smoke_zero_delays.1526505146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all.206683449 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 1167141530 ps |
| CPU time | 29.08 seconds |
| Started | Aug 23 01:14:57 AM UTC 24 |
| Finished | Aug 23 01:15:27 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206683449 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_stress_all.206683449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_error.2198859970 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 31955403 ps |
| CPU time | 2.01 seconds |
| Started | Aug 23 01:14:58 AM UTC 24 |
| Finished | Aug 23 01:15:01 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198859970 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_stress_all_with_error.2198859970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_rand_reset.1117870115 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 1131643980 ps |
| CPU time | 128.05 seconds |
| Started | Aug 23 01:14:57 AM UTC 24 |
| Finished | Aug 23 01:17:07 AM UTC 24 |
| Peak memory | 216228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117870115 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_stress_all_with_rand_reset.1117870115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_stress_all_with_reset_error.771342758 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 87169664 ps |
| CPU time | 6.15 seconds |
| Started | Aug 23 01:14:58 AM UTC 24 |
| Finished | Aug 23 01:15:05 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771342758 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_stress_all_with_reset_error.771342758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/22.xbar_unmapped_addr.1306761176 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 91759750 ps |
| CPU time | 2.44 seconds |
| Started | Aug 23 01:14:54 AM UTC 24 |
| Finished | Aug 23 01:14:58 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306761176 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 22.xbar_unmapped_addr.1306761176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/22.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_access_same_device.3140150371 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 466317490 ps |
| CPU time | 5.2 seconds |
| Started | Aug 23 01:15:03 AM UTC 24 |
| Finished | Aug 23 01:15:10 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140150371 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_access_same_device.3140150371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_access_same_device_slow_rsp.1067417032 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 21326782077 ps |
| CPU time | 76.95 seconds |
| Started | Aug 23 01:15:03 AM UTC 24 |
| Finished | Aug 23 01:16:22 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067417032 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_access_same_device_slow_rsp.1067417032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_error_and_unmapped_addr.3021255759 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 726538522 ps |
| CPU time | 7.55 seconds |
| Started | Aug 23 01:15:06 AM UTC 24 |
| Finished | Aug 23 01:15:15 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021255759 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_error_and_unmapped_addr.3021255759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_error_random.2270269479 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 1235775568 ps |
| CPU time | 5.87 seconds |
| Started | Aug 23 01:15:06 AM UTC 24 |
| Finished | Aug 23 01:15:13 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270269479 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_error_random.2270269479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_random.3671733364 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 111003432 ps |
| CPU time | 2.01 seconds |
| Started | Aug 23 01:15:01 AM UTC 24 |
| Finished | Aug 23 01:15:04 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671733364 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_random.3671733364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_random_large_delays.842638676 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 121239045304 ps |
| CPU time | 93.19 seconds |
| Started | Aug 23 01:15:02 AM UTC 24 |
| Finished | Aug 23 01:16:37 AM UTC 24 |
| Peak memory | 212460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842638676 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_random_large_delays.842638676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_random_slow_rsp.822848136 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 20031917950 ps |
| CPU time | 104.68 seconds |
| Started | Aug 23 01:15:02 AM UTC 24 |
| Finished | Aug 23 01:16:49 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=822848136 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_random_slow_rsp.822848136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_random_zero_delays.4249942003 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 90837604 ps |
| CPU time | 4.32 seconds |
| Started | Aug 23 01:15:02 AM UTC 24 |
| Finished | Aug 23 01:15:07 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249942003 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_random_zero_delays.4249942003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_same_source.3213888408 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 195091447 ps |
| CPU time | 4.81 seconds |
| Started | Aug 23 01:15:04 AM UTC 24 |
| Finished | Aug 23 01:15:10 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213888408 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_same_source.3213888408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke.2993974425 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 8741767 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 01:14:59 AM UTC 24 |
| Finished | Aug 23 01:15:01 AM UTC 24 |
| Peak memory | 211192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993974425 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_smoke.2993974425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke_large_delays.1863122705 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 2429145557 ps |
| CPU time | 11.01 seconds |
| Started | Aug 23 01:14:59 AM UTC 24 |
| Finished | Aug 23 01:15:12 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863122705 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_smoke_large_delays.1863122705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke_slow_rsp.1562738909 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 1447355284 ps |
| CPU time | 4.86 seconds |
| Started | Aug 23 01:15:00 AM UTC 24 |
| Finished | Aug 23 01:15:05 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562738909 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_smoke_slow_rsp.1562738909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_smoke_zero_delays.3537341185 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 10796808 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 01:14:59 AM UTC 24 |
| Finished | Aug 23 01:15:02 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537341185 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_smoke_zero_delays.3537341185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all.1253396532 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 11449818780 ps |
| CPU time | 48.28 seconds |
| Started | Aug 23 01:15:06 AM UTC 24 |
| Finished | Aug 23 01:15:56 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253396532 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_stress_all.1253396532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_error.547169191 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 90584366 ps |
| CPU time | 4.7 seconds |
| Started | Aug 23 01:15:09 AM UTC 24 |
| Finished | Aug 23 01:15:15 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=547169191 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_stress_all_with_error.547169191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_rand_reset.146787886 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 2159200803 ps |
| CPU time | 43.6 seconds |
| Started | Aug 23 01:15:08 AM UTC 24 |
| Finished | Aug 23 01:15:53 AM UTC 24 |
| Peak memory | 216292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146787886 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_stress_all_with_rand_reset.146787886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_reset_error.622211153 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 569858472 ps |
| CPU time | 56.05 seconds |
| Started | Aug 23 01:15:09 AM UTC 24 |
| Finished | Aug 23 01:16:07 AM UTC 24 |
| Peak memory | 216428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622211153 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_stress_all_with_reset_error.622211153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/23.xbar_unmapped_addr.825723396 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 60413827 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 01:15:06 AM UTC 24 |
| Finished | Aug 23 01:15:09 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=825723396 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 23.xbar_unmapped_addr.825723396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/23.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_access_same_device.3291406935 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 61382638 ps |
| CPU time | 9.57 seconds |
| Started | Aug 23 01:15:16 AM UTC 24 |
| Finished | Aug 23 01:15:26 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291406935 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_access_same_device.3291406935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_error_and_unmapped_addr.1062745851 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 300325912 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 01:15:23 AM UTC 24 |
| Finished | Aug 23 01:15:25 AM UTC 24 |
| Peak memory | 211248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062745851 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_error_and_unmapped_addr.1062745851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_error_random.282941817 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 114163917 ps |
| CPU time | 1.18 seconds |
| Started | Aug 23 01:15:19 AM UTC 24 |
| Finished | Aug 23 01:15:21 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=282941817 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_error_random.282941817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_random.4087160608 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 143228489 ps |
| CPU time | 6.43 seconds |
| Started | Aug 23 01:15:13 AM UTC 24 |
| Finished | Aug 23 01:15:21 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087160608 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_random.4087160608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_random_large_delays.695978975 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 37705127906 ps |
| CPU time | 75.49 seconds |
| Started | Aug 23 01:15:14 AM UTC 24 |
| Finished | Aug 23 01:16:31 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=695978975 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_random_large_delays.695978975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_random_slow_rsp.1976014085 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 26424789465 ps |
| CPU time | 66.7 seconds |
| Started | Aug 23 01:15:16 AM UTC 24 |
| Finished | Aug 23 01:16:24 AM UTC 24 |
| Peak memory | 212396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976014085 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_random_slow_rsp.1976014085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_random_zero_delays.2182475879 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 48314381 ps |
| CPU time | 2.53 seconds |
| Started | Aug 23 01:15:13 AM UTC 24 |
| Finished | Aug 23 01:15:17 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182475879 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_random_zero_delays.2182475879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_same_source.4065249365 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 1280189627 ps |
| CPU time | 7.15 seconds |
| Started | Aug 23 01:15:18 AM UTC 24 |
| Finished | Aug 23 01:15:26 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065249365 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_same_source.4065249365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke.3848892399 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 95320974 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 01:15:09 AM UTC 24 |
| Finished | Aug 23 01:15:12 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848892399 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_smoke.3848892399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke_large_delays.65985313 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 3416932086 ps |
| CPU time | 10.35 seconds |
| Started | Aug 23 01:15:12 AM UTC 24 |
| Finished | Aug 23 01:15:23 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=65985313 -assert nopostproc +UVM_TESTNAME=xbar_base_ test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_smoke_large_delays.65985313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke_slow_rsp.399038812 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 1319308057 ps |
| CPU time | 7.31 seconds |
| Started | Aug 23 01:15:13 AM UTC 24 |
| Finished | Aug 23 01:15:21 AM UTC 24 |
| Peak memory | 212116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=399038812 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_smoke_slow_rsp.399038812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_smoke_zero_delays.3582693174 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 14734663 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 01:15:11 AM UTC 24 |
| Finished | Aug 23 01:15:12 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582693174 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_smoke_zero_delays.3582693174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all.1490514967 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 1732583251 ps |
| CPU time | 14.86 seconds |
| Started | Aug 23 01:15:23 AM UTC 24 |
| Finished | Aug 23 01:15:39 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490514967 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_stress_all.1490514967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_error.2453735183 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 2046078038 ps |
| CPU time | 18.19 seconds |
| Started | Aug 23 01:15:23 AM UTC 24 |
| Finished | Aug 23 01:15:42 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453735183 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_stress_all_with_error.2453735183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_rand_reset.1752798755 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 73224620 ps |
| CPU time | 3.07 seconds |
| Started | Aug 23 01:15:23 AM UTC 24 |
| Finished | Aug 23 01:15:27 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752798755 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_stress_all_with_rand_reset.1752798755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_reset_error.3458043466 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 1051065911 ps |
| CPU time | 123.18 seconds |
| Started | Aug 23 01:15:24 AM UTC 24 |
| Finished | Aug 23 01:17:29 AM UTC 24 |
| Peak memory | 220104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458043466 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_stress_all_with_reset_error.3458043466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/24.xbar_unmapped_addr.1619969985 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 473137817 ps |
| CPU time | 6.27 seconds |
| Started | Aug 23 01:15:21 AM UTC 24 |
| Finished | Aug 23 01:15:29 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619969985 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 24.xbar_unmapped_addr.1619969985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/24.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_access_same_device.2938373775 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 831131706 ps |
| CPU time | 9.55 seconds |
| Started | Aug 23 01:15:32 AM UTC 24 |
| Finished | Aug 23 01:15:43 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938373775 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_access_same_device.2938373775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_error_and_unmapped_addr.2491372702 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 274735914 ps |
| CPU time | 3.97 seconds |
| Started | Aug 23 01:15:38 AM UTC 24 |
| Finished | Aug 23 01:15:43 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491372702 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_error_and_unmapped_addr.2491372702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_error_random.2785598559 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 4603340991 ps |
| CPU time | 13.53 seconds |
| Started | Aug 23 01:15:36 AM UTC 24 |
| Finished | Aug 23 01:15:50 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785598559 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_error_random.2785598559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_random.452078384 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 17443503 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 01:15:29 AM UTC 24 |
| Finished | Aug 23 01:15:31 AM UTC 24 |
| Peak memory | 211100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=452078384 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_random.452078384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_random_large_delays.3122199468 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 39550763772 ps |
| CPU time | 147.97 seconds |
| Started | Aug 23 01:15:30 AM UTC 24 |
| Finished | Aug 23 01:18:00 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122199468 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_random_large_delays.3122199468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_random_slow_rsp.3501245694 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 10397195271 ps |
| CPU time | 63.64 seconds |
| Started | Aug 23 01:15:30 AM UTC 24 |
| Finished | Aug 23 01:16:35 AM UTC 24 |
| Peak memory | 212524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501245694 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_random_slow_rsp.3501245694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_random_zero_delays.441552673 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 100273447 ps |
| CPU time | 5 seconds |
| Started | Aug 23 01:15:29 AM UTC 24 |
| Finished | Aug 23 01:15:35 AM UTC 24 |
| Peak memory | 212112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=441552673 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_random_zero_delays.441552673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_same_source.1675738793 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 56022720 ps |
| CPU time | 1.97 seconds |
| Started | Aug 23 01:15:36 AM UTC 24 |
| Finished | Aug 23 01:15:39 AM UTC 24 |
| Peak memory | 210948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675738793 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_same_source.1675738793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke.3592831326 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 362192064 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 01:15:26 AM UTC 24 |
| Finished | Aug 23 01:15:28 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592831326 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_smoke.3592831326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke_large_delays.1125808732 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 3569815799 ps |
| CPU time | 8.11 seconds |
| Started | Aug 23 01:15:27 AM UTC 24 |
| Finished | Aug 23 01:15:37 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1125808732 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_smoke_large_delays.1125808732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke_slow_rsp.3982148806 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 853128834 ps |
| CPU time | 6.5 seconds |
| Started | Aug 23 01:15:27 AM UTC 24 |
| Finished | Aug 23 01:15:35 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982148806 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_smoke_slow_rsp.3982148806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_smoke_zero_delays.3516535788 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 8728856 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 01:15:27 AM UTC 24 |
| Finished | Aug 23 01:15:29 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516535788 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_smoke_zero_delays.3516535788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_stress_all.3868611017 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 370986307 ps |
| CPU time | 24.79 seconds |
| Started | Aug 23 01:15:39 AM UTC 24 |
| Finished | Aug 23 01:16:05 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868611017 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_stress_all.3868611017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_stress_all_with_error.2109572795 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 79156946 ps |
| CPU time | 3.37 seconds |
| Started | Aug 23 01:15:39 AM UTC 24 |
| Finished | Aug 23 01:15:44 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109572795 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_stress_all_with_error.2109572795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_stress_all_with_rand_reset.1956560566 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 1213764784 ps |
| CPU time | 131.03 seconds |
| Started | Aug 23 01:15:39 AM UTC 24 |
| Finished | Aug 23 01:17:52 AM UTC 24 |
| Peak memory | 216228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956560566 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_stress_all_with_rand_reset.1956560566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_stress_all_with_reset_error.1262792720 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 1062788375 ps |
| CPU time | 140.34 seconds |
| Started | Aug 23 01:15:39 AM UTC 24 |
| Finished | Aug 23 01:18:02 AM UTC 24 |
| Peak memory | 216220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262792720 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_stress_all_with_reset_error.1262792720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/25.xbar_unmapped_addr.858783481 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 26900409 ps |
| CPU time | 2.23 seconds |
| Started | Aug 23 01:15:36 AM UTC 24 |
| Finished | Aug 23 01:15:39 AM UTC 24 |
| Peak memory | 212260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=858783481 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 25.xbar_unmapped_addr.858783481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/25.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_access_same_device.317840263 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 1171078063 ps |
| CPU time | 8.32 seconds |
| Started | Aug 23 01:15:51 AM UTC 24 |
| Finished | Aug 23 01:16:00 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317840263 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_access_same_device.317840263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_access_same_device_slow_rsp.726512041 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 65966272354 ps |
| CPU time | 209.99 seconds |
| Started | Aug 23 01:15:51 AM UTC 24 |
| Finished | Aug 23 01:19:23 AM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726512041 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_access_same_device_slow_rsp.726512041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_error_and_unmapped_addr.2869815096 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 458719177 ps |
| CPU time | 7.3 seconds |
| Started | Aug 23 01:15:55 AM UTC 24 |
| Finished | Aug 23 01:16:04 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869815096 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_error_and_unmapped_addr.2869815096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_error_random.2489758133 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 87221876 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 01:15:52 AM UTC 24 |
| Finished | Aug 23 01:15:54 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489758133 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_error_random.2489758133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_random.2215373312 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 166294572 ps |
| CPU time | 5.99 seconds |
| Started | Aug 23 01:15:47 AM UTC 24 |
| Finished | Aug 23 01:15:54 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215373312 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_random.2215373312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_random_large_delays.2613780586 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 99067385629 ps |
| CPU time | 95.6 seconds |
| Started | Aug 23 01:15:48 AM UTC 24 |
| Finished | Aug 23 01:17:26 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613780586 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_random_large_delays.2613780586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_random_slow_rsp.3603852448 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 74901000457 ps |
| CPU time | 176.15 seconds |
| Started | Aug 23 01:15:48 AM UTC 24 |
| Finished | Aug 23 01:18:47 AM UTC 24 |
| Peak memory | 213788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603852448 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_random_slow_rsp.3603852448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_random_zero_delays.3123144319 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 49479641 ps |
| CPU time | 2.94 seconds |
| Started | Aug 23 01:15:47 AM UTC 24 |
| Finished | Aug 23 01:15:51 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123144319 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_random_zero_delays.3123144319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_same_source.2481853625 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 296347651 ps |
| CPU time | 2.84 seconds |
| Started | Aug 23 01:15:52 AM UTC 24 |
| Finished | Aug 23 01:15:56 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481853625 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_same_source.2481853625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke.1493798462 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 9498455 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 01:15:44 AM UTC 24 |
| Finished | Aug 23 01:15:46 AM UTC 24 |
| Peak memory | 211108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493798462 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_smoke.1493798462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke_large_delays.3546616718 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 1196918969 ps |
| CPU time | 5.69 seconds |
| Started | Aug 23 01:15:44 AM UTC 24 |
| Finished | Aug 23 01:15:50 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546616718 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_smoke_large_delays.3546616718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke_slow_rsp.473918903 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 5569278871 ps |
| CPU time | 13.45 seconds |
| Started | Aug 23 01:15:45 AM UTC 24 |
| Finished | Aug 23 01:15:59 AM UTC 24 |
| Peak memory | 212452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=473918903 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_smoke_slow_rsp.473918903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_smoke_zero_delays.3182100070 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 11876268 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 01:15:44 AM UTC 24 |
| Finished | Aug 23 01:15:46 AM UTC 24 |
| Peak memory | 211220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182100070 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_smoke_zero_delays.3182100070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all.743177339 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 12280679230 ps |
| CPU time | 50.76 seconds |
| Started | Aug 23 01:15:55 AM UTC 24 |
| Finished | Aug 23 01:16:48 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=743177339 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_stress_all.743177339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_error.1278950941 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 3004973573 ps |
| CPU time | 44.66 seconds |
| Started | Aug 23 01:15:57 AM UTC 24 |
| Finished | Aug 23 01:16:43 AM UTC 24 |
| Peak memory | 214072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278950941 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_stress_all_with_error.1278950941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_rand_reset.2479490792 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 6957569244 ps |
| CPU time | 71.88 seconds |
| Started | Aug 23 01:15:57 AM UTC 24 |
| Finished | Aug 23 01:17:10 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479490792 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_stress_all_with_rand_reset.2479490792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_reset_error.1423831053 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 214148895 ps |
| CPU time | 7.21 seconds |
| Started | Aug 23 01:15:57 AM UTC 24 |
| Finished | Aug 23 01:16:05 AM UTC 24 |
| Peak memory | 211952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1423831053 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_stress_all_with_reset_error.1423831053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/26.xbar_unmapped_addr.3336118282 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 30722444 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 01:15:54 AM UTC 24 |
| Finished | Aug 23 01:15:56 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336118282 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 26.xbar_unmapped_addr.3336118282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/26.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_access_same_device.2730172454 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 79764688 ps |
| CPU time | 3.79 seconds |
| Started | Aug 23 01:16:09 AM UTC 24 |
| Finished | Aug 23 01:16:14 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730172454 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_access_same_device.2730172454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_access_same_device_slow_rsp.640518846 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 211257647185 ps |
| CPU time | 274.54 seconds |
| Started | Aug 23 01:16:11 AM UTC 24 |
| Finished | Aug 23 01:20:49 AM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=640518846 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_access_same_device_slow_rsp.640518846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_error_and_unmapped_addr.801924459 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 862615713 ps |
| CPU time | 7.83 seconds |
| Started | Aug 23 01:16:15 AM UTC 24 |
| Finished | Aug 23 01:16:24 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801924459 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_error_and_unmapped_addr.801924459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_error_random.3665441638 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 72186131 ps |
| CPU time | 3.02 seconds |
| Started | Aug 23 01:16:14 AM UTC 24 |
| Finished | Aug 23 01:16:18 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665441638 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_error_random.3665441638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_random.3160262707 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 66394454 ps |
| CPU time | 1.94 seconds |
| Started | Aug 23 01:16:04 AM UTC 24 |
| Finished | Aug 23 01:16:08 AM UTC 24 |
| Peak memory | 211232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160262707 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_random.3160262707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_random_large_delays.1204608553 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 80496767749 ps |
| CPU time | 151.34 seconds |
| Started | Aug 23 01:16:07 AM UTC 24 |
| Finished | Aug 23 01:18:41 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204608553 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_random_large_delays.1204608553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_random_slow_rsp.345586276 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 2894263100 ps |
| CPU time | 11.95 seconds |
| Started | Aug 23 01:16:08 AM UTC 24 |
| Finished | Aug 23 01:16:21 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=345586276 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_random_slow_rsp.345586276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_random_zero_delays.3449798063 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 34675010 ps |
| CPU time | 2.97 seconds |
| Started | Aug 23 01:16:06 AM UTC 24 |
| Finished | Aug 23 01:16:10 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449798063 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_random_zero_delays.3449798063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_same_source.3428558050 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 557177338 ps |
| CPU time | 6.61 seconds |
| Started | Aug 23 01:16:12 AM UTC 24 |
| Finished | Aug 23 01:16:20 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428558050 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_same_source.3428558050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke.470202067 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 10214364 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 01:16:00 AM UTC 24 |
| Finished | Aug 23 01:16:02 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470202067 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_smoke.470202067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke_large_delays.319347410 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 3399426751 ps |
| CPU time | 8.57 seconds |
| Started | Aug 23 01:16:03 AM UTC 24 |
| Finished | Aug 23 01:16:13 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319347410 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_smoke_large_delays.319347410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke_slow_rsp.2577198166 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 603224563 ps |
| CPU time | 5.09 seconds |
| Started | Aug 23 01:16:04 AM UTC 24 |
| Finished | Aug 23 01:16:11 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577198166 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_smoke_slow_rsp.2577198166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_smoke_zero_delays.3419411438 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 23801693 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 01:16:01 AM UTC 24 |
| Finished | Aug 23 01:16:03 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3419411438 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_smoke_zero_delays.3419411438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all.1061784277 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 1714329909 ps |
| CPU time | 56.29 seconds |
| Started | Aug 23 01:16:19 AM UTC 24 |
| Finished | Aug 23 01:17:17 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061784277 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_stress_all.1061784277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all_with_error.273455602 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 1184261459 ps |
| CPU time | 23.96 seconds |
| Started | Aug 23 01:16:21 AM UTC 24 |
| Finished | Aug 23 01:16:47 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=273455602 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_stress_all_with_error.273455602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/27.xbar_unmapped_addr.1173728798 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 1484801107 ps |
| CPU time | 7.7 seconds |
| Started | Aug 23 01:16:14 AM UTC 24 |
| Finished | Aug 23 01:16:23 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173728798 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 27.xbar_unmapped_addr.1173728798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/27.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_access_same_device.7188392 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 150933626 ps |
| CPU time | 11.39 seconds |
| Started | Aug 23 01:16:31 AM UTC 24 |
| Finished | Aug 23 01:16:43 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=7188392 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_T EST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_access_same_device.7188392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_error_and_unmapped_addr.386734993 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 165840042 ps |
| CPU time | 2.94 seconds |
| Started | Aug 23 01:16:36 AM UTC 24 |
| Finished | Aug 23 01:16:40 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=386734993 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_error_and_unmapped_addr.386734993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_error_random.3624069319 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 33228156 ps |
| CPU time | 2.73 seconds |
| Started | Aug 23 01:16:32 AM UTC 24 |
| Finished | Aug 23 01:16:36 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624069319 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_error_random.3624069319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_random.1908359113 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 201291133 ps |
| CPU time | 3.54 seconds |
| Started | Aug 23 01:16:25 AM UTC 24 |
| Finished | Aug 23 01:16:30 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908359113 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_random.1908359113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_random_large_delays.4162478228 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 44535828621 ps |
| CPU time | 112.68 seconds |
| Started | Aug 23 01:16:26 AM UTC 24 |
| Finished | Aug 23 01:18:21 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162478228 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_random_large_delays.4162478228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_random_slow_rsp.1366576319 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 6259201027 ps |
| CPU time | 44.38 seconds |
| Started | Aug 23 01:16:26 AM UTC 24 |
| Finished | Aug 23 01:17:12 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366576319 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_random_slow_rsp.1366576319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_random_zero_delays.1426829033 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 126027968 ps |
| CPU time | 3.26 seconds |
| Started | Aug 23 01:16:25 AM UTC 24 |
| Finished | Aug 23 01:16:30 AM UTC 24 |
| Peak memory | 212108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426829033 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_random_zero_delays.1426829033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_same_source.268349951 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 243524592 ps |
| CPU time | 3.74 seconds |
| Started | Aug 23 01:16:31 AM UTC 24 |
| Finished | Aug 23 01:16:36 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=268349951 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_same_source.268349951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke.2955308637 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 69591091 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 01:16:22 AM UTC 24 |
| Finished | Aug 23 01:16:25 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955308637 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_smoke.2955308637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke_large_delays.755658686 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 1034252545 ps |
| CPU time | 4.97 seconds |
| Started | Aug 23 01:16:24 AM UTC 24 |
| Finished | Aug 23 01:16:30 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755658686 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_smoke_large_delays.755658686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke_slow_rsp.4118026617 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 4035355259 ps |
| CPU time | 12.93 seconds |
| Started | Aug 23 01:16:25 AM UTC 24 |
| Finished | Aug 23 01:16:39 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118026617 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_smoke_slow_rsp.4118026617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_smoke_zero_delays.2446156285 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 9653241 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 01:16:24 AM UTC 24 |
| Finished | Aug 23 01:16:26 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446156285 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_smoke_zero_delays.2446156285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all.4055740800 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 9574431856 ps |
| CPU time | 67.35 seconds |
| Started | Aug 23 01:16:36 AM UTC 24 |
| Finished | Aug 23 01:17:45 AM UTC 24 |
| Peak memory | 216288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055740800 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_stress_all.4055740800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_error.3170127804 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 349398558 ps |
| CPU time | 19.41 seconds |
| Started | Aug 23 01:16:38 AM UTC 24 |
| Finished | Aug 23 01:16:58 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170127804 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_stress_all_with_error.3170127804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_rand_reset.1424022583 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 868361316 ps |
| CPU time | 140.68 seconds |
| Started | Aug 23 01:16:38 AM UTC 24 |
| Finished | Aug 23 01:19:01 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424022583 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_stress_all_with_rand_reset.1424022583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_reset_error.249733959 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 857398251 ps |
| CPU time | 64.98 seconds |
| Started | Aug 23 01:16:41 AM UTC 24 |
| Finished | Aug 23 01:17:47 AM UTC 24 |
| Peak memory | 216236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=249733959 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_stress_all_with_reset_error.249733959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/28.xbar_unmapped_addr.2550018878 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 259322204 ps |
| CPU time | 2.57 seconds |
| Started | Aug 23 01:16:36 AM UTC 24 |
| Finished | Aug 23 01:16:40 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550018878 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 28.xbar_unmapped_addr.2550018878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/28.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_access_same_device.1638708727 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 1538951209 ps |
| CPU time | 7.72 seconds |
| Started | Aug 23 01:16:48 AM UTC 24 |
| Finished | Aug 23 01:16:57 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638708727 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_access_same_device.1638708727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_access_same_device_slow_rsp.650755515 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 15923181997 ps |
| CPU time | 51.65 seconds |
| Started | Aug 23 01:16:49 AM UTC 24 |
| Finished | Aug 23 01:17:42 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=650755515 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_access_same_device_slow_rsp.650755515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_error_and_unmapped_addr.4037002742 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 97686546 ps |
| CPU time | 3.32 seconds |
| Started | Aug 23 01:16:53 AM UTC 24 |
| Finished | Aug 23 01:16:57 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037002742 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_error_and_unmapped_addr.4037002742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_error_random.999463868 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 807496525 ps |
| CPU time | 2.82 seconds |
| Started | Aug 23 01:16:49 AM UTC 24 |
| Finished | Aug 23 01:16:53 AM UTC 24 |
| Peak memory | 212260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=999463868 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_error_random.999463868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_random.79324620 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 51430174 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 01:16:44 AM UTC 24 |
| Finished | Aug 23 01:16:48 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79324620 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_random.79324620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_random_large_delays.2338311753 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 44804560419 ps |
| CPU time | 21.22 seconds |
| Started | Aug 23 01:16:46 AM UTC 24 |
| Finished | Aug 23 01:17:08 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338311753 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_random_large_delays.2338311753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_random_slow_rsp.645359462 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 7065136406 ps |
| CPU time | 26.73 seconds |
| Started | Aug 23 01:16:48 AM UTC 24 |
| Finished | Aug 23 01:17:16 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=645359462 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_random_slow_rsp.645359462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_random_zero_delays.576536071 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 17883340 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 01:16:44 AM UTC 24 |
| Finished | Aug 23 01:16:47 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576536071 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_random_zero_delays.576536071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_same_source.1326451935 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 20018375 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 01:16:49 AM UTC 24 |
| Finished | Aug 23 01:16:52 AM UTC 24 |
| Peak memory | 211184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326451935 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_same_source.1326451935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke.3321575648 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 68768967 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 01:16:41 AM UTC 24 |
| Finished | Aug 23 01:16:43 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321575648 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_smoke.3321575648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke_large_delays.3058569459 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 1643305139 ps |
| CPU time | 6.58 seconds |
| Started | Aug 23 01:16:44 AM UTC 24 |
| Finished | Aug 23 01:16:52 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058569459 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_smoke_large_delays.3058569459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke_slow_rsp.4259898723 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 1528783363 ps |
| CPU time | 6.28 seconds |
| Started | Aug 23 01:16:44 AM UTC 24 |
| Finished | Aug 23 01:16:52 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259898723 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_smoke_slow_rsp.4259898723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_smoke_zero_delays.663827412 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 10149578 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 01:16:41 AM UTC 24 |
| Finished | Aug 23 01:16:43 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=663827412 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_smoke_zero_delays.663827412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all.3103148824 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 4225656998 ps |
| CPU time | 33.22 seconds |
| Started | Aug 23 01:16:53 AM UTC 24 |
| Finished | Aug 23 01:17:27 AM UTC 24 |
| Peak memory | 212184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103148824 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_stress_all.3103148824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_error.583458269 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 14992878658 ps |
| CPU time | 65.1 seconds |
| Started | Aug 23 01:16:57 AM UTC 24 |
| Finished | Aug 23 01:18:04 AM UTC 24 |
| Peak memory | 214236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583458269 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_stress_all_with_error.583458269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_rand_reset.509102732 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 217653367 ps |
| CPU time | 38.22 seconds |
| Started | Aug 23 01:16:54 AM UTC 24 |
| Finished | Aug 23 01:17:33 AM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=509102732 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_stress_all_with_rand_reset.509102732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_reset_error.604056751 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 499781654 ps |
| CPU time | 47.83 seconds |
| Started | Aug 23 01:16:58 AM UTC 24 |
| Finished | Aug 23 01:17:47 AM UTC 24 |
| Peak memory | 216492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=604056751 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_stress_all_with_reset_error.604056751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/29.xbar_unmapped_addr.703664603 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 130767654 ps |
| CPU time | 2.72 seconds |
| Started | Aug 23 01:16:53 AM UTC 24 |
| Finished | Aug 23 01:16:56 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=703664603 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 29.xbar_unmapped_addr.703664603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/29.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_access_same_device.2568731780 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 61591722 ps |
| CPU time | 5.39 seconds |
| Started | Aug 23 01:08:04 AM UTC 24 |
| Finished | Aug 23 01:08:10 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568731780 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_access_same_device.2568731780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_access_same_device_slow_rsp.2655504647 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 11043541085 ps |
| CPU time | 57.23 seconds |
| Started | Aug 23 01:08:05 AM UTC 24 |
| Finished | Aug 23 01:09:04 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655504647 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_access_same_device_slow_rsp.2655504647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_error_and_unmapped_addr.2373093278 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 457082397 ps |
| CPU time | 9.67 seconds |
| Started | Aug 23 01:08:08 AM UTC 24 |
| Finished | Aug 23 01:08:19 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373093278 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_error_and_unmapped_addr.2373093278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_error_random.2256888162 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 710102809 ps |
| CPU time | 8.64 seconds |
| Started | Aug 23 01:08:08 AM UTC 24 |
| Finished | Aug 23 01:08:17 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256888162 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_error_random.2256888162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_random.1598817131 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 71807264 ps |
| CPU time | 9.66 seconds |
| Started | Aug 23 01:08:00 AM UTC 24 |
| Finished | Aug 23 01:08:10 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598817131 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_random.1598817131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_random_large_delays.3340604051 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 39468599620 ps |
| CPU time | 56.62 seconds |
| Started | Aug 23 01:08:03 AM UTC 24 |
| Finished | Aug 23 01:09:01 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340604051 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_random_large_delays.3340604051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_random_slow_rsp.1930604742 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 68481424578 ps |
| CPU time | 223.94 seconds |
| Started | Aug 23 01:08:04 AM UTC 24 |
| Finished | Aug 23 01:11:51 AM UTC 24 |
| Peak memory | 212396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930604742 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_random_slow_rsp.1930604742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_random_zero_delays.1506935343 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 24548304 ps |
| CPU time | 2.73 seconds |
| Started | Aug 23 01:08:01 AM UTC 24 |
| Finished | Aug 23 01:08:04 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506935343 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_random_zero_delays.1506935343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_same_source.4239589571 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 54112733 ps |
| CPU time | 4.21 seconds |
| Started | Aug 23 01:08:06 AM UTC 24 |
| Finished | Aug 23 01:08:12 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239589571 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_same_source.4239589571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_smoke.2711400066 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 69257451 ps |
| CPU time | 1.73 seconds |
| Started | Aug 23 01:07:54 AM UTC 24 |
| Finished | Aug 23 01:07:57 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711400066 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_smoke.2711400066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_smoke_large_delays.3950825617 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 2926242041 ps |
| CPU time | 9.91 seconds |
| Started | Aug 23 01:07:57 AM UTC 24 |
| Finished | Aug 23 01:08:08 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950825617 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_smoke_large_delays.3950825617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_smoke_slow_rsp.1519899664 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 1202046219 ps |
| CPU time | 9.76 seconds |
| Started | Aug 23 01:07:57 AM UTC 24 |
| Finished | Aug 23 01:08:08 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519899664 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_smoke_slow_rsp.1519899664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_smoke_zero_delays.3514329494 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 8717860 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 01:07:57 AM UTC 24 |
| Finished | Aug 23 01:08:00 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514329494 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_smoke_zero_delays.3514329494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_stress_all.1524022195 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 1101600128 ps |
| CPU time | 29.55 seconds |
| Started | Aug 23 01:08:09 AM UTC 24 |
| Finished | Aug 23 01:08:40 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524022195 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_stress_all.1524022195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_stress_all_with_error.2463684605 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 1161278542 ps |
| CPU time | 19.83 seconds |
| Started | Aug 23 01:08:10 AM UTC 24 |
| Finished | Aug 23 01:08:31 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463684605 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_stress_all_with_error.2463684605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_stress_all_with_reset_error.2099998842 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 189869491 ps |
| CPU time | 18.14 seconds |
| Started | Aug 23 01:08:11 AM UTC 24 |
| Finished | Aug 23 01:08:30 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099998842 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_stress_all_with_reset_error.2099998842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/3.xbar_unmapped_addr.2302165507 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 310808741 ps |
| CPU time | 4.76 seconds |
| Started | Aug 23 01:08:08 AM UTC 24 |
| Finished | Aug 23 01:08:13 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302165507 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_unmapped_addr.2302165507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/3.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_access_same_device.290400228 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 2825245655 ps |
| CPU time | 15.16 seconds |
| Started | Aug 23 01:17:12 AM UTC 24 |
| Finished | Aug 23 01:17:28 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290400228 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_access_same_device.290400228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_access_same_device_slow_rsp.680006884 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 62767875319 ps |
| CPU time | 162.53 seconds |
| Started | Aug 23 01:17:12 AM UTC 24 |
| Finished | Aug 23 01:19:57 AM UTC 24 |
| Peak memory | 213824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=680006884 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_access_same_device_slow_rsp.680006884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_error_and_unmapped_addr.2539927045 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 2282331107 ps |
| CPU time | 5.97 seconds |
| Started | Aug 23 01:17:16 AM UTC 24 |
| Finished | Aug 23 01:17:23 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539927045 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_error_and_unmapped_addr.2539927045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_error_random.1312921867 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 1226051449 ps |
| CPU time | 6.5 seconds |
| Started | Aug 23 01:17:14 AM UTC 24 |
| Finished | Aug 23 01:17:21 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312921867 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_error_random.1312921867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_random.269857529 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 64929526 ps |
| CPU time | 4.58 seconds |
| Started | Aug 23 01:17:02 AM UTC 24 |
| Finished | Aug 23 01:17:08 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=269857529 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_random.269857529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_random_large_delays.577906228 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 32047379934 ps |
| CPU time | 122.87 seconds |
| Started | Aug 23 01:17:09 AM UTC 24 |
| Finished | Aug 23 01:19:14 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=577906228 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_random_large_delays.577906228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_random_slow_rsp.3087666399 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 14567422996 ps |
| CPU time | 96.8 seconds |
| Started | Aug 23 01:17:09 AM UTC 24 |
| Finished | Aug 23 01:18:47 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087666399 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_random_slow_rsp.3087666399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_random_zero_delays.3782116088 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 74443595 ps |
| CPU time | 4.27 seconds |
| Started | Aug 23 01:17:09 AM UTC 24 |
| Finished | Aug 23 01:17:14 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782116088 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_random_zero_delays.3782116088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_same_source.1570236597 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 50827686 ps |
| CPU time | 3.97 seconds |
| Started | Aug 23 01:17:12 AM UTC 24 |
| Finished | Aug 23 01:17:17 AM UTC 24 |
| Peak memory | 211788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570236597 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_same_source.1570236597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke.3038023987 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 62905804 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 01:16:58 AM UTC 24 |
| Finished | Aug 23 01:17:00 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038023987 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_smoke.3038023987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_large_delays.1176943807 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 5004304102 ps |
| CPU time | 9.06 seconds |
| Started | Aug 23 01:17:01 AM UTC 24 |
| Finished | Aug 23 01:17:11 AM UTC 24 |
| Peak memory | 212448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176943807 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_smoke_large_delays.1176943807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_slow_rsp.278115481 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 1474670462 ps |
| CPU time | 6.78 seconds |
| Started | Aug 23 01:17:02 AM UTC 24 |
| Finished | Aug 23 01:17:10 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278115481 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_smoke_slow_rsp.278115481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_zero_delays.1461964128 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 11834151 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 01:16:59 AM UTC 24 |
| Finished | Aug 23 01:17:01 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461964128 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_smoke_zero_delays.1461964128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all.2375014099 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 3795181314 ps |
| CPU time | 43.82 seconds |
| Started | Aug 23 01:17:18 AM UTC 24 |
| Finished | Aug 23 01:18:03 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375014099 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_stress_all.2375014099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_error.4145959144 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 2357843802 ps |
| CPU time | 26.54 seconds |
| Started | Aug 23 01:17:20 AM UTC 24 |
| Finished | Aug 23 01:17:48 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145959144 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_stress_all_with_error.4145959144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_rand_reset.3497901747 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 3573548574 ps |
| CPU time | 55.28 seconds |
| Started | Aug 23 01:17:18 AM UTC 24 |
| Finished | Aug 23 01:18:15 AM UTC 24 |
| Peak memory | 216296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497901747 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_stress_all_with_rand_reset.3497901747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_reset_error.3638723439 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 146069275 ps |
| CPU time | 21.37 seconds |
| Started | Aug 23 01:17:22 AM UTC 24 |
| Finished | Aug 23 01:17:45 AM UTC 24 |
| Peak memory | 214368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638723439 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_stress_all_with_reset_error.3638723439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/30.xbar_unmapped_addr.2421718124 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 162571560 ps |
| CPU time | 2.92 seconds |
| Started | Aug 23 01:17:15 AM UTC 24 |
| Finished | Aug 23 01:17:19 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421718124 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 30.xbar_unmapped_addr.2421718124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/30.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_access_same_device.1723359936 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 343047340 ps |
| CPU time | 4.23 seconds |
| Started | Aug 23 01:17:32 AM UTC 24 |
| Finished | Aug 23 01:17:37 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723359936 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_access_same_device.1723359936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_access_same_device_slow_rsp.448851652 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 68304760415 ps |
| CPU time | 151.14 seconds |
| Started | Aug 23 01:17:34 AM UTC 24 |
| Finished | Aug 23 01:20:08 AM UTC 24 |
| Peak memory | 214504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=448851652 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_access_same_device_slow_rsp.448851652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_error_and_unmapped_addr.564707106 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 951718614 ps |
| CPU time | 5.31 seconds |
| Started | Aug 23 01:17:40 AM UTC 24 |
| Finished | Aug 23 01:17:46 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=564707106 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_error_and_unmapped_addr.564707106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_error_random.2851886305 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 191905673 ps |
| CPU time | 3.28 seconds |
| Started | Aug 23 01:17:38 AM UTC 24 |
| Finished | Aug 23 01:17:42 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851886305 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_error_random.2851886305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_random.1574126719 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 11570554 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 01:17:29 AM UTC 24 |
| Finished | Aug 23 01:17:31 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574126719 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_random.1574126719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_random_large_delays.53630819 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 44076321046 ps |
| CPU time | 141.28 seconds |
| Started | Aug 23 01:17:31 AM UTC 24 |
| Finished | Aug 23 01:19:54 AM UTC 24 |
| Peak memory | 212260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53630819 -assert nopostproc +UVM_TESTNAME=xbar_base_ test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_random_large_delays.53630819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_random_slow_rsp.100193587 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 16093707765 ps |
| CPU time | 93.91 seconds |
| Started | Aug 23 01:17:31 AM UTC 24 |
| Finished | Aug 23 01:19:07 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=100193587 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_random_slow_rsp.100193587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_random_zero_delays.1060228422 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 36768391 ps |
| CPU time | 3.39 seconds |
| Started | Aug 23 01:17:29 AM UTC 24 |
| Finished | Aug 23 01:17:33 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060228422 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_random_zero_delays.1060228422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_same_source.3643775899 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 549710488 ps |
| CPU time | 7.47 seconds |
| Started | Aug 23 01:17:34 AM UTC 24 |
| Finished | Aug 23 01:17:43 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643775899 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_same_source.3643775899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke.951223479 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 223761848 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 01:17:25 AM UTC 24 |
| Finished | Aug 23 01:17:27 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951223479 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_smoke.951223479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_large_delays.1624691090 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 2707472715 ps |
| CPU time | 10.42 seconds |
| Started | Aug 23 01:17:27 AM UTC 24 |
| Finished | Aug 23 01:17:39 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624691090 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_smoke_large_delays.1624691090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_slow_rsp.3411081484 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 1473882794 ps |
| CPU time | 7.56 seconds |
| Started | Aug 23 01:17:29 AM UTC 24 |
| Finished | Aug 23 01:17:37 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411081484 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_smoke_slow_rsp.3411081484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_zero_delays.3989194867 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 9537959 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 01:17:27 AM UTC 24 |
| Finished | Aug 23 01:17:29 AM UTC 24 |
| Peak memory | 211184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989194867 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_smoke_zero_delays.3989194867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all.710764060 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 37346988 ps |
| CPU time | 4.74 seconds |
| Started | Aug 23 01:17:42 AM UTC 24 |
| Finished | Aug 23 01:17:48 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=710764060 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_stress_all.710764060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_error.3163404609 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 6218337630 ps |
| CPU time | 35.11 seconds |
| Started | Aug 23 01:17:44 AM UTC 24 |
| Finished | Aug 23 01:18:21 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163404609 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_stress_all_with_error.3163404609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_rand_reset.2138724864 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 96743509 ps |
| CPU time | 20.56 seconds |
| Started | Aug 23 01:17:44 AM UTC 24 |
| Finished | Aug 23 01:18:06 AM UTC 24 |
| Peak memory | 214184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138724864 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_stress_all_with_rand_reset.2138724864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_reset_error.2663545164 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 9679051954 ps |
| CPU time | 37.76 seconds |
| Started | Aug 23 01:17:44 AM UTC 24 |
| Finished | Aug 23 01:18:23 AM UTC 24 |
| Peak memory | 214236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663545164 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_stress_all_with_reset_error.2663545164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/31.xbar_unmapped_addr.663480242 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 46663709 ps |
| CPU time | 2.55 seconds |
| Started | Aug 23 01:17:39 AM UTC 24 |
| Finished | Aug 23 01:17:42 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=663480242 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 31.xbar_unmapped_addr.663480242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/31.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_access_same_device.1595037561 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 1452480594 ps |
| CPU time | 8.44 seconds |
| Started | Aug 23 01:17:51 AM UTC 24 |
| Finished | Aug 23 01:18:00 AM UTC 24 |
| Peak memory | 212312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595037561 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_access_same_device.1595037561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_access_same_device_slow_rsp.1959144071 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 6667048681 ps |
| CPU time | 43.31 seconds |
| Started | Aug 23 01:17:53 AM UTC 24 |
| Finished | Aug 23 01:18:38 AM UTC 24 |
| Peak memory | 212264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959144071 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_access_same_device_slow_rsp.1959144071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_error_and_unmapped_addr.2626003848 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 38621816 ps |
| CPU time | 2.9 seconds |
| Started | Aug 23 01:18:01 AM UTC 24 |
| Finished | Aug 23 01:18:05 AM UTC 24 |
| Peak memory | 212096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626003848 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_error_and_unmapped_addr.2626003848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_error_random.2011421030 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 70066769 ps |
| CPU time | 5.13 seconds |
| Started | Aug 23 01:17:57 AM UTC 24 |
| Finished | Aug 23 01:18:04 AM UTC 24 |
| Peak memory | 212256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011421030 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_error_random.2011421030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_random.1238881728 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 1544049868 ps |
| CPU time | 11.81 seconds |
| Started | Aug 23 01:17:49 AM UTC 24 |
| Finished | Aug 23 01:18:02 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238881728 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_random.1238881728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_random_large_delays.3466868848 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 31627584511 ps |
| CPU time | 69.19 seconds |
| Started | Aug 23 01:17:51 AM UTC 24 |
| Finished | Aug 23 01:19:01 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466868848 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_random_large_delays.3466868848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_random_zero_delays.676428784 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 72595607 ps |
| CPU time | 5.02 seconds |
| Started | Aug 23 01:17:51 AM UTC 24 |
| Finished | Aug 23 01:17:57 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676428784 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_random_zero_delays.676428784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_same_source.755849116 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 1308544661 ps |
| CPU time | 3.8 seconds |
| Started | Aug 23 01:17:56 AM UTC 24 |
| Finished | Aug 23 01:18:01 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755849116 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_same_source.755849116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke.72532191 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 452179402 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 01:17:45 AM UTC 24 |
| Finished | Aug 23 01:17:48 AM UTC 24 |
| Peak memory | 211184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=72532191 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs /coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_smoke.72532191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_large_delays.2206483510 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 2315404693 ps |
| CPU time | 8.46 seconds |
| Started | Aug 23 01:17:49 AM UTC 24 |
| Finished | Aug 23 01:17:58 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206483510 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_smoke_large_delays.2206483510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_slow_rsp.2585891570 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 1554386784 ps |
| CPU time | 5.26 seconds |
| Started | Aug 23 01:17:49 AM UTC 24 |
| Finished | Aug 23 01:17:55 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585891570 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_smoke_slow_rsp.2585891570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_zero_delays.1297436285 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 11824552 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 01:17:47 AM UTC 24 |
| Finished | Aug 23 01:17:49 AM UTC 24 |
| Peak memory | 211184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297436285 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_smoke_zero_delays.1297436285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all.2535051704 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 5392437482 ps |
| CPU time | 39.34 seconds |
| Started | Aug 23 01:18:01 AM UTC 24 |
| Finished | Aug 23 01:18:42 AM UTC 24 |
| Peak memory | 214012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535051704 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_stress_all.2535051704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_error.1551198106 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 57871574 ps |
| CPU time | 4.66 seconds |
| Started | Aug 23 01:18:03 AM UTC 24 |
| Finished | Aug 23 01:18:09 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551198106 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_stress_all_with_error.1551198106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_rand_reset.741851116 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 6047789166 ps |
| CPU time | 112.11 seconds |
| Started | Aug 23 01:18:03 AM UTC 24 |
| Finished | Aug 23 01:19:57 AM UTC 24 |
| Peak memory | 216288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741851116 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_stress_all_with_rand_reset.741851116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_reset_error.3072211496 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 6922601366 ps |
| CPU time | 76.96 seconds |
| Started | Aug 23 01:18:03 AM UTC 24 |
| Finished | Aug 23 01:19:22 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072211496 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_stress_all_with_reset_error.3072211496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/32.xbar_unmapped_addr.3610676387 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 677879331 ps |
| CPU time | 4.98 seconds |
| Started | Aug 23 01:17:59 AM UTC 24 |
| Finished | Aug 23 01:18:05 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610676387 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 32.xbar_unmapped_addr.3610676387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/32.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_access_same_device.2425822606 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 66050663 ps |
| CPU time | 4.03 seconds |
| Started | Aug 23 01:18:09 AM UTC 24 |
| Finished | Aug 23 01:18:15 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425822606 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_access_same_device.2425822606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_access_same_device_slow_rsp.2035908145 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 52647172129 ps |
| CPU time | 176.22 seconds |
| Started | Aug 23 01:18:12 AM UTC 24 |
| Finished | Aug 23 01:21:12 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035908145 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_access_same_device_slow_rsp.2035908145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_error_and_unmapped_addr.4043780005 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 53253417 ps |
| CPU time | 3.48 seconds |
| Started | Aug 23 01:18:17 AM UTC 24 |
| Finished | Aug 23 01:18:21 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043780005 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_error_and_unmapped_addr.4043780005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_error_random.2590347134 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 18179954 ps |
| CPU time | 2 seconds |
| Started | Aug 23 01:18:15 AM UTC 24 |
| Finished | Aug 23 01:18:18 AM UTC 24 |
| Peak memory | 211180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590347134 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_error_random.2590347134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_random.748129674 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 426455850 ps |
| CPU time | 7.3 seconds |
| Started | Aug 23 01:18:06 AM UTC 24 |
| Finished | Aug 23 01:18:15 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748129674 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_random.748129674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_random_large_delays.1774952585 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 41614289054 ps |
| CPU time | 101.32 seconds |
| Started | Aug 23 01:18:08 AM UTC 24 |
| Finished | Aug 23 01:19:52 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774952585 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_random_large_delays.1774952585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_random_slow_rsp.3156453771 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 39202248933 ps |
| CPU time | 157.1 seconds |
| Started | Aug 23 01:18:08 AM UTC 24 |
| Finished | Aug 23 01:20:48 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156453771 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_random_slow_rsp.3156453771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_random_zero_delays.4243332369 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 66432252 ps |
| CPU time | 2.44 seconds |
| Started | Aug 23 01:18:08 AM UTC 24 |
| Finished | Aug 23 01:18:12 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243332369 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_random_zero_delays.4243332369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_same_source.3466094630 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 744890467 ps |
| CPU time | 6.19 seconds |
| Started | Aug 23 01:18:14 AM UTC 24 |
| Finished | Aug 23 01:18:21 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466094630 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_same_source.3466094630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke.806884262 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 8597191 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 01:18:05 AM UTC 24 |
| Finished | Aug 23 01:18:07 AM UTC 24 |
| Peak memory | 211176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=806884262 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_smoke.806884262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_large_delays.628693479 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 2557954151 ps |
| CPU time | 10.62 seconds |
| Started | Aug 23 01:18:05 AM UTC 24 |
| Finished | Aug 23 01:18:17 AM UTC 24 |
| Peak memory | 212516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=628693479 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_smoke_large_delays.628693479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_slow_rsp.2797092153 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 1742481502 ps |
| CPU time | 8.17 seconds |
| Started | Aug 23 01:18:06 AM UTC 24 |
| Finished | Aug 23 01:18:16 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797092153 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_smoke_slow_rsp.2797092153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_zero_delays.3491352541 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 10298761 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 01:18:05 AM UTC 24 |
| Finished | Aug 23 01:18:07 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491352541 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_smoke_zero_delays.3491352541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all.773532462 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 2139078633 ps |
| CPU time | 23.88 seconds |
| Started | Aug 23 01:18:17 AM UTC 24 |
| Finished | Aug 23 01:18:42 AM UTC 24 |
| Peak memory | 214436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=773532462 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_stress_all.773532462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_error.1534625851 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 5377081398 ps |
| CPU time | 35.9 seconds |
| Started | Aug 23 01:18:19 AM UTC 24 |
| Finished | Aug 23 01:18:56 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534625851 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_stress_all_with_error.1534625851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_rand_reset.3998980067 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 285900854 ps |
| CPU time | 32.02 seconds |
| Started | Aug 23 01:18:18 AM UTC 24 |
| Finished | Aug 23 01:18:51 AM UTC 24 |
| Peak memory | 214184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998980067 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_stress_all_with_rand_reset.3998980067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/33.xbar_unmapped_addr.2547991720 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 37086126 ps |
| CPU time | 3.95 seconds |
| Started | Aug 23 01:18:17 AM UTC 24 |
| Finished | Aug 23 01:18:22 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547991720 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_unmapped_addr.2547991720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/33.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_access_same_device.3669374910 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 5369372976 ps |
| CPU time | 13.23 seconds |
| Started | Aug 23 01:18:32 AM UTC 24 |
| Finished | Aug 23 01:18:46 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669374910 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_access_same_device.3669374910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_access_same_device_slow_rsp.2279242379 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 18928490274 ps |
| CPU time | 99.64 seconds |
| Started | Aug 23 01:18:33 AM UTC 24 |
| Finished | Aug 23 01:20:15 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279242379 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_access_same_device_slow_rsp.2279242379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_error_and_unmapped_addr.486203270 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 38548954 ps |
| CPU time | 1.99 seconds |
| Started | Aug 23 01:18:39 AM UTC 24 |
| Finished | Aug 23 01:18:42 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486203270 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_error_and_unmapped_addr.486203270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_error_random.1906426246 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 1076150500 ps |
| CPU time | 11.49 seconds |
| Started | Aug 23 01:18:34 AM UTC 24 |
| Finished | Aug 23 01:18:47 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906426246 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_error_random.1906426246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_random.4011005880 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 70778857 ps |
| CPU time | 5.02 seconds |
| Started | Aug 23 01:18:25 AM UTC 24 |
| Finished | Aug 23 01:18:31 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011005880 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_random.4011005880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_random_large_delays.4011263789 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 19168996384 ps |
| CPU time | 68.14 seconds |
| Started | Aug 23 01:18:25 AM UTC 24 |
| Finished | Aug 23 01:19:35 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011263789 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_random_large_delays.4011263789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_random_slow_rsp.3906993030 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 19343305685 ps |
| CPU time | 105.52 seconds |
| Started | Aug 23 01:18:30 AM UTC 24 |
| Finished | Aug 23 01:20:18 AM UTC 24 |
| Peak memory | 212524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906993030 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_random_slow_rsp.3906993030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_random_zero_delays.194388213 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 46976914 ps |
| CPU time | 3.64 seconds |
| Started | Aug 23 01:18:25 AM UTC 24 |
| Finished | Aug 23 01:18:30 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=194388213 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_random_zero_delays.194388213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_same_source.439716490 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 845231220 ps |
| CPU time | 3.66 seconds |
| Started | Aug 23 01:18:34 AM UTC 24 |
| Finished | Aug 23 01:18:39 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439716490 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_same_source.439716490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke.506476081 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 139371918 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 01:18:22 AM UTC 24 |
| Finished | Aug 23 01:18:24 AM UTC 24 |
| Peak memory | 211128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=506476081 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_smoke.506476081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_large_delays.3561614710 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 17330857701 ps |
| CPU time | 10.26 seconds |
| Started | Aug 23 01:18:22 AM UTC 24 |
| Finished | Aug 23 01:18:34 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561614710 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_smoke_large_delays.3561614710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_slow_rsp.3796179551 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 1398726245 ps |
| CPU time | 6.9 seconds |
| Started | Aug 23 01:18:23 AM UTC 24 |
| Finished | Aug 23 01:18:31 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796179551 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_smoke_slow_rsp.3796179551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_zero_delays.2465728648 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 17805647 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 01:18:22 AM UTC 24 |
| Finished | Aug 23 01:18:24 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465728648 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_smoke_zero_delays.2465728648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all.1377180913 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 570128337 ps |
| CPU time | 19.46 seconds |
| Started | Aug 23 01:18:40 AM UTC 24 |
| Finished | Aug 23 01:19:01 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377180913 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_stress_all.1377180913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_error.2869683693 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 348278846 ps |
| CPU time | 24.6 seconds |
| Started | Aug 23 01:18:43 AM UTC 24 |
| Finished | Aug 23 01:19:09 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869683693 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_stress_all_with_error.2869683693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_rand_reset.1184384275 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 6724473 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 01:18:42 AM UTC 24 |
| Finished | Aug 23 01:18:43 AM UTC 24 |
| Peak memory | 202420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184384275 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_stress_all_with_rand_reset.1184384275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_reset_error.1028101947 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 162361437 ps |
| CPU time | 12.56 seconds |
| Started | Aug 23 01:18:43 AM UTC 24 |
| Finished | Aug 23 01:18:57 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1028101947 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_stress_all_with_reset_error.1028101947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/34.xbar_unmapped_addr.1662623118 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 755961515 ps |
| CPU time | 10.47 seconds |
| Started | Aug 23 01:18:36 AM UTC 24 |
| Finished | Aug 23 01:18:48 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662623118 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 34.xbar_unmapped_addr.1662623118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/34.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_access_same_device.277978347 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 257502650 ps |
| CPU time | 10.21 seconds |
| Started | Aug 23 01:18:49 AM UTC 24 |
| Finished | Aug 23 01:19:01 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277978347 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_access_same_device.277978347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_access_same_device_slow_rsp.4061534487 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 11602409552 ps |
| CPU time | 58.5 seconds |
| Started | Aug 23 01:18:53 AM UTC 24 |
| Finished | Aug 23 01:19:53 AM UTC 24 |
| Peak memory | 214568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061534487 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_access_same_device_slow_rsp.4061534487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_error_and_unmapped_addr.2487170041 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 285905078 ps |
| CPU time | 4.67 seconds |
| Started | Aug 23 01:18:58 AM UTC 24 |
| Finished | Aug 23 01:19:04 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487170041 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_error_and_unmapped_addr.2487170041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_error_random.555609116 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 903290605 ps |
| CPU time | 11.67 seconds |
| Started | Aug 23 01:18:53 AM UTC 24 |
| Finished | Aug 23 01:19:06 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=555609116 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_error_random.555609116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_random.4229789132 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 1009851722 ps |
| CPU time | 13.55 seconds |
| Started | Aug 23 01:18:47 AM UTC 24 |
| Finished | Aug 23 01:19:02 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229789132 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_random.4229789132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_random_large_delays.3952912388 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 1819409233 ps |
| CPU time | 8.03 seconds |
| Started | Aug 23 01:18:49 AM UTC 24 |
| Finished | Aug 23 01:18:59 AM UTC 24 |
| Peak memory | 211816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952912388 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_random_large_delays.3952912388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_random_slow_rsp.3840386003 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 50118899534 ps |
| CPU time | 145.12 seconds |
| Started | Aug 23 01:18:49 AM UTC 24 |
| Finished | Aug 23 01:21:17 AM UTC 24 |
| Peak memory | 212204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840386003 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_random_slow_rsp.3840386003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_random_zero_delays.4094605050 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 52866772 ps |
| CPU time | 2.25 seconds |
| Started | Aug 23 01:18:49 AM UTC 24 |
| Finished | Aug 23 01:18:53 AM UTC 24 |
| Peak memory | 211672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094605050 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_random_zero_delays.4094605050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_same_source.1123490276 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 1292534324 ps |
| CPU time | 10.5 seconds |
| Started | Aug 23 01:18:53 AM UTC 24 |
| Finished | Aug 23 01:19:05 AM UTC 24 |
| Peak memory | 211936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123490276 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_same_source.1123490276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke.1815890221 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 144923339 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 01:18:43 AM UTC 24 |
| Finished | Aug 23 01:18:46 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815890221 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_smoke.1815890221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_large_delays.3419858813 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 1067216064 ps |
| CPU time | 5.23 seconds |
| Started | Aug 23 01:18:47 AM UTC 24 |
| Finished | Aug 23 01:18:54 AM UTC 24 |
| Peak memory | 211776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3419858813 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_smoke_large_delays.3419858813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_slow_rsp.3178341171 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 2981820435 ps |
| CPU time | 4.05 seconds |
| Started | Aug 23 01:18:47 AM UTC 24 |
| Finished | Aug 23 01:18:53 AM UTC 24 |
| Peak memory | 212080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178341171 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_smoke_slow_rsp.3178341171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_zero_delays.1557315358 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 11846135 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 01:18:45 AM UTC 24 |
| Finished | Aug 23 01:18:47 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557315358 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_smoke_zero_delays.1557315358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all.2899228923 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 13503396203 ps |
| CPU time | 98.42 seconds |
| Started | Aug 23 01:18:58 AM UTC 24 |
| Finished | Aug 23 01:20:39 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899228923 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_stress_all.2899228923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_error.4156868317 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 5961843749 ps |
| CPU time | 86.74 seconds |
| Started | Aug 23 01:19:00 AM UTC 24 |
| Finished | Aug 23 01:20:28 AM UTC 24 |
| Peak memory | 214440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156868317 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_stress_all_with_error.4156868317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_rand_reset.1894703854 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 5620214543 ps |
| CPU time | 142.06 seconds |
| Started | Aug 23 01:18:58 AM UTC 24 |
| Finished | Aug 23 01:21:23 AM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1894703854 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_stress_all_with_rand_reset.1894703854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_reset_error.1687504918 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 1147705425 ps |
| CPU time | 67.01 seconds |
| Started | Aug 23 01:19:02 AM UTC 24 |
| Finished | Aug 23 01:20:11 AM UTC 24 |
| Peak memory | 214172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687504918 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_stress_all_with_reset_error.1687504918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/35.xbar_unmapped_addr.3161464494 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 10688514 ps |
| CPU time | 1.09 seconds |
| Started | Aug 23 01:18:55 AM UTC 24 |
| Finished | Aug 23 01:18:57 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161464494 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 35.xbar_unmapped_addr.3161464494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/35.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_access_same_device.2057991863 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 67487740 ps |
| CPU time | 10.29 seconds |
| Started | Aug 23 01:19:07 AM UTC 24 |
| Finished | Aug 23 01:19:19 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057991863 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_access_same_device.2057991863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_access_same_device_slow_rsp.224461302 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 3991200526 ps |
| CPU time | 17.75 seconds |
| Started | Aug 23 01:19:09 AM UTC 24 |
| Finished | Aug 23 01:19:27 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=224461302 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_access_same_device_slow_rsp.224461302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_error_and_unmapped_addr.3307162550 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 1327767823 ps |
| CPU time | 8.1 seconds |
| Started | Aug 23 01:19:15 AM UTC 24 |
| Finished | Aug 23 01:19:24 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307162550 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_error_and_unmapped_addr.3307162550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_error_random.3733551236 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 1004813626 ps |
| CPU time | 12.35 seconds |
| Started | Aug 23 01:19:11 AM UTC 24 |
| Finished | Aug 23 01:19:25 AM UTC 24 |
| Peak memory | 211900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733551236 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_error_random.3733551236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_random.1081444813 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 751789041 ps |
| CPU time | 10.36 seconds |
| Started | Aug 23 01:19:06 AM UTC 24 |
| Finished | Aug 23 01:19:17 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081444813 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_random.1081444813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_random_large_delays.2678748083 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 51076940954 ps |
| CPU time | 66.62 seconds |
| Started | Aug 23 01:19:06 AM UTC 24 |
| Finished | Aug 23 01:20:14 AM UTC 24 |
| Peak memory | 212520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678748083 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_random_large_delays.2678748083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_random_slow_rsp.2224658574 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 11990117704 ps |
| CPU time | 55.12 seconds |
| Started | Aug 23 01:19:07 AM UTC 24 |
| Finished | Aug 23 01:20:04 AM UTC 24 |
| Peak memory | 212184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224658574 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_random_slow_rsp.2224658574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_random_zero_delays.2261677626 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 57145799 ps |
| CPU time | 3.07 seconds |
| Started | Aug 23 01:19:06 AM UTC 24 |
| Finished | Aug 23 01:19:10 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261677626 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_random_zero_delays.2261677626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_same_source.4061386499 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 72430965 ps |
| CPU time | 4.5 seconds |
| Started | Aug 23 01:19:10 AM UTC 24 |
| Finished | Aug 23 01:19:15 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061386499 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_same_source.4061386499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke.530458906 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 10390709 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 01:19:02 AM UTC 24 |
| Finished | Aug 23 01:19:05 AM UTC 24 |
| Peak memory | 211180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530458906 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_smoke.530458906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_large_delays.3210436272 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 3883443162 ps |
| CPU time | 5.33 seconds |
| Started | Aug 23 01:19:04 AM UTC 24 |
| Finished | Aug 23 01:19:10 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210436272 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_smoke_large_delays.3210436272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_slow_rsp.2047798134 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 1322938072 ps |
| CPU time | 8.21 seconds |
| Started | Aug 23 01:19:04 AM UTC 24 |
| Finished | Aug 23 01:19:13 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047798134 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_smoke_slow_rsp.2047798134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_zero_delays.2959454116 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 9967317 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 01:19:02 AM UTC 24 |
| Finished | Aug 23 01:19:04 AM UTC 24 |
| Peak memory | 211084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959454116 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_smoke_zero_delays.2959454116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all.3671996299 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 387459701 ps |
| CPU time | 28.93 seconds |
| Started | Aug 23 01:19:15 AM UTC 24 |
| Finished | Aug 23 01:19:45 AM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671996299 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_stress_all.3671996299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_error.2990782499 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 216958279 ps |
| CPU time | 16.08 seconds |
| Started | Aug 23 01:19:19 AM UTC 24 |
| Finished | Aug 23 01:19:36 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990782499 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_stress_all_with_error.2990782499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_rand_reset.1375621775 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 190944925 ps |
| CPU time | 9.63 seconds |
| Started | Aug 23 01:19:16 AM UTC 24 |
| Finished | Aug 23 01:19:27 AM UTC 24 |
| Peak memory | 214376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375621775 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_stress_all_with_rand_reset.1375621775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_reset_error.1316605701 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 9773816486 ps |
| CPU time | 96.82 seconds |
| Started | Aug 23 01:19:20 AM UTC 24 |
| Finished | Aug 23 01:20:59 AM UTC 24 |
| Peak memory | 216416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316605701 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_stress_all_with_reset_error.1316605701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/36.xbar_unmapped_addr.2565824121 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 1793762270 ps |
| CPU time | 11.27 seconds |
| Started | Aug 23 01:19:11 AM UTC 24 |
| Finished | Aug 23 01:19:24 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565824121 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 36.xbar_unmapped_addr.2565824121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/36.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_access_same_device.1905822921 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 96432821 ps |
| CPU time | 8.2 seconds |
| Started | Aug 23 01:19:30 AM UTC 24 |
| Finished | Aug 23 01:19:39 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905822921 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_access_same_device.1905822921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_access_same_device_slow_rsp.3325896274 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 48641077627 ps |
| CPU time | 245.83 seconds |
| Started | Aug 23 01:19:30 AM UTC 24 |
| Finished | Aug 23 01:23:39 AM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325896274 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_access_same_device_slow_rsp.3325896274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_error_and_unmapped_addr.3876113933 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 48792135 ps |
| CPU time | 3.09 seconds |
| Started | Aug 23 01:19:36 AM UTC 24 |
| Finished | Aug 23 01:19:40 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876113933 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_error_and_unmapped_addr.3876113933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_error_random.3652782482 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 414639875 ps |
| CPU time | 2.23 seconds |
| Started | Aug 23 01:19:34 AM UTC 24 |
| Finished | Aug 23 01:19:37 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652782482 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_error_random.3652782482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_random.2638000544 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 15900583 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 01:19:27 AM UTC 24 |
| Finished | Aug 23 01:19:29 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638000544 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_random.2638000544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_random_large_delays.1714764123 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 14664884085 ps |
| CPU time | 59.13 seconds |
| Started | Aug 23 01:19:28 AM UTC 24 |
| Finished | Aug 23 01:20:29 AM UTC 24 |
| Peak memory | 211656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714764123 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_random_large_delays.1714764123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_random_slow_rsp.3213081180 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 68902777386 ps |
| CPU time | 75.97 seconds |
| Started | Aug 23 01:19:28 AM UTC 24 |
| Finished | Aug 23 01:20:46 AM UTC 24 |
| Peak memory | 211412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213081180 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_random_slow_rsp.3213081180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_random_zero_delays.4172093882 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 12488089 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 01:19:27 AM UTC 24 |
| Finished | Aug 23 01:19:29 AM UTC 24 |
| Peak memory | 211128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172093882 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_random_zero_delays.4172093882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_same_source.4244325078 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 1007398410 ps |
| CPU time | 11.22 seconds |
| Started | Aug 23 01:19:30 AM UTC 24 |
| Finished | Aug 23 01:19:42 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244325078 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_same_source.4244325078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke.794430533 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 52091374 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 01:19:23 AM UTC 24 |
| Finished | Aug 23 01:19:26 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=794430533 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vc s/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_smoke.794430533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_large_delays.2343810429 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 1442825825 ps |
| CPU time | 6.64 seconds |
| Started | Aug 23 01:19:25 AM UTC 24 |
| Finished | Aug 23 01:19:33 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343810429 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_smoke_large_delays.2343810429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_slow_rsp.3360696141 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 1840862719 ps |
| CPU time | 8.37 seconds |
| Started | Aug 23 01:19:25 AM UTC 24 |
| Finished | Aug 23 01:19:35 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360696141 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_smoke_slow_rsp.3360696141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_zero_delays.887341500 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 8545994 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 01:19:25 AM UTC 24 |
| Finished | Aug 23 01:19:27 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=887341500 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_smoke_zero_delays.887341500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all.2761601481 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 842573075 ps |
| CPU time | 6.9 seconds |
| Started | Aug 23 01:19:37 AM UTC 24 |
| Finished | Aug 23 01:19:45 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761601481 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_stress_all.2761601481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all_with_error.1590069140 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 5351719935 ps |
| CPU time | 52.81 seconds |
| Started | Aug 23 01:19:41 AM UTC 24 |
| Finished | Aug 23 01:20:36 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590069140 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_stress_all_with_error.1590069140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all_with_rand_reset.16573552 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 612291761 ps |
| CPU time | 55.78 seconds |
| Started | Aug 23 01:19:38 AM UTC 24 |
| Finished | Aug 23 01:20:36 AM UTC 24 |
| Peak memory | 214188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16573552 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_stress_all_with_rand_reset.16573552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all_with_reset_error.623361703 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 1066128383 ps |
| CPU time | 51.12 seconds |
| Started | Aug 23 01:19:42 AM UTC 24 |
| Finished | Aug 23 01:20:35 AM UTC 24 |
| Peak memory | 214188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=623361703 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_stress_all_with_reset_error.623361703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/37.xbar_unmapped_addr.1170971620 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 544817286 ps |
| CPU time | 5.57 seconds |
| Started | Aug 23 01:19:36 AM UTC 24 |
| Finished | Aug 23 01:19:43 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170971620 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 37.xbar_unmapped_addr.1170971620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/37.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_access_same_device.1357299152 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 50239649 ps |
| CPU time | 7.53 seconds |
| Started | Aug 23 01:19:53 AM UTC 24 |
| Finished | Aug 23 01:20:01 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357299152 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_access_same_device.1357299152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_access_same_device_slow_rsp.2034075363 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 46977513375 ps |
| CPU time | 220.44 seconds |
| Started | Aug 23 01:19:53 AM UTC 24 |
| Finished | Aug 23 01:23:36 AM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034075363 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_access_same_device_slow_rsp.2034075363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_error_and_unmapped_addr.1670138735 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 913285022 ps |
| CPU time | 3.47 seconds |
| Started | Aug 23 01:19:56 AM UTC 24 |
| Finished | Aug 23 01:20:01 AM UTC 24 |
| Peak memory | 212204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670138735 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_error_and_unmapped_addr.1670138735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_error_random.969326305 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 816845174 ps |
| CPU time | 2.84 seconds |
| Started | Aug 23 01:19:54 AM UTC 24 |
| Finished | Aug 23 01:19:58 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969326305 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_error_random.969326305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_random.1838594099 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 121084492 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 01:19:47 AM UTC 24 |
| Finished | Aug 23 01:19:50 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838594099 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_random.1838594099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_random_large_delays.3473883210 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 167259521223 ps |
| CPU time | 116.94 seconds |
| Started | Aug 23 01:19:47 AM UTC 24 |
| Finished | Aug 23 01:21:46 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473883210 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_random_large_delays.3473883210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_random_slow_rsp.2833183824 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 9508692275 ps |
| CPU time | 41.7 seconds |
| Started | Aug 23 01:19:50 AM UTC 24 |
| Finished | Aug 23 01:20:33 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833183824 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_random_slow_rsp.2833183824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_random_zero_delays.4198502099 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 76171360 ps |
| CPU time | 4.27 seconds |
| Started | Aug 23 01:19:47 AM UTC 24 |
| Finished | Aug 23 01:19:52 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198502099 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_random_zero_delays.4198502099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_same_source.1883512766 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 20109051 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 01:19:54 AM UTC 24 |
| Finished | Aug 23 01:19:57 AM UTC 24 |
| Peak memory | 211180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883512766 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_same_source.1883512766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke.3356103022 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 78898231 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 01:19:42 AM UTC 24 |
| Finished | Aug 23 01:19:45 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356103022 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_smoke.3356103022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_large_delays.3945090327 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 3027479710 ps |
| CPU time | 7.35 seconds |
| Started | Aug 23 01:19:44 AM UTC 24 |
| Finished | Aug 23 01:19:52 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945090327 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_smoke_large_delays.3945090327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_slow_rsp.4094715776 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 1995482709 ps |
| CPU time | 5.33 seconds |
| Started | Aug 23 01:19:47 AM UTC 24 |
| Finished | Aug 23 01:19:53 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094715776 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_smoke_slow_rsp.4094715776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_zero_delays.467786486 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 39273494 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 01:19:44 AM UTC 24 |
| Finished | Aug 23 01:19:46 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=467786486 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_smoke_zero_delays.467786486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_error.3012243224 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 9072703294 ps |
| CPU time | 84.88 seconds |
| Started | Aug 23 01:19:59 AM UTC 24 |
| Finished | Aug 23 01:21:25 AM UTC 24 |
| Peak memory | 214568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012243224 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_stress_all_with_error.3012243224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_rand_reset.2883434385 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 255636230 ps |
| CPU time | 33.19 seconds |
| Started | Aug 23 01:19:59 AM UTC 24 |
| Finished | Aug 23 01:20:33 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883434385 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_stress_all_with_rand_reset.2883434385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_reset_error.2122010529 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 506492855 ps |
| CPU time | 51.59 seconds |
| Started | Aug 23 01:20:00 AM UTC 24 |
| Finished | Aug 23 01:20:54 AM UTC 24 |
| Peak memory | 216300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122010529 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_stress_all_with_reset_error.2122010529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/38.xbar_unmapped_addr.3178302343 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 333937424 ps |
| CPU time | 3.35 seconds |
| Started | Aug 23 01:19:54 AM UTC 24 |
| Finished | Aug 23 01:19:59 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178302343 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 38.xbar_unmapped_addr.3178302343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/38.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_access_same_device.607594180 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 1024540716 ps |
| CPU time | 7.38 seconds |
| Started | Aug 23 01:20:09 AM UTC 24 |
| Finished | Aug 23 01:20:18 AM UTC 24 |
| Peak memory | 211824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607594180 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_access_same_device.607594180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_error_and_unmapped_addr.2478766758 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 829345244 ps |
| CPU time | 4.65 seconds |
| Started | Aug 23 01:20:16 AM UTC 24 |
| Finished | Aug 23 01:20:22 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478766758 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_error_and_unmapped_addr.2478766758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_error_random.3083140121 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 360950903 ps |
| CPU time | 4.68 seconds |
| Started | Aug 23 01:20:13 AM UTC 24 |
| Finished | Aug 23 01:20:19 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083140121 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_error_random.3083140121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_random.2207786448 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 363233737 ps |
| CPU time | 4.28 seconds |
| Started | Aug 23 01:20:03 AM UTC 24 |
| Finished | Aug 23 01:20:08 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207786448 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_random.2207786448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_random_large_delays.506928086 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 23230399335 ps |
| CPU time | 79.14 seconds |
| Started | Aug 23 01:20:06 AM UTC 24 |
| Finished | Aug 23 01:21:27 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=506928086 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_random_large_delays.506928086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_random_slow_rsp.1849905574 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 6609700371 ps |
| CPU time | 30.41 seconds |
| Started | Aug 23 01:20:09 AM UTC 24 |
| Finished | Aug 23 01:20:41 AM UTC 24 |
| Peak memory | 212224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849905574 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_random_slow_rsp.1849905574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_random_zero_delays.416880054 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 137392156 ps |
| CPU time | 6.76 seconds |
| Started | Aug 23 01:20:04 AM UTC 24 |
| Finished | Aug 23 01:20:12 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=416880054 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_random_zero_delays.416880054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_same_source.2287952036 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 33131830 ps |
| CPU time | 3.08 seconds |
| Started | Aug 23 01:20:12 AM UTC 24 |
| Finished | Aug 23 01:20:16 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287952036 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_same_source.2287952036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke.3317471617 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 128835170 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 01:20:00 AM UTC 24 |
| Finished | Aug 23 01:20:03 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317471617 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_smoke.3317471617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_large_delays.1757008721 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 4438982719 ps |
| CPU time | 6.57 seconds |
| Started | Aug 23 01:20:02 AM UTC 24 |
| Finished | Aug 23 01:20:09 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757008721 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_smoke_large_delays.1757008721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_slow_rsp.393781731 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 1748617454 ps |
| CPU time | 10.86 seconds |
| Started | Aug 23 01:20:03 AM UTC 24 |
| Finished | Aug 23 01:20:15 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393781731 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_smoke_slow_rsp.393781731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_zero_delays.4291692337 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 11228685 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 01:20:00 AM UTC 24 |
| Finished | Aug 23 01:20:03 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291692337 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_smoke_zero_delays.4291692337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all.2884991547 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 191775865 ps |
| CPU time | 4.1 seconds |
| Started | Aug 23 01:20:16 AM UTC 24 |
| Finished | Aug 23 01:20:21 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884991547 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_stress_all.2884991547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_error.2329239278 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 660110189 ps |
| CPU time | 15.21 seconds |
| Started | Aug 23 01:20:19 AM UTC 24 |
| Finished | Aug 23 01:20:35 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329239278 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_stress_all_with_error.2329239278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_rand_reset.459186769 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 8077182856 ps |
| CPU time | 75.65 seconds |
| Started | Aug 23 01:20:17 AM UTC 24 |
| Finished | Aug 23 01:21:35 AM UTC 24 |
| Peak memory | 216288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=459186769 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_stress_all_with_rand_reset.459186769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_reset_error.4125926926 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 879417744 ps |
| CPU time | 109.91 seconds |
| Started | Aug 23 01:20:19 AM UTC 24 |
| Finished | Aug 23 01:22:11 AM UTC 24 |
| Peak memory | 216220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125926926 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_stress_all_with_reset_error.4125926926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/39.xbar_unmapped_addr.1535300102 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 60995099 ps |
| CPU time | 3.05 seconds |
| Started | Aug 23 01:20:16 AM UTC 24 |
| Finished | Aug 23 01:20:20 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535300102 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 39.xbar_unmapped_addr.1535300102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/39.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_access_same_device.834880032 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 820728846 ps |
| CPU time | 10.76 seconds |
| Started | Aug 23 01:08:22 AM UTC 24 |
| Finished | Aug 23 01:08:34 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=834880032 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_access_same_device.834880032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_access_same_device_slow_rsp.861788820 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 7571273105 ps |
| CPU time | 39.4 seconds |
| Started | Aug 23 01:08:27 AM UTC 24 |
| Finished | Aug 23 01:09:08 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=861788820 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_access_same_device_slow_rsp.861788820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_error_and_unmapped_addr.731801323 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 559247852 ps |
| CPU time | 10.41 seconds |
| Started | Aug 23 01:08:32 AM UTC 24 |
| Finished | Aug 23 01:08:43 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=731801323 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_error_and_unmapped_addr.731801323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_error_random.3983471199 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 84311827 ps |
| CPU time | 6.78 seconds |
| Started | Aug 23 01:08:29 AM UTC 24 |
| Finished | Aug 23 01:08:37 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983471199 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_error_random.3983471199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_random.1292610301 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 3144161737 ps |
| CPU time | 15.35 seconds |
| Started | Aug 23 01:08:15 AM UTC 24 |
| Finished | Aug 23 01:08:32 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292610301 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_random.1292610301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_random_large_delays.2196928303 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 25043867390 ps |
| CPU time | 122.47 seconds |
| Started | Aug 23 01:08:20 AM UTC 24 |
| Finished | Aug 23 01:10:24 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2196928303 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_random_large_delays.2196928303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_random_slow_rsp.2778534160 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 25094048301 ps |
| CPU time | 82.71 seconds |
| Started | Aug 23 01:08:20 AM UTC 24 |
| Finished | Aug 23 01:09:44 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778534160 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_random_slow_rsp.2778534160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_random_zero_delays.2808155540 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 9531779 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 01:08:19 AM UTC 24 |
| Finished | Aug 23 01:08:21 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808155540 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_random_zero_delays.2808155540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_same_source.1682326463 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 90142870 ps |
| CPU time | 6.48 seconds |
| Started | Aug 23 01:08:29 AM UTC 24 |
| Finished | Aug 23 01:08:37 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682326463 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_same_source.1682326463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_smoke.2065668121 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 88239539 ps |
| CPU time | 2.62 seconds |
| Started | Aug 23 01:08:11 AM UTC 24 |
| Finished | Aug 23 01:08:15 AM UTC 24 |
| Peak memory | 212452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065668121 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_smoke.2065668121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_smoke_large_delays.4272366913 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 2868011373 ps |
| CPU time | 15.94 seconds |
| Started | Aug 23 01:08:14 AM UTC 24 |
| Finished | Aug 23 01:08:31 AM UTC 24 |
| Peak memory | 212448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272366913 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_smoke_large_delays.4272366913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_smoke_slow_rsp.2359652969 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 2046848487 ps |
| CPU time | 12.36 seconds |
| Started | Aug 23 01:08:15 AM UTC 24 |
| Finished | Aug 23 01:08:29 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359652969 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_smoke_slow_rsp.2359652969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_smoke_zero_delays.1131052315 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 8551066 ps |
| CPU time | 1.66 seconds |
| Started | Aug 23 01:08:12 AM UTC 24 |
| Finished | Aug 23 01:08:15 AM UTC 24 |
| Peak memory | 211176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131052315 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_smoke_zero_delays.1131052315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_stress_all_with_error.3886859770 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 1203066130 ps |
| CPU time | 24.25 seconds |
| Started | Aug 23 01:08:33 AM UTC 24 |
| Finished | Aug 23 01:08:58 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886859770 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_stress_all_with_error.3886859770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_stress_all_with_rand_reset.1081625312 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 137295995 ps |
| CPU time | 23.16 seconds |
| Started | Aug 23 01:08:33 AM UTC 24 |
| Finished | Aug 23 01:08:57 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081625312 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_stress_all_with_rand_reset.1081625312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/4.xbar_unmapped_addr.1982220271 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 77777733 ps |
| CPU time | 5.31 seconds |
| Started | Aug 23 01:08:31 AM UTC 24 |
| Finished | Aug 23 01:08:38 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982220271 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 4.xbar_unmapped_addr.1982220271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/4.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_access_same_device.1011987501 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 3940928752 ps |
| CPU time | 15.78 seconds |
| Started | Aug 23 01:20:30 AM UTC 24 |
| Finished | Aug 23 01:20:47 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011987501 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_access_same_device.1011987501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_access_same_device_slow_rsp.2108402855 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 21981695865 ps |
| CPU time | 141.78 seconds |
| Started | Aug 23 01:20:32 AM UTC 24 |
| Finished | Aug 23 01:22:56 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108402855 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_access_same_device_slow_rsp.2108402855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_error_and_unmapped_addr.769288847 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 419552978 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 01:20:36 AM UTC 24 |
| Finished | Aug 23 01:20:38 AM UTC 24 |
| Peak memory | 210292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769288847 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_error_and_unmapped_addr.769288847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_error_random.3847845169 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 68947695 ps |
| CPU time | 5.21 seconds |
| Started | Aug 23 01:20:34 AM UTC 24 |
| Finished | Aug 23 01:20:40 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847845169 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_error_random.3847845169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_random.1594019588 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 872557578 ps |
| CPU time | 10.85 seconds |
| Started | Aug 23 01:20:23 AM UTC 24 |
| Finished | Aug 23 01:20:35 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594019588 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_random.1594019588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_random_large_delays.53530833 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 8545278743 ps |
| CPU time | 35.32 seconds |
| Started | Aug 23 01:20:30 AM UTC 24 |
| Finished | Aug 23 01:21:07 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53530833 -assert nopostproc +UVM_TESTNAME=xbar_base_ test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_random_large_delays.53530833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_random_slow_rsp.482860167 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 22919705298 ps |
| CPU time | 78.24 seconds |
| Started | Aug 23 01:20:30 AM UTC 24 |
| Finished | Aug 23 01:21:50 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=482860167 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_random_slow_rsp.482860167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_random_zero_delays.4198580300 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 387944522 ps |
| CPU time | 7.59 seconds |
| Started | Aug 23 01:20:24 AM UTC 24 |
| Finished | Aug 23 01:20:33 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198580300 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_random_zero_delays.4198580300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_same_source.471226629 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 787831104 ps |
| CPU time | 9.78 seconds |
| Started | Aug 23 01:20:34 AM UTC 24 |
| Finished | Aug 23 01:20:45 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471226629 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_same_source.471226629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke.2629366146 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 92184191 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 01:20:20 AM UTC 24 |
| Finished | Aug 23 01:20:22 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629366146 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_smoke.2629366146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_large_delays.297229556 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 2120786599 ps |
| CPU time | 6.75 seconds |
| Started | Aug 23 01:20:22 AM UTC 24 |
| Finished | Aug 23 01:20:29 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=297229556 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_smoke_large_delays.297229556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_slow_rsp.1433402074 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 1126466758 ps |
| CPU time | 7.04 seconds |
| Started | Aug 23 01:20:23 AM UTC 24 |
| Finished | Aug 23 01:20:31 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433402074 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_smoke_slow_rsp.1433402074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_zero_delays.2586176552 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 8696021 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 01:20:21 AM UTC 24 |
| Finished | Aug 23 01:20:23 AM UTC 24 |
| Peak memory | 211052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586176552 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_smoke_zero_delays.2586176552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all.501423332 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 4221123380 ps |
| CPU time | 48.68 seconds |
| Started | Aug 23 01:20:36 AM UTC 24 |
| Finished | Aug 23 01:21:26 AM UTC 24 |
| Peak memory | 213632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=501423332 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_stress_all.501423332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_error.3363116578 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 10799042418 ps |
| CPU time | 50.69 seconds |
| Started | Aug 23 01:20:38 AM UTC 24 |
| Finished | Aug 23 01:21:30 AM UTC 24 |
| Peak memory | 216484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363116578 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_stress_all_with_error.3363116578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_rand_reset.4232251198 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 3813778307 ps |
| CPU time | 71.81 seconds |
| Started | Aug 23 01:20:38 AM UTC 24 |
| Finished | Aug 23 01:21:51 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232251198 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_stress_all_with_rand_reset.4232251198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_reset_error.1960598846 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 83208774 ps |
| CPU time | 5.26 seconds |
| Started | Aug 23 01:20:38 AM UTC 24 |
| Finished | Aug 23 01:20:44 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960598846 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_stress_all_with_reset_error.1960598846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/40.xbar_unmapped_addr.1194803975 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 1016189428 ps |
| CPU time | 6.21 seconds |
| Started | Aug 23 01:20:36 AM UTC 24 |
| Finished | Aug 23 01:20:43 AM UTC 24 |
| Peak memory | 211632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194803975 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 40.xbar_unmapped_addr.1194803975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/40.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_access_same_device.2733271447 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 1699328567 ps |
| CPU time | 7.68 seconds |
| Started | Aug 23 01:20:47 AM UTC 24 |
| Finished | Aug 23 01:20:56 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733271447 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_access_same_device.2733271447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_access_same_device_slow_rsp.849245695 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 76611912302 ps |
| CPU time | 203.96 seconds |
| Started | Aug 23 01:20:47 AM UTC 24 |
| Finished | Aug 23 01:24:14 AM UTC 24 |
| Peak memory | 214440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=849245695 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_access_same_device_slow_rsp.849245695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_error_and_unmapped_addr.1849861199 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 82241038 ps |
| CPU time | 4.75 seconds |
| Started | Aug 23 01:20:49 AM UTC 24 |
| Finished | Aug 23 01:20:54 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849861199 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_error_and_unmapped_addr.1849861199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_error_random.1195254630 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 74443538 ps |
| CPU time | 5.27 seconds |
| Started | Aug 23 01:20:47 AM UTC 24 |
| Finished | Aug 23 01:20:53 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195254630 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_error_random.1195254630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_random.1970241618 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 238562514 ps |
| CPU time | 2.69 seconds |
| Started | Aug 23 01:20:42 AM UTC 24 |
| Finished | Aug 23 01:20:46 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1970241618 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_random.1970241618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_random_large_delays.2155302948 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 13196998559 ps |
| CPU time | 22.22 seconds |
| Started | Aug 23 01:20:45 AM UTC 24 |
| Finished | Aug 23 01:21:08 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155302948 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_random_large_delays.2155302948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_random_slow_rsp.311591122 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 55233808465 ps |
| CPU time | 96.77 seconds |
| Started | Aug 23 01:20:45 AM UTC 24 |
| Finished | Aug 23 01:22:24 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=311591122 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_random_slow_rsp.311591122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_random_zero_delays.114959685 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 21208403 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 01:20:43 AM UTC 24 |
| Finished | Aug 23 01:20:46 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=114959685 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_random_zero_delays.114959685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_same_source.123207888 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 719187371 ps |
| CPU time | 4.37 seconds |
| Started | Aug 23 01:20:47 AM UTC 24 |
| Finished | Aug 23 01:20:52 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=123207888 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_same_source.123207888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke.2917338370 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 10562433 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 01:20:39 AM UTC 24 |
| Finished | Aug 23 01:20:41 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917338370 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_smoke.2917338370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_large_delays.84097743 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 4833528718 ps |
| CPU time | 11.15 seconds |
| Started | Aug 23 01:20:42 AM UTC 24 |
| Finished | Aug 23 01:20:54 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84097743 -assert nopostproc +UVM_TESTNAME=xbar_base_ test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_smoke_large_delays.84097743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_slow_rsp.43426429 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 3102633253 ps |
| CPU time | 6.26 seconds |
| Started | Aug 23 01:20:42 AM UTC 24 |
| Finished | Aug 23 01:20:49 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=43426429 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_smoke_slow_rsp.43426429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_zero_delays.3576328048 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 9296892 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 01:20:40 AM UTC 24 |
| Finished | Aug 23 01:20:42 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576328048 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_smoke_zero_delays.3576328048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all.60573892 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 7783144929 ps |
| CPU time | 86.76 seconds |
| Started | Aug 23 01:20:50 AM UTC 24 |
| Finished | Aug 23 01:22:19 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60573892 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-si m-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_stress_all.60573892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_error.4211345045 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 1325913382 ps |
| CPU time | 15.33 seconds |
| Started | Aug 23 01:20:50 AM UTC 24 |
| Finished | Aug 23 01:21:07 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211345045 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_stress_all_with_error.4211345045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_rand_reset.1853088369 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 1072448792 ps |
| CPU time | 111.91 seconds |
| Started | Aug 23 01:20:50 AM UTC 24 |
| Finished | Aug 23 01:22:44 AM UTC 24 |
| Peak memory | 217740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853088369 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_stress_all_with_rand_reset.1853088369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/41.xbar_unmapped_addr.2185036174 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 1416851597 ps |
| CPU time | 6.68 seconds |
| Started | Aug 23 01:20:49 AM UTC 24 |
| Finished | Aug 23 01:20:56 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185036174 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 41.xbar_unmapped_addr.2185036174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/41.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_access_same_device.1772169070 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 912501959 ps |
| CPU time | 16.48 seconds |
| Started | Aug 23 01:21:00 AM UTC 24 |
| Finished | Aug 23 01:21:18 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772169070 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_access_same_device.1772169070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_access_same_device_slow_rsp.2413643075 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 304296273109 ps |
| CPU time | 251.02 seconds |
| Started | Aug 23 01:21:02 AM UTC 24 |
| Finished | Aug 23 01:25:16 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413643075 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_access_same_device_slow_rsp.2413643075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_error_and_unmapped_addr.2594809680 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 108490886 ps |
| CPU time | 4.32 seconds |
| Started | Aug 23 01:21:06 AM UTC 24 |
| Finished | Aug 23 01:21:11 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594809680 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_error_and_unmapped_addr.2594809680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_error_random.2022416036 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 324397277 ps |
| CPU time | 5.64 seconds |
| Started | Aug 23 01:21:06 AM UTC 24 |
| Finished | Aug 23 01:21:13 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022416036 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_error_random.2022416036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_random.3420457129 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 21260702 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 01:20:58 AM UTC 24 |
| Finished | Aug 23 01:21:01 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420457129 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_random.3420457129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_random_large_delays.118561128 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 177473831271 ps |
| CPU time | 106.94 seconds |
| Started | Aug 23 01:20:58 AM UTC 24 |
| Finished | Aug 23 01:22:47 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=118561128 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_random_large_delays.118561128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_random_slow_rsp.1701147457 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 238776969033 ps |
| CPU time | 165.83 seconds |
| Started | Aug 23 01:20:59 AM UTC 24 |
| Finished | Aug 23 01:23:47 AM UTC 24 |
| Peak memory | 212268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701147457 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_random_slow_rsp.1701147457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_random_zero_delays.1503759885 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 14252312 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 01:20:58 AM UTC 24 |
| Finished | Aug 23 01:21:00 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503759885 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_random_zero_delays.1503759885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_same_source.3723244302 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 117806895 ps |
| CPU time | 1.79 seconds |
| Started | Aug 23 01:21:02 AM UTC 24 |
| Finished | Aug 23 01:21:05 AM UTC 24 |
| Peak memory | 210940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723244302 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_same_source.3723244302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke.84801424 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 9337058 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 01:20:54 AM UTC 24 |
| Finished | Aug 23 01:20:56 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84801424 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs /coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_smoke.84801424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_large_delays.841110856 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 5683536964 ps |
| CPU time | 7.73 seconds |
| Started | Aug 23 01:20:56 AM UTC 24 |
| Finished | Aug 23 01:21:05 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=841110856 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_smoke_large_delays.841110856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_slow_rsp.3614631625 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 2000721341 ps |
| CPU time | 7.85 seconds |
| Started | Aug 23 01:20:56 AM UTC 24 |
| Finished | Aug 23 01:21:05 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614631625 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_smoke_slow_rsp.3614631625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_zero_delays.2136175434 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 9985553 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 01:20:56 AM UTC 24 |
| Finished | Aug 23 01:20:58 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136175434 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_smoke_zero_delays.2136175434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all.1644947378 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 415204974 ps |
| CPU time | 18.43 seconds |
| Started | Aug 23 01:21:08 AM UTC 24 |
| Finished | Aug 23 01:21:28 AM UTC 24 |
| Peak memory | 214436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644947378 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_stress_all.1644947378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_error.1687117652 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 1756206241 ps |
| CPU time | 22.83 seconds |
| Started | Aug 23 01:21:10 AM UTC 24 |
| Finished | Aug 23 01:21:34 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687117652 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_stress_all_with_error.1687117652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_rand_reset.1570638464 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 88301493 ps |
| CPU time | 20.11 seconds |
| Started | Aug 23 01:21:08 AM UTC 24 |
| Finished | Aug 23 01:21:30 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570638464 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_stress_all_with_rand_reset.1570638464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_reset_error.3909165006 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 421308243 ps |
| CPU time | 33.93 seconds |
| Started | Aug 23 01:21:11 AM UTC 24 |
| Finished | Aug 23 01:21:46 AM UTC 24 |
| Peak memory | 214172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909165006 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_stress_all_with_reset_error.3909165006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/42.xbar_unmapped_addr.1434348166 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 162002584 ps |
| CPU time | 2.96 seconds |
| Started | Aug 23 01:21:06 AM UTC 24 |
| Finished | Aug 23 01:21:10 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434348166 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 42.xbar_unmapped_addr.1434348166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/42.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_access_same_device.3146124728 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 927478867 ps |
| CPU time | 10.32 seconds |
| Started | Aug 23 01:21:24 AM UTC 24 |
| Finished | Aug 23 01:21:35 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146124728 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_access_same_device.3146124728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_access_same_device_slow_rsp.1136392855 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 2638965434 ps |
| CPU time | 18.02 seconds |
| Started | Aug 23 01:21:24 AM UTC 24 |
| Finished | Aug 23 01:21:43 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136392855 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_access_same_device_slow_rsp.1136392855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_error_and_unmapped_addr.3700364128 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 444915773 ps |
| CPU time | 4.05 seconds |
| Started | Aug 23 01:21:27 AM UTC 24 |
| Finished | Aug 23 01:21:32 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700364128 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_error_and_unmapped_addr.3700364128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_error_random.2671482586 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 126058569 ps |
| CPU time | 5.25 seconds |
| Started | Aug 23 01:21:27 AM UTC 24 |
| Finished | Aug 23 01:21:33 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671482586 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_error_random.2671482586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random.2369455058 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 59279795 ps |
| CPU time | 3.77 seconds |
| Started | Aug 23 01:21:16 AM UTC 24 |
| Finished | Aug 23 01:21:22 AM UTC 24 |
| Peak memory | 211892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369455058 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_random.2369455058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random_large_delays.783379982 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 62485888693 ps |
| CPU time | 56.07 seconds |
| Started | Aug 23 01:21:19 AM UTC 24 |
| Finished | Aug 23 01:22:17 AM UTC 24 |
| Peak memory | 212268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=783379982 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_random_large_delays.783379982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random_slow_rsp.158662232 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 23676196479 ps |
| CPU time | 76.43 seconds |
| Started | Aug 23 01:21:22 AM UTC 24 |
| Finished | Aug 23 01:22:40 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=158662232 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_random_slow_rsp.158662232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_random_zero_delays.4234163718 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 68081461 ps |
| CPU time | 3.98 seconds |
| Started | Aug 23 01:21:18 AM UTC 24 |
| Finished | Aug 23 01:21:23 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234163718 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_random_zero_delays.4234163718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_same_source.1752153659 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 128872828 ps |
| CPU time | 3.25 seconds |
| Started | Aug 23 01:21:25 AM UTC 24 |
| Finished | Aug 23 01:21:30 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752153659 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_same_source.1752153659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke.1003043704 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 44293034 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 01:21:12 AM UTC 24 |
| Finished | Aug 23 01:21:15 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003043704 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_smoke.1003043704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_large_delays.3516147956 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 3244791532 ps |
| CPU time | 9.27 seconds |
| Started | Aug 23 01:21:14 AM UTC 24 |
| Finished | Aug 23 01:21:25 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516147956 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_smoke_large_delays.3516147956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_slow_rsp.3968658908 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 2144987223 ps |
| CPU time | 6.47 seconds |
| Started | Aug 23 01:21:16 AM UTC 24 |
| Finished | Aug 23 01:21:24 AM UTC 24 |
| Peak memory | 211536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968658908 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_smoke_slow_rsp.3968658908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_zero_delays.3262957667 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 36929829 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 01:21:12 AM UTC 24 |
| Finished | Aug 23 01:21:15 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262957667 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_smoke_zero_delays.3262957667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all.922705013 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 230946136 ps |
| CPU time | 15.73 seconds |
| Started | Aug 23 01:21:28 AM UTC 24 |
| Finished | Aug 23 01:21:45 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=922705013 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_stress_all.922705013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_error.1023059405 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 10421019340 ps |
| CPU time | 49.3 seconds |
| Started | Aug 23 01:21:31 AM UTC 24 |
| Finished | Aug 23 01:22:22 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023059405 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_stress_all_with_error.1023059405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_rand_reset.1528194619 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 63396116 ps |
| CPU time | 10.41 seconds |
| Started | Aug 23 01:21:30 AM UTC 24 |
| Finished | Aug 23 01:21:41 AM UTC 24 |
| Peak memory | 212264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528194619 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_stress_all_with_rand_reset.1528194619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_reset_error.1450645053 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 2686944612 ps |
| CPU time | 69.63 seconds |
| Started | Aug 23 01:21:31 AM UTC 24 |
| Finished | Aug 23 01:22:43 AM UTC 24 |
| Peak memory | 216284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450645053 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_stress_all_with_reset_error.1450645053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/43.xbar_unmapped_addr.595526502 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 949454826 ps |
| CPU time | 8.04 seconds |
| Started | Aug 23 01:21:27 AM UTC 24 |
| Finished | Aug 23 01:21:36 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=595526502 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 43.xbar_unmapped_addr.595526502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/43.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_access_same_device.1123923011 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 1088427681 ps |
| CPU time | 12.68 seconds |
| Started | Aug 23 01:21:38 AM UTC 24 |
| Finished | Aug 23 01:21:52 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123923011 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_access_same_device.1123923011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_access_same_device_slow_rsp.4241639700 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 99169684471 ps |
| CPU time | 123.94 seconds |
| Started | Aug 23 01:21:42 AM UTC 24 |
| Finished | Aug 23 01:23:48 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241639700 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_access_same_device_slow_rsp.4241639700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_error_and_unmapped_addr.248533200 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 76354340 ps |
| CPU time | 5.13 seconds |
| Started | Aug 23 01:21:45 AM UTC 24 |
| Finished | Aug 23 01:21:51 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248533200 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_error_and_unmapped_addr.248533200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_error_random.1149880620 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 546778740 ps |
| CPU time | 3.11 seconds |
| Started | Aug 23 01:21:45 AM UTC 24 |
| Finished | Aug 23 01:21:49 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149880620 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_error_random.1149880620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random.3984533681 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 934176893 ps |
| CPU time | 6.04 seconds |
| Started | Aug 23 01:21:36 AM UTC 24 |
| Finished | Aug 23 01:21:43 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984533681 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_random.3984533681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random_large_delays.2335078869 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 17332922187 ps |
| CPU time | 34.79 seconds |
| Started | Aug 23 01:21:38 AM UTC 24 |
| Finished | Aug 23 01:22:14 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335078869 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_random_large_delays.2335078869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random_slow_rsp.2004280540 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 11644281409 ps |
| CPU time | 50.6 seconds |
| Started | Aug 23 01:21:38 AM UTC 24 |
| Finished | Aug 23 01:22:30 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004280540 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_random_slow_rsp.2004280540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_random_zero_delays.2414558652 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 91974565 ps |
| CPU time | 4.53 seconds |
| Started | Aug 23 01:21:38 AM UTC 24 |
| Finished | Aug 23 01:21:43 AM UTC 24 |
| Peak memory | 212120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414558652 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_random_zero_delays.2414558652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_same_source.1105015495 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 383256368 ps |
| CPU time | 4.81 seconds |
| Started | Aug 23 01:21:45 AM UTC 24 |
| Finished | Aug 23 01:21:51 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105015495 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_same_source.1105015495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke.3204554027 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 75760955 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 01:21:31 AM UTC 24 |
| Finished | Aug 23 01:21:34 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204554027 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_smoke.3204554027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_large_delays.2603569446 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 2906303761 ps |
| CPU time | 6.11 seconds |
| Started | Aug 23 01:21:35 AM UTC 24 |
| Finished | Aug 23 01:21:43 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603569446 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_smoke_large_delays.2603569446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_slow_rsp.2252722999 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 1735273428 ps |
| CPU time | 9.24 seconds |
| Started | Aug 23 01:21:35 AM UTC 24 |
| Finished | Aug 23 01:21:46 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252722999 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_smoke_slow_rsp.2252722999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_zero_delays.1769343412 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 8709674 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 01:21:34 AM UTC 24 |
| Finished | Aug 23 01:21:36 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769343412 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_smoke_zero_delays.1769343412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all.177556600 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 9795157294 ps |
| CPU time | 69.48 seconds |
| Started | Aug 23 01:21:47 AM UTC 24 |
| Finished | Aug 23 01:22:58 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177556600 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_stress_all.177556600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all_with_error.3947434662 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 348107501 ps |
| CPU time | 15.51 seconds |
| Started | Aug 23 01:21:48 AM UTC 24 |
| Finished | Aug 23 01:22:05 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947434662 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_stress_all_with_error.3947434662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all_with_rand_reset.2295797095 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 2381779899 ps |
| CPU time | 68.55 seconds |
| Started | Aug 23 01:21:47 AM UTC 24 |
| Finished | Aug 23 01:22:57 AM UTC 24 |
| Peak memory | 216552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295797095 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_stress_all_with_rand_reset.2295797095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_stress_all_with_reset_error.2815133443 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 626928805 ps |
| CPU time | 50.65 seconds |
| Started | Aug 23 01:21:48 AM UTC 24 |
| Finished | Aug 23 01:22:40 AM UTC 24 |
| Peak memory | 216224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815133443 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_stress_all_with_reset_error.2815133443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/44.xbar_unmapped_addr.419570053 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 92586064 ps |
| CPU time | 5.56 seconds |
| Started | Aug 23 01:21:45 AM UTC 24 |
| Finished | Aug 23 01:21:52 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=419570053 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 44.xbar_unmapped_addr.419570053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/44.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_access_same_device.2766010024 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 15661006 ps |
| CPU time | 3 seconds |
| Started | Aug 23 01:21:55 AM UTC 24 |
| Finished | Aug 23 01:21:59 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766010024 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_access_same_device.2766010024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_access_same_device_slow_rsp.238479811 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 16383037285 ps |
| CPU time | 63.05 seconds |
| Started | Aug 23 01:21:56 AM UTC 24 |
| Finished | Aug 23 01:23:01 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=238479811 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_access_same_device_slow_rsp.238479811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_error_and_unmapped_addr.3252998223 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 517344938 ps |
| CPU time | 8.71 seconds |
| Started | Aug 23 01:22:04 AM UTC 24 |
| Finished | Aug 23 01:22:14 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252998223 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_error_and_unmapped_addr.3252998223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_error_random.3274009962 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 81514025 ps |
| CPU time | 3.65 seconds |
| Started | Aug 23 01:22:01 AM UTC 24 |
| Finished | Aug 23 01:22:05 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274009962 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_error_random.3274009962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random.4035065598 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 91465222 ps |
| CPU time | 5.23 seconds |
| Started | Aug 23 01:21:53 AM UTC 24 |
| Finished | Aug 23 01:22:00 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035065598 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_random.4035065598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random_large_delays.2529795507 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 22908622959 ps |
| CPU time | 88.05 seconds |
| Started | Aug 23 01:21:53 AM UTC 24 |
| Finished | Aug 23 01:23:23 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529795507 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_random_large_delays.2529795507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random_slow_rsp.1607817307 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 4419889577 ps |
| CPU time | 19.54 seconds |
| Started | Aug 23 01:21:53 AM UTC 24 |
| Finished | Aug 23 01:22:14 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607817307 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_random_slow_rsp.1607817307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_random_zero_delays.1836955134 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 9047559 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 01:21:53 AM UTC 24 |
| Finished | Aug 23 01:21:56 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836955134 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_random_zero_delays.1836955134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_same_source.4017764363 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 52115909 ps |
| CPU time | 3.29 seconds |
| Started | Aug 23 01:21:59 AM UTC 24 |
| Finished | Aug 23 01:22:04 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017764363 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_same_source.4017764363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke.1513090232 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 53676712 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 01:21:51 AM UTC 24 |
| Finished | Aug 23 01:21:53 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513090232 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_smoke.1513090232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke_large_delays.685803460 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 1770028301 ps |
| CPU time | 8.07 seconds |
| Started | Aug 23 01:21:53 AM UTC 24 |
| Finished | Aug 23 01:22:03 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=685803460 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_smoke_large_delays.685803460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke_slow_rsp.187321127 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 1825313463 ps |
| CPU time | 8.09 seconds |
| Started | Aug 23 01:21:53 AM UTC 24 |
| Finished | Aug 23 01:22:03 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=187321127 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_smoke_slow_rsp.187321127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_smoke_zero_delays.3122269394 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 10673864 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 01:21:51 AM UTC 24 |
| Finished | Aug 23 01:21:53 AM UTC 24 |
| Peak memory | 211244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122269394 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_smoke_zero_delays.3122269394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all.4201738851 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 8285579212 ps |
| CPU time | 35.75 seconds |
| Started | Aug 23 01:22:04 AM UTC 24 |
| Finished | Aug 23 01:22:41 AM UTC 24 |
| Peak memory | 214436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201738851 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_stress_all.4201738851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all_with_error.2714220724 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 4087855672 ps |
| CPU time | 37.23 seconds |
| Started | Aug 23 01:22:06 AM UTC 24 |
| Finished | Aug 23 01:22:45 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714220724 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_stress_all_with_error.2714220724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all_with_rand_reset.3312696689 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 2430148025 ps |
| CPU time | 91.78 seconds |
| Started | Aug 23 01:22:06 AM UTC 24 |
| Finished | Aug 23 01:23:40 AM UTC 24 |
| Peak memory | 216360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312696689 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_stress_all_with_rand_reset.3312696689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_stress_all_with_reset_error.2041472928 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 108455897 ps |
| CPU time | 6.92 seconds |
| Started | Aug 23 01:22:11 AM UTC 24 |
| Finished | Aug 23 01:22:19 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041472928 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_stress_all_with_reset_error.2041472928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/45.xbar_unmapped_addr.563878861 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 894639973 ps |
| CPU time | 5.91 seconds |
| Started | Aug 23 01:22:04 AM UTC 24 |
| Finished | Aug 23 01:22:11 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=563878861 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 45.xbar_unmapped_addr.563878861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/45.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_access_same_device.3589978141 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 1007150366 ps |
| CPU time | 13.53 seconds |
| Started | Aug 23 01:22:21 AM UTC 24 |
| Finished | Aug 23 01:22:36 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589978141 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_access_same_device.3589978141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_access_same_device_slow_rsp.3132601725 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 34570949160 ps |
| CPU time | 194.4 seconds |
| Started | Aug 23 01:22:21 AM UTC 24 |
| Finished | Aug 23 01:25:38 AM UTC 24 |
| Peak memory | 216028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132601725 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_access_same_device_slow_rsp.3132601725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_error_and_unmapped_addr.3223677964 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 276947727 ps |
| CPU time | 4.37 seconds |
| Started | Aug 23 01:22:25 AM UTC 24 |
| Finished | Aug 23 01:22:30 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223677964 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_error_and_unmapped_addr.3223677964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_error_random.4142590967 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 647548264 ps |
| CPU time | 9.61 seconds |
| Started | Aug 23 01:22:25 AM UTC 24 |
| Finished | Aug 23 01:22:36 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142590967 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_error_random.4142590967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random.2485339253 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 1081798574 ps |
| CPU time | 9.2 seconds |
| Started | Aug 23 01:22:16 AM UTC 24 |
| Finished | Aug 23 01:22:26 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485339253 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_random.2485339253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random_large_delays.1795132599 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 4364257821 ps |
| CPU time | 8.04 seconds |
| Started | Aug 23 01:22:18 AM UTC 24 |
| Finished | Aug 23 01:22:27 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795132599 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_random_large_delays.1795132599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random_slow_rsp.1428218898 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 5673031748 ps |
| CPU time | 35.19 seconds |
| Started | Aug 23 01:22:20 AM UTC 24 |
| Finished | Aug 23 01:22:56 AM UTC 24 |
| Peak memory | 212204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428218898 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_random_slow_rsp.1428218898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_random_zero_delays.3963861121 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 91898516 ps |
| CPU time | 2.32 seconds |
| Started | Aug 23 01:22:18 AM UTC 24 |
| Finished | Aug 23 01:22:22 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963861121 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_random_zero_delays.3963861121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_same_source.3887247521 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 77230454 ps |
| CPU time | 2.58 seconds |
| Started | Aug 23 01:22:23 AM UTC 24 |
| Finished | Aug 23 01:22:26 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887247521 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_same_source.3887247521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke.2954083069 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 48897982 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 01:22:13 AM UTC 24 |
| Finished | Aug 23 01:22:15 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954083069 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_smoke.2954083069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke_large_delays.4169803776 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 3309335137 ps |
| CPU time | 6.59 seconds |
| Started | Aug 23 01:22:16 AM UTC 24 |
| Finished | Aug 23 01:22:23 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169803776 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_smoke_large_delays.4169803776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke_slow_rsp.617600362 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 5532369958 ps |
| CPU time | 5.75 seconds |
| Started | Aug 23 01:22:16 AM UTC 24 |
| Finished | Aug 23 01:22:22 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=617600362 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_smoke_slow_rsp.617600362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_smoke_zero_delays.1646186031 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 9521742 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 01:22:16 AM UTC 24 |
| Finished | Aug 23 01:22:18 AM UTC 24 |
| Peak memory | 211080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646186031 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_smoke_zero_delays.1646186031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all.4000737608 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 113351391 ps |
| CPU time | 5.66 seconds |
| Started | Aug 23 01:22:26 AM UTC 24 |
| Finished | Aug 23 01:22:33 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000737608 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_stress_all.4000737608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all_with_error.3627066351 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 8959738150 ps |
| CPU time | 18.44 seconds |
| Started | Aug 23 01:22:28 AM UTC 24 |
| Finished | Aug 23 01:22:48 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627066351 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_stress_all_with_error.3627066351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all_with_rand_reset.2513452221 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 8909376219 ps |
| CPU time | 86.59 seconds |
| Started | Aug 23 01:22:28 AM UTC 24 |
| Finished | Aug 23 01:23:57 AM UTC 24 |
| Peak memory | 216296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513452221 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_stress_all_with_rand_reset.2513452221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_stress_all_with_reset_error.1024366837 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 342762303 ps |
| CPU time | 44.75 seconds |
| Started | Aug 23 01:22:29 AM UTC 24 |
| Finished | Aug 23 01:23:15 AM UTC 24 |
| Peak memory | 216224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024366837 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_stress_all_with_reset_error.1024366837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/46.xbar_unmapped_addr.2274974491 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 53204859 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 01:22:25 AM UTC 24 |
| Finished | Aug 23 01:22:27 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274974491 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 46.xbar_unmapped_addr.2274974491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/46.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_access_same_device.1453039359 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 1279845078 ps |
| CPU time | 12.14 seconds |
| Started | Aug 23 01:22:39 AM UTC 24 |
| Finished | Aug 23 01:22:53 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453039359 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_access_same_device.1453039359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_access_same_device_slow_rsp.3652888010 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 235126017023 ps |
| CPU time | 256.24 seconds |
| Started | Aug 23 01:22:43 AM UTC 24 |
| Finished | Aug 23 01:27:02 AM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652888010 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_access_same_device_slow_rsp.3652888010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_error_and_unmapped_addr.3740420687 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 47491587 ps |
| CPU time | 2.65 seconds |
| Started | Aug 23 01:22:46 AM UTC 24 |
| Finished | Aug 23 01:22:50 AM UTC 24 |
| Peak memory | 211980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740420687 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_error_and_unmapped_addr.3740420687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_error_random.4012454111 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 421068352 ps |
| CPU time | 5.89 seconds |
| Started | Aug 23 01:22:43 AM UTC 24 |
| Finished | Aug 23 01:22:50 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012454111 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_error_random.4012454111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random.3790462394 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 1342571917 ps |
| CPU time | 4.96 seconds |
| Started | Aug 23 01:22:34 AM UTC 24 |
| Finished | Aug 23 01:22:40 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790462394 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_random.3790462394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random_large_delays.761335673 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 70646149579 ps |
| CPU time | 151.14 seconds |
| Started | Aug 23 01:22:37 AM UTC 24 |
| Finished | Aug 23 01:25:10 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=761335673 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_random_large_delays.761335673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random_slow_rsp.2671261613 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 1532210228 ps |
| CPU time | 7.04 seconds |
| Started | Aug 23 01:22:37 AM UTC 24 |
| Finished | Aug 23 01:22:45 AM UTC 24 |
| Peak memory | 212140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671261613 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_random_slow_rsp.2671261613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_random_zero_delays.1095097975 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 72008732 ps |
| CPU time | 6.66 seconds |
| Started | Aug 23 01:22:34 AM UTC 24 |
| Finished | Aug 23 01:22:42 AM UTC 24 |
| Peak memory | 212184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095097975 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_random_zero_delays.1095097975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_same_source.2137212226 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 136903911 ps |
| CPU time | 2.26 seconds |
| Started | Aug 23 01:22:43 AM UTC 24 |
| Finished | Aug 23 01:22:46 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137212226 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_same_source.2137212226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke.1439815107 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 38766695 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 01:22:29 AM UTC 24 |
| Finished | Aug 23 01:22:31 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439815107 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_smoke.1439815107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke_large_delays.2515160984 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 4251171931 ps |
| CPU time | 6.08 seconds |
| Started | Aug 23 01:22:31 AM UTC 24 |
| Finished | Aug 23 01:22:39 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515160984 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_smoke_large_delays.2515160984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke_slow_rsp.664237389 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 1092476396 ps |
| CPU time | 7.68 seconds |
| Started | Aug 23 01:22:33 AM UTC 24 |
| Finished | Aug 23 01:22:42 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=664237389 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_smoke_slow_rsp.664237389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke_zero_delays.3517800271 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 8774329 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 01:22:31 AM UTC 24 |
| Finished | Aug 23 01:22:33 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517800271 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_smoke_zero_delays.3517800271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all.306609670 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 332562632 ps |
| CPU time | 14.26 seconds |
| Started | Aug 23 01:22:46 AM UTC 24 |
| Finished | Aug 23 01:23:01 AM UTC 24 |
| Peak memory | 211864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=306609670 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_stress_all.306609670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all_with_error.195450414 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 42797598 ps |
| CPU time | 3.25 seconds |
| Started | Aug 23 01:22:46 AM UTC 24 |
| Finished | Aug 23 01:22:50 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=195450414 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_stress_all_with_error.195450414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all_with_rand_reset.3729743170 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 6986669671 ps |
| CPU time | 159.28 seconds |
| Started | Aug 23 01:22:46 AM UTC 24 |
| Finished | Aug 23 01:25:28 AM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729743170 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_stress_all_with_rand_reset.3729743170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_stress_all_with_reset_error.2086259666 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 5472878612 ps |
| CPU time | 128.82 seconds |
| Started | Aug 23 01:22:46 AM UTC 24 |
| Finished | Aug 23 01:24:57 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086259666 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_stress_all_with_reset_error.2086259666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/47.xbar_unmapped_addr.958137289 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 10124635 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 01:22:43 AM UTC 24 |
| Finished | Aug 23 01:22:45 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=958137289 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 47.xbar_unmapped_addr.958137289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/47.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_access_same_device.4181464692 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 3305386795 ps |
| CPU time | 13.2 seconds |
| Started | Aug 23 01:22:53 AM UTC 24 |
| Finished | Aug 23 01:23:07 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181464692 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_access_same_device.4181464692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_access_same_device_slow_rsp.1463226790 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 81604817658 ps |
| CPU time | 78.74 seconds |
| Started | Aug 23 01:22:53 AM UTC 24 |
| Finished | Aug 23 01:24:13 AM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463226790 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_access_same_device_slow_rsp.1463226790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_error_and_unmapped_addr.3163900088 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 9474862 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 01:22:55 AM UTC 24 |
| Finished | Aug 23 01:22:57 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163900088 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_error_and_unmapped_addr.3163900088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_error_random.4183561131 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 255763776 ps |
| CPU time | 3 seconds |
| Started | Aug 23 01:22:53 AM UTC 24 |
| Finished | Aug 23 01:22:57 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183561131 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_error_random.4183561131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random.2958321859 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 186256405 ps |
| CPU time | 2.45 seconds |
| Started | Aug 23 01:22:49 AM UTC 24 |
| Finished | Aug 23 01:22:52 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958321859 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_random.2958321859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random_large_delays.3434321433 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 71701236537 ps |
| CPU time | 60.48 seconds |
| Started | Aug 23 01:22:51 AM UTC 24 |
| Finished | Aug 23 01:23:53 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434321433 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_random_large_delays.3434321433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random_slow_rsp.2581610190 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 33526764122 ps |
| CPU time | 57.08 seconds |
| Started | Aug 23 01:22:51 AM UTC 24 |
| Finished | Aug 23 01:23:49 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581610190 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_random_slow_rsp.2581610190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_random_zero_delays.3313044608 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 63467122 ps |
| CPU time | 3.24 seconds |
| Started | Aug 23 01:22:51 AM UTC 24 |
| Finished | Aug 23 01:22:55 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313044608 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_random_zero_delays.3313044608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_same_source.3164773378 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 68034037 ps |
| CPU time | 5.04 seconds |
| Started | Aug 23 01:22:53 AM UTC 24 |
| Finished | Aug 23 01:22:59 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164773378 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_same_source.3164773378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke.4033778408 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 59421856 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 01:22:46 AM UTC 24 |
| Finished | Aug 23 01:22:48 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033778408 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_smoke.4033778408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke_large_delays.2801782351 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 2332694976 ps |
| CPU time | 6.61 seconds |
| Started | Aug 23 01:22:49 AM UTC 24 |
| Finished | Aug 23 01:22:56 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801782351 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_smoke_large_delays.2801782351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke_slow_rsp.797788957 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 602778588 ps |
| CPU time | 4.34 seconds |
| Started | Aug 23 01:22:49 AM UTC 24 |
| Finished | Aug 23 01:22:54 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=797788957 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_smoke_slow_rsp.797788957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_smoke_zero_delays.2238632884 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 16284412 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 01:22:48 AM UTC 24 |
| Finished | Aug 23 01:22:50 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238632884 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_smoke_zero_delays.2238632884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all.271394067 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 17658460 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 01:22:56 AM UTC 24 |
| Finished | Aug 23 01:22:58 AM UTC 24 |
| Peak memory | 211120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=271394067 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_stress_all.271394067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all_with_error.3618023963 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 2576218285 ps |
| CPU time | 19.95 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:21 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618023963 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_stress_all_with_error.3618023963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all_with_rand_reset.324936220 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 707970253 ps |
| CPU time | 77.49 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:24:19 AM UTC 24 |
| Peak memory | 218468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=324936220 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_stress_all_with_rand_reset.324936220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_stress_all_with_reset_error.2329792545 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 101762466 ps |
| CPU time | 4.74 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:06 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329792545 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_stress_all_with_reset_error.2329792545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/48.xbar_unmapped_addr.2154098211 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 81240438 ps |
| CPU time | 4.45 seconds |
| Started | Aug 23 01:22:55 AM UTC 24 |
| Finished | Aug 23 01:23:00 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154098211 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 48.xbar_unmapped_addr.2154098211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/48.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_access_same_device.293536841 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 129799352 ps |
| CPU time | 10.03 seconds |
| Started | Aug 23 01:23:04 AM UTC 24 |
| Finished | Aug 23 01:23:15 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293536841 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_access_same_device.293536841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_access_same_device_slow_rsp.3234195201 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 22867133157 ps |
| CPU time | 148.09 seconds |
| Started | Aug 23 01:23:04 AM UTC 24 |
| Finished | Aug 23 01:25:35 AM UTC 24 |
| Peak memory | 214124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234195201 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_access_same_device_slow_rsp.3234195201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_error_and_unmapped_addr.2848080666 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 130383802 ps |
| CPU time | 4.53 seconds |
| Started | Aug 23 01:23:07 AM UTC 24 |
| Finished | Aug 23 01:23:13 AM UTC 24 |
| Peak memory | 212332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848080666 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_error_and_unmapped_addr.2848080666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_error_random.4292109856 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 22916651 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 01:23:04 AM UTC 24 |
| Finished | Aug 23 01:23:07 AM UTC 24 |
| Peak memory | 211136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292109856 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_error_random.4292109856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random.1479284570 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 344205513 ps |
| CPU time | 2.61 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:04 AM UTC 24 |
| Peak memory | 212448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479284570 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_random.1479284570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random_large_delays.1028478423 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 9255840515 ps |
| CPU time | 23.66 seconds |
| Started | Aug 23 01:23:02 AM UTC 24 |
| Finished | Aug 23 01:23:27 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1028478423 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_random_large_delays.1028478423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random_slow_rsp.3148431532 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 68752552174 ps |
| CPU time | 66.68 seconds |
| Started | Aug 23 01:23:02 AM UTC 24 |
| Finished | Aug 23 01:24:10 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148431532 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_random_slow_rsp.3148431532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_random_zero_delays.3163755692 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 44064822 ps |
| CPU time | 3.14 seconds |
| Started | Aug 23 01:23:02 AM UTC 24 |
| Finished | Aug 23 01:23:06 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163755692 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_random_zero_delays.3163755692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_same_source.999216098 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 51122719 ps |
| CPU time | 3.1 seconds |
| Started | Aug 23 01:23:04 AM UTC 24 |
| Finished | Aug 23 01:23:08 AM UTC 24 |
| Peak memory | 212316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=999216098 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_same_source.999216098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke.2552530989 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 22294776 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:02 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552530989 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_smoke.2552530989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke_large_delays.1634868225 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 10616092806 ps |
| CPU time | 7.26 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:08 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1634868225 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_smoke_large_delays.1634868225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke_slow_rsp.2421086288 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 1914333283 ps |
| CPU time | 8.69 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:10 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421086288 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_smoke_slow_rsp.2421086288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_smoke_zero_delays.449604579 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 25927149 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 01:23:00 AM UTC 24 |
| Finished | Aug 23 01:23:02 AM UTC 24 |
| Peak memory | 211048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449604579 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_smoke_zero_delays.449604579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all.93413414 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 15844957021 ps |
| CPU time | 41.75 seconds |
| Started | Aug 23 01:23:07 AM UTC 24 |
| Finished | Aug 23 01:23:51 AM UTC 24 |
| Peak memory | 214236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93413414 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_ TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-si m-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_stress_all.93413414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all_with_error.1750991695 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 476469571 ps |
| CPU time | 28.55 seconds |
| Started | Aug 23 01:23:09 AM UTC 24 |
| Finished | Aug 23 01:23:39 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750991695 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_stress_all_with_error.1750991695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all_with_rand_reset.4155379113 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 148785011 ps |
| CPU time | 14.53 seconds |
| Started | Aug 23 01:23:09 AM UTC 24 |
| Finished | Aug 23 01:23:25 AM UTC 24 |
| Peak memory | 214376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155379113 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_stress_all_with_rand_reset.4155379113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_stress_all_with_reset_error.2404598048 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 2529734689 ps |
| CPU time | 86.04 seconds |
| Started | Aug 23 01:23:09 AM UTC 24 |
| Finished | Aug 23 01:24:37 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404598048 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_stress_all_with_reset_error.2404598048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/49.xbar_unmapped_addr.1014579271 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 66129769 ps |
| CPU time | 4.53 seconds |
| Started | Aug 23 01:23:07 AM UTC 24 |
| Finished | Aug 23 01:23:13 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014579271 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 49.xbar_unmapped_addr.1014579271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/49.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_error_and_unmapped_addr.3597388613 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 93988256 ps |
| CPU time | 2.5 seconds |
| Started | Aug 23 01:08:51 AM UTC 24 |
| Finished | Aug 23 01:08:55 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597388613 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_error_and_unmapped_addr.3597388613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_error_random.3275110283 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 2733414234 ps |
| CPU time | 11.43 seconds |
| Started | Aug 23 01:08:49 AM UTC 24 |
| Finished | Aug 23 01:09:02 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275110283 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_error_random.3275110283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_random.4073956469 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 1498787389 ps |
| CPU time | 8.18 seconds |
| Started | Aug 23 01:08:41 AM UTC 24 |
| Finished | Aug 23 01:08:51 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4073956469 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_random.4073956469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_random_large_delays.3593201468 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 27603169265 ps |
| CPU time | 120.1 seconds |
| Started | Aug 23 01:08:43 AM UTC 24 |
| Finished | Aug 23 01:10:46 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593201468 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_random_large_delays.3593201468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_random_slow_rsp.2771952652 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 14941447650 ps |
| CPU time | 103.09 seconds |
| Started | Aug 23 01:08:46 AM UTC 24 |
| Finished | Aug 23 01:10:31 AM UTC 24 |
| Peak memory | 212200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771952652 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_random_slow_rsp.2771952652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_random_zero_delays.875505218 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 121461053 ps |
| CPU time | 4.81 seconds |
| Started | Aug 23 01:08:41 AM UTC 24 |
| Finished | Aug 23 01:08:47 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875505218 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_random_zero_delays.875505218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_same_source.1106097812 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 150925974 ps |
| CPU time | 3.11 seconds |
| Started | Aug 23 01:08:48 AM UTC 24 |
| Finished | Aug 23 01:08:52 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106097812 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_same_source.1106097812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_smoke.3571576571 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 43356531 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 01:08:38 AM UTC 24 |
| Finished | Aug 23 01:08:41 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571576571 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_smoke.3571576571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_smoke_large_delays.25076749 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 1880336761 ps |
| CPU time | 13.13 seconds |
| Started | Aug 23 01:08:39 AM UTC 24 |
| Finished | Aug 23 01:08:53 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25076749 -assert nopostproc +UVM_TESTNAME=xbar_base_ test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_smoke_large_delays.25076749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_smoke_slow_rsp.3399987883 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 1593715703 ps |
| CPU time | 13.97 seconds |
| Started | Aug 23 01:08:40 AM UTC 24 |
| Finished | Aug 23 01:08:56 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399987883 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_smoke_slow_rsp.3399987883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_smoke_zero_delays.3534751371 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 9845262 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 01:08:38 AM UTC 24 |
| Finished | Aug 23 01:08:41 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534751371 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_smoke_zero_delays.3534751371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_stress_all_with_error.789591408 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 112317145 ps |
| CPU time | 6.24 seconds |
| Started | Aug 23 01:08:54 AM UTC 24 |
| Finished | Aug 23 01:09:02 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789591408 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_stress_all_with_error.789591408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_stress_all_with_rand_reset.1666030198 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 233338233 ps |
| CPU time | 38.87 seconds |
| Started | Aug 23 01:08:53 AM UTC 24 |
| Finished | Aug 23 01:09:34 AM UTC 24 |
| Peak memory | 216228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666030198 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_stress_all_with_rand_reset.1666030198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_stress_all_with_reset_error.2282021345 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 122339340 ps |
| CPU time | 17.36 seconds |
| Started | Aug 23 01:08:56 AM UTC 24 |
| Finished | Aug 23 01:09:14 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282021345 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_stress_all_with_reset_error.2282021345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/5.xbar_unmapped_addr.1485571496 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 210889479 ps |
| CPU time | 8.53 seconds |
| Started | Aug 23 01:08:50 AM UTC 24 |
| Finished | Aug 23 01:09:00 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485571496 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_unmapped_addr.1485571496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/5.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_access_same_device.3705530019 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 2160452289 ps |
| CPU time | 25.28 seconds |
| Started | Aug 23 01:09:02 AM UTC 24 |
| Finished | Aug 23 01:09:29 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705530019 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_access_same_device.3705530019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_access_same_device_slow_rsp.955555511 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 24374434147 ps |
| CPU time | 113.93 seconds |
| Started | Aug 23 01:09:03 AM UTC 24 |
| Finished | Aug 23 01:10:59 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=955555511 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_access_same_device_slow_rsp.955555511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_error_and_unmapped_addr.4041119273 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 261064377 ps |
| CPU time | 6.09 seconds |
| Started | Aug 23 01:09:05 AM UTC 24 |
| Finished | Aug 23 01:09:13 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041119273 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_error_and_unmapped_addr.4041119273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_error_random.2509325615 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 574967170 ps |
| CPU time | 9.89 seconds |
| Started | Aug 23 01:09:05 AM UTC 24 |
| Finished | Aug 23 01:09:17 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509325615 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_error_random.2509325615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_random.2456004412 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 792343232 ps |
| CPU time | 16.3 seconds |
| Started | Aug 23 01:08:59 AM UTC 24 |
| Finished | Aug 23 01:09:17 AM UTC 24 |
| Peak memory | 212320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456004412 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_random.2456004412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_random_large_delays.344218081 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 16094519315 ps |
| CPU time | 73.15 seconds |
| Started | Aug 23 01:09:01 AM UTC 24 |
| Finished | Aug 23 01:10:16 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=344218081 -assert nopostproc +UVM_TESTNAME=xbar_base _test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_random_large_delays.344218081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_random_slow_rsp.914452321 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 7880514983 ps |
| CPU time | 19.88 seconds |
| Started | Aug 23 01:09:01 AM UTC 24 |
| Finished | Aug 23 01:09:22 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=914452321 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_random_slow_rsp.914452321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_random_zero_delays.3209185636 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 57429261 ps |
| CPU time | 7.67 seconds |
| Started | Aug 23 01:09:01 AM UTC 24 |
| Finished | Aug 23 01:09:10 AM UTC 24 |
| Peak memory | 212380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209185636 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_random_zero_delays.3209185636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_same_source.1878856679 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 19523824 ps |
| CPU time | 1.82 seconds |
| Started | Aug 23 01:09:03 AM UTC 24 |
| Finished | Aug 23 01:09:06 AM UTC 24 |
| Peak memory | 211132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878856679 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_same_source.1878856679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_smoke.1695534563 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 8908590 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 01:08:57 AM UTC 24 |
| Finished | Aug 23 01:09:00 AM UTC 24 |
| Peak memory | 211180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695534563 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_smoke.1695534563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_smoke_large_delays.2289826727 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 1600867882 ps |
| CPU time | 7.46 seconds |
| Started | Aug 23 01:08:57 AM UTC 24 |
| Finished | Aug 23 01:09:06 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289826727 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_smoke_large_delays.2289826727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_smoke_slow_rsp.156475135 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 4156658530 ps |
| CPU time | 9.09 seconds |
| Started | Aug 23 01:08:58 AM UTC 24 |
| Finished | Aug 23 01:09:09 AM UTC 24 |
| Peak memory | 212184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=156475135 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_smoke_slow_rsp.156475135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_smoke_zero_delays.317417415 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 11743238 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 01:08:57 AM UTC 24 |
| Finished | Aug 23 01:08:59 AM UTC 24 |
| Peak memory | 211128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317417415 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_smoke_zero_delays.317417415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_stress_all.2802835084 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 233140682 ps |
| CPU time | 29.35 seconds |
| Started | Aug 23 01:09:07 AM UTC 24 |
| Finished | Aug 23 01:09:37 AM UTC 24 |
| Peak memory | 214176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802835084 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_stress_all.2802835084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_stress_all_with_error.2156806948 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 3198751615 ps |
| CPU time | 54.11 seconds |
| Started | Aug 23 01:09:09 AM UTC 24 |
| Finished | Aug 23 01:10:04 AM UTC 24 |
| Peak memory | 212456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156806948 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_stress_all_with_error.2156806948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_stress_all_with_rand_reset.2183237702 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 266696121 ps |
| CPU time | 19.69 seconds |
| Started | Aug 23 01:09:07 AM UTC 24 |
| Finished | Aug 23 01:09:28 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183237702 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_stress_all_with_rand_reset.2183237702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_stress_all_with_reset_error.3766415018 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 624578203 ps |
| CPU time | 53.4 seconds |
| Started | Aug 23 01:09:10 AM UTC 24 |
| Finished | Aug 23 01:10:05 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766415018 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_stress_all_with_reset_error.3766415018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/6.xbar_unmapped_addr.107621087 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 298811928 ps |
| CPU time | 5.1 seconds |
| Started | Aug 23 01:09:05 AM UTC 24 |
| Finished | Aug 23 01:09:12 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107621087 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 6.xbar_unmapped_addr.107621087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/6.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_access_same_device.349144032 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 995642771 ps |
| CPU time | 18.34 seconds |
| Started | Aug 23 01:09:20 AM UTC 24 |
| Finished | Aug 23 01:09:39 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349144032 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xba r_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_access_same_device.349144032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_access_same_device_slow_rsp.1507356119 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 163886602063 ps |
| CPU time | 305.17 seconds |
| Started | Aug 23 01:09:23 AM UTC 24 |
| Finished | Aug 23 01:14:32 AM UTC 24 |
| Peak memory | 214440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507356119 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_access_same_device_slow_rsp.1507356119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_error_and_unmapped_addr.283590495 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 749304956 ps |
| CPU time | 10.51 seconds |
| Started | Aug 23 01:09:29 AM UTC 24 |
| Finished | Aug 23 01:09:41 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283590495 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_error_and_unmapped_addr.283590495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_error_random.1850745469 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 45139278 ps |
| CPU time | 6.33 seconds |
| Started | Aug 23 01:09:26 AM UTC 24 |
| Finished | Aug 23 01:09:33 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850745469 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_error_random.1850745469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_random.2266008459 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 184779907 ps |
| CPU time | 8.79 seconds |
| Started | Aug 23 01:09:15 AM UTC 24 |
| Finished | Aug 23 01:09:25 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266008459 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_random.2266008459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_random_large_delays.2554859552 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 37045554238 ps |
| CPU time | 64.1 seconds |
| Started | Aug 23 01:09:17 AM UTC 24 |
| Finished | Aug 23 01:10:23 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554859552 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_random_large_delays.2554859552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_random_slow_rsp.3277450265 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 18384240516 ps |
| CPU time | 148.34 seconds |
| Started | Aug 23 01:09:18 AM UTC 24 |
| Finished | Aug 23 01:11:49 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277450265 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_random_slow_rsp.3277450265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_random_zero_delays.816650242 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 37742959 ps |
| CPU time | 6.3 seconds |
| Started | Aug 23 01:09:16 AM UTC 24 |
| Finished | Aug 23 01:09:24 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816650242 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_random_zero_delays.816650242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_same_source.451420337 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 56346960 ps |
| CPU time | 5.07 seconds |
| Started | Aug 23 01:09:25 AM UTC 24 |
| Finished | Aug 23 01:09:31 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=451420337 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM _TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_same_source.451420337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_smoke.1330392999 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 33258375 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 01:09:11 AM UTC 24 |
| Finished | Aug 23 01:09:14 AM UTC 24 |
| Peak memory | 211140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330392999 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_smoke.1330392999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_smoke_large_delays.2086644592 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 2962115190 ps |
| CPU time | 16.31 seconds |
| Started | Aug 23 01:09:14 AM UTC 24 |
| Finished | Aug 23 01:09:31 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086644592 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_smoke_large_delays.2086644592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_smoke_slow_rsp.753515617 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 3755192969 ps |
| CPU time | 15.34 seconds |
| Started | Aug 23 01:09:14 AM UTC 24 |
| Finished | Aug 23 01:09:31 AM UTC 24 |
| Peak memory | 212188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753515617 -assert nopostproc +UVM_TESTNAME=xbar_base_tes t +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_smoke_slow_rsp.753515617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_smoke_zero_delays.112702688 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 8182906 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 01:09:13 AM UTC 24 |
| Finished | Aug 23 01:09:15 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=112702688 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/x bar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_smoke_zero_delays.112702688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_stress_all_with_error.69427561 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 4106738478 ps |
| CPU time | 50.78 seconds |
| Started | Aug 23 01:09:33 AM UTC 24 |
| Finished | Aug 23 01:10:25 AM UTC 24 |
| Peak memory | 212180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69427561 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM _TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-s im-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_stress_all_with_error.69427561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_stress_all_with_rand_reset.2351144993 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 129613568 ps |
| CPU time | 34.89 seconds |
| Started | Aug 23 01:09:31 AM UTC 24 |
| Finished | Aug 23 01:10:08 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351144993 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_stress_all_with_rand_reset.2351144993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_stress_all_with_reset_error.2518533268 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 2603607657 ps |
| CPU time | 41.65 seconds |
| Started | Aug 23 01:09:34 AM UTC 24 |
| Finished | Aug 23 01:10:17 AM UTC 24 |
| Peak memory | 214248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518533268 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_stress_all_with_reset_error.2518533268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/7.xbar_unmapped_addr.1113396544 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 1157177171 ps |
| CPU time | 9.07 seconds |
| Started | Aug 23 01:09:28 AM UTC 24 |
| Finished | Aug 23 01:09:38 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113396544 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_unmapped_addr.1113396544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/7.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_access_same_device.3734721875 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 456441365 ps |
| CPU time | 12.42 seconds |
| Started | Aug 23 01:09:46 AM UTC 24 |
| Finished | Aug 23 01:09:59 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734721875 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_access_same_device.3734721875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_access_same_device_slow_rsp.3346024061 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 13423476858 ps |
| CPU time | 51.5 seconds |
| Started | Aug 23 01:09:48 AM UTC 24 |
| Finished | Aug 23 01:10:41 AM UTC 24 |
| Peak memory | 212392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3346024061 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_access_same_device_slow_rsp.3346024061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_error_and_unmapped_addr.2772132892 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 174646770 ps |
| CPU time | 3.15 seconds |
| Started | Aug 23 01:09:57 AM UTC 24 |
| Finished | Aug 23 01:10:01 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772132892 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_error_and_unmapped_addr.2772132892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_error_random.2896876123 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 40936491 ps |
| CPU time | 6.45 seconds |
| Started | Aug 23 01:09:51 AM UTC 24 |
| Finished | Aug 23 01:09:59 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896876123 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim -vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_error_random.2896876123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_random.1109089123 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 472142990 ps |
| CPU time | 14.38 seconds |
| Started | Aug 23 01:09:40 AM UTC 24 |
| Finished | Aug 23 01:09:56 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109089123 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_random.1109089123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_random_large_delays.3418070952 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 145795530573 ps |
| CPU time | 122.88 seconds |
| Started | Aug 23 01:09:41 AM UTC 24 |
| Finished | Aug 23 01:11:46 AM UTC 24 |
| Peak memory | 212384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3418070952 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_random_large_delays.3418070952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_random_slow_rsp.1594197841 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 31659572381 ps |
| CPU time | 192.43 seconds |
| Started | Aug 23 01:09:46 AM UTC 24 |
| Finished | Aug 23 01:13:01 AM UTC 24 |
| Peak memory | 212204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594197841 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_random_slow_rsp.1594197841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_random_zero_delays.1396820845 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 50742331 ps |
| CPU time | 4.48 seconds |
| Started | Aug 23 01:09:41 AM UTC 24 |
| Finished | Aug 23 01:09:47 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396820845 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_random_zero_delays.1396820845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_same_source.4042518663 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 39150686 ps |
| CPU time | 3.73 seconds |
| Started | Aug 23 01:09:49 AM UTC 24 |
| Finished | Aug 23 01:09:54 AM UTC 24 |
| Peak memory | 212124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042518663 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_same_source.4042518663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_smoke.3848894779 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 56530487 ps |
| CPU time | 2.23 seconds |
| Started | Aug 23 01:09:35 AM UTC 24 |
| Finished | Aug 23 01:09:38 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848894779 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_smoke.3848894779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_smoke_large_delays.1086942704 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 5522880916 ps |
| CPU time | 18.61 seconds |
| Started | Aug 23 01:09:39 AM UTC 24 |
| Finished | Aug 23 01:09:59 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086942704 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_smoke_large_delays.1086942704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_smoke_slow_rsp.3340758698 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 2274930084 ps |
| CPU time | 9.93 seconds |
| Started | Aug 23 01:09:39 AM UTC 24 |
| Finished | Aug 23 01:09:50 AM UTC 24 |
| Peak memory | 212388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340758698 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_smoke_slow_rsp.3340758698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_smoke_zero_delays.3661456478 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 14649152 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 01:09:38 AM UTC 24 |
| Finished | Aug 23 01:09:41 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661456478 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_smoke_zero_delays.3661456478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_stress_all.2556249836 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 15580204474 ps |
| CPU time | 123.02 seconds |
| Started | Aug 23 01:09:57 AM UTC 24 |
| Finished | Aug 23 01:12:02 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556249836 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_stress_all.2556249836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_stress_all_with_error.183075300 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 1365624582 ps |
| CPU time | 8.93 seconds |
| Started | Aug 23 01:10:00 AM UTC 24 |
| Finished | Aug 23 01:10:10 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=183075300 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_stress_all_with_error.183075300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_stress_all_with_rand_reset.2108744499 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 554628206 ps |
| CPU time | 71.5 seconds |
| Started | Aug 23 01:10:00 AM UTC 24 |
| Finished | Aug 23 01:11:13 AM UTC 24 |
| Peak memory | 216228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108744499 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_stress_all_with_rand_reset.2108744499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_stress_all_with_reset_error.1026624505 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 11685641161 ps |
| CPU time | 163.89 seconds |
| Started | Aug 23 01:10:00 AM UTC 24 |
| Finished | Aug 23 01:12:47 AM UTC 24 |
| Peak memory | 218536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026624505 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_stress_all_with_reset_error.1026624505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/8.xbar_unmapped_addr.3281496516 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 913419200 ps |
| CPU time | 8.54 seconds |
| Started | Aug 23 01:09:54 AM UTC 24 |
| Finished | Aug 23 01:10:04 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281496516 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 8.xbar_unmapped_addr.3281496516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/8.xbar_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_access_same_device.3854169341 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 75655516 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 01:10:11 AM UTC 24 |
| Finished | Aug 23 01:10:14 AM UTC 24 |
| Peak memory | 212136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854169341 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xb ar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_access_same_device.3854169341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_access_same_device/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_access_same_device_slow_rsp.4016304922 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 43147620179 ps |
| CPU time | 128.73 seconds |
| Started | Aug 23 01:10:11 AM UTC 24 |
| Finished | Aug 23 01:12:22 AM UTC 24 |
| Peak memory | 212520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016304922 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_access_same_device_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_access_same_device_slow_rsp.4016304922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_access_same_device_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_error_and_unmapped_addr.3606078472 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 1005477606 ps |
| CPU time | 5.28 seconds |
| Started | Aug 23 01:10:16 AM UTC 24 |
| Finished | Aug 23 01:10:22 AM UTC 24 |
| Peak memory | 212328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606078472 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_p eri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_error_and_unmapped_addr.3606078472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_error_and_unmapped_addr/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_error_random.24999586 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 1952642165 ps |
| CPU time | 13.64 seconds |
| Started | Aug 23 01:10:13 AM UTC 24 |
| Finished | Aug 23 01:10:28 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24999586 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM _TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_error_random.24999586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_error_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_random.4168231087 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 25368291 ps |
| CPU time | 3.74 seconds |
| Started | Aug 23 01:10:06 AM UTC 24 |
| Finished | Aug 23 01:10:11 AM UTC 24 |
| Peak memory | 212256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168231087 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim- vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_random.4168231087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_random/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_random_large_delays.1103646461 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 50398756747 ps |
| CPU time | 190 seconds |
| Started | Aug 23 01:10:06 AM UTC 24 |
| Finished | Aug 23 01:13:19 AM UTC 24 |
| Peak memory | 212512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103646461 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar _peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_random_large_delays.1103646461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_random_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_random_slow_rsp.1152967523 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 57973930024 ps |
| CPU time | 78.49 seconds |
| Started | Aug 23 01:10:09 AM UTC 24 |
| Finished | Aug 23 01:11:29 AM UTC 24 |
| Peak memory | 212396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152967523 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_per i-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_random_slow_rsp.1152967523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_random_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_random_zero_delays.584140516 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 84576198 ps |
| CPU time | 8.47 seconds |
| Started | Aug 23 01:10:06 AM UTC 24 |
| Finished | Aug 23 01:10:15 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=584140516 -assert nopostproc +UVM_TESTNAME=xbar _base_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_random_zero_delays.584140516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_random_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_same_source.3608881351 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 65351424 ps |
| CPU time | 5.64 seconds |
| Started | Aug 23 01:10:13 AM UTC 24 |
| Finished | Aug 23 01:10:20 AM UTC 24 |
| Peak memory | 212128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608881351 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_same_source_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_same_source.3608881351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_same_source/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_smoke.1749821074 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 105583925 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 01:10:01 AM UTC 24 |
| Finished | Aug 23 01:10:04 AM UTC 24 |
| Peak memory | 211240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749821074 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-v cs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_smoke.1749821074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_smoke_large_delays.1684738966 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 2823096093 ps |
| CPU time | 11.82 seconds |
| Started | Aug 23 01:10:04 AM UTC 24 |
| Finished | Aug 23 01:10:17 AM UTC 24 |
| Peak memory | 212192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=1000 +max_host_rsp_delay=1000 +max_device _req_delay=1000 +max_device_rsp_delay=1000 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UV M_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684738966 -assert nopostproc +UVM_TESTNAME=xbar_bas e_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_ peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_smoke_large_delays.1684738966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_smoke_large_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_smoke_slow_rsp.3499938217 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 971235990 ps |
| CPU time | 9.07 seconds |
| Started | Aug 23 01:10:04 AM UTC 24 |
| Finished | Aug 23 01:10:14 AM UTC 24 |
| Peak memory | 212324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_r eq_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499938217 -assert nopostproc +UVM_TESTNAME=xbar_base_te st +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_smoke_slow_rsp.3499938217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_smoke_slow_rsp/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_smoke_zero_delays.2889825376 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 16817937 ps |
| CPU time | 1.68 seconds |
| Started | Aug 23 01:10:02 AM UTC 24 |
| Finished | Aug 23 01:10:05 AM UTC 24 |
| Peak memory | 211236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +zero_delays=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTE S +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889825376 -assert nopostproc +UVM_TESTNAME=xba r_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/ xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_smoke_zero_delays.2889825376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_smoke_zero_delays/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_stress_all.2928795807 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 3437027092 ps |
| CPU time | 62.58 seconds |
| Started | Aug 23 01:10:17 AM UTC 24 |
| Finished | Aug 23 01:11:21 AM UTC 24 |
| Peak memory | 214500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928795807 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri- sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_stress_all.2928795807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_stress_all_with_error.1365795519 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 2691738376 ps |
| CPU time | 50.99 seconds |
| Started | Aug 23 01:10:18 AM UTC 24 |
| Finished | Aug 23 01:11:10 AM UTC 24 |
| Peak memory | 212196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365795519 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri -sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_stress_all_with_error.1365795519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_stress_all_with_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_stress_all_with_rand_reset.1436288370 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 316995395 ps |
| CPU time | 62.3 seconds |
| Started | Aug 23 01:10:17 AM UTC 24 |
| Finished | Aug 23 01:11:21 AM UTC 24 |
| Peak memory | 214188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436288370 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_stress_all_with_rand_reset.1436288370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_stress_all_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_stress_all_with_reset_error.1723388366 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 578915681 ps |
| CPU time | 19.41 seconds |
| Started | Aug 23 01:10:18 AM UTC 24 |
| Finished | Aug 23 01:10:39 AM UTC 24 |
| Peak memory | 214180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723388366 -assert nopostproc +UVM_TESTNAME=xbar_error_test +U VM_TEST_SEQ=xbar_stress_all_with_rand_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_stress_all_with_reset_error.1723388366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_stress_all_with_reset_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/coverage/xbar_build_mode/9.xbar_unmapped_addr.3641074046 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 93868740 ps |
| CPU time | 5.28 seconds |
| Started | Aug 23 01:10:16 AM UTC 24 |
| Finished | Aug 23 01:10:22 AM UTC 24 |
| Peak memory | 212132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641074046 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UV M_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/xbar_pe ri-sim-vcs/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 9.xbar_unmapped_addr.3641074046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/xbar_peri-sim-vcs/9.xbar_unmapped_addr/latest |
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