Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	171	1			T3	1		T6	1		T16	1
index[0x1]	167	1			T6	1		T17	1		T56	1
index[0x2]	227	1			T5	1		T20	1		T14	1
index[0x3]	178	1			T18	1		T19	1		T20	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	198	1			T3	1		T18	1		T19	1
lens_less_than_1000[1]	160	1			T5	1		T6	1		T56	1
lens_less_than_1000[2]	108	1			T20	1		T6	1		T56	1
lens_less_than_1000[3]	80	1			T16	1		T34	1		T76	1
lens_less_than_1000[4]	71	1			T60	1		T61	1		T65	1
lens_less_than_1000[5]	45	1			T60	1		T96	2		T101	3
lens_less_than_1000[6]	39	1			T20	1		T92	1		T85	1
lens_less_than_1000[7]	18	1			T56	1		T95	1		T101	1
lens_less_than_1000[8]	5	1			T125	1		T232	1		T233	1
lens_less_than_1000[9]	5	1			T93	1		T234	1		T235	1
len_2	14	1			T17	1		T64	1		T70	3

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[9]]	0	1	1
[index[0x1]]	[lens_less_than_1000[8]]	0	1	1
[index[0x3]]	[lens_less_than_1000[8]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	44	1			T3	1		T88	1		T93	2
index[0x0]	lens_less_than_1000[1]	30	1			T58	1		T39	1		T64	1
index[0x0]	lens_less_than_1000[2]	35	1			T6	1		T61	1		T103	4
index[0x0]	lens_less_than_1000[3]	21	1			T16	1		T81	1		T36	1
index[0x0]	lens_less_than_1000[4]	21	1			T65	1		T72	1		T236	1
index[0x0]	lens_less_than_1000[5]	7	1			T101	2		T62	1		T237	1
index[0x0]	lens_less_than_1000[6]	6	1			T121	1		T37	1		T238	2
index[0x0]	lens_less_than_1000[7]	1	1			T95	1		-	-		-	-
index[0x0]	lens_less_than_1000[8]	4	1			T232	1		T233	1		T239	1
index[0x0]	len_2	2	1			T240	1		T241	1		-	-
index[0x1]	lens_less_than_1000[0]	35	1			T75	1		T83	1		T93	2
index[0x1]	lens_less_than_1000[1]	40	1			T6	1		T56	1		T34	1
index[0x1]	lens_less_than_1000[2]	19	1			T66	1		T126	1		T242	7
index[0x1]	lens_less_than_1000[3]	24	1			T34	1		T76	1		T77	1
index[0x1]	lens_less_than_1000[4]	13	1			T61	1		T243	1		T73	2
index[0x1]	lens_less_than_1000[5]	9	1			T114	1		T121	1		T244	1
index[0x1]	lens_less_than_1000[6]	13	1			T85	1		T51	1		T245	1
index[0x1]	lens_less_than_1000[7]	9	1			T101	1		T61	1		T63	1
index[0x1]	lens_less_than_1000[9]	1	1			T246	1		-	-		-	-
index[0x1]	len_2	4	1			T17	1		T70	1		T247	1
index[0x2]	lens_less_than_1000[0]	70	1			T14	1		T16	1		T35	1
index[0x2]	lens_less_than_1000[1]	45	1			T5	1		T90	1		T248	1
index[0x2]	lens_less_than_1000[2]	34	1			T20	1		T56	1		T97	3
index[0x2]	lens_less_than_1000[3]	20	1			T101	1		T66	1		T249	1
index[0x2]	lens_less_than_1000[4]	15	1			T72	3		T74	1		T250	1
index[0x2]	lens_less_than_1000[5]	15	1			T60	1		T96	2		T101	1
index[0x2]	lens_less_than_1000[6]	13	1			T60	2		T106	1		T62	1
index[0x2]	lens_less_than_1000[7]	7	1			T66	1		T121	1		T251	1
index[0x2]	lens_less_than_1000[8]	1	1			T125	1		-	-		-	-
index[0x2]	lens_less_than_1000[9]	1	1			T239	1		-	-		-	-
index[0x2]	len_2	6	1			T70	2		T252	1		T253	1
index[0x3]	lens_less_than_1000[0]	49	1			T18	1		T19	1		T31	1
index[0x3]	lens_less_than_1000[1]	45	1			T93	1		T95	1		T62	1
index[0x3]	lens_less_than_1000[2]	20	1			T75	1		T227	1		T72	1
index[0x3]	lens_less_than_1000[3]	15	1			T100	1		T62	1		T104	1
index[0x3]	lens_less_than_1000[4]	22	1			T60	1		T104	1		T108	1
index[0x3]	lens_less_than_1000[5]	14	1			T106	1		T52	2		T254	1
index[0x3]	lens_less_than_1000[6]	7	1			T20	1		T92	1		T66	2
index[0x3]	lens_less_than_1000[7]	1	1			T56	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	3	1			T93	1		T234	1		T235	1
index[0x3]	len_2	2	1			T64	1		T255	1		-	-