Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
96.61	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	2	42	95.45

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	2	42	95.45	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	210	1			T1	1		T3	1		T33	1
index[0x1]	176	1			T3	1		T44	1		T57	1
index[0x2]	167	1			T1	1		T5	1		T44	1
index[0x3]	175	1			T3	4		T4	2		T33	2

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	206	1			T3	4		T33	2		T58	1
lens_less_than_1000[1]	129	1			T1	1		T3	1		T15	1
lens_less_than_1000[2]	115	1			T3	1		T5	1		T44	2
lens_less_than_1000[3]	85	1			T45	11		T97	1		T100	1
lens_less_than_1000[4]	80	1			T57	1		T17	1		T78	1
lens_less_than_1000[5]	34	1			T91	1		T103	1		T63	1
lens_less_than_1000[6]	36	1			T44	1		T82	1		T62	2
lens_less_than_1000[7]	20	1			T1	1		T4	2		T62	1
lens_less_than_1000[8]	14	1			T33	1		T103	1		T63	1
lens_less_than_1000[9]	3	1			T62	1		T70	1		T247	1
len_2	6	1			T105	1		T69	1		T127	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	2	42	95.45	2

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[9]]	0	1	1
[index[0x2]]	[len_2]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	51	1			T33	1		T58	1		T34	1
index[0x0]	lens_less_than_1000[1]	36	1			T1	1		T3	1		T62	1
index[0x0]	lens_less_than_1000[2]	36	1			T44	1		T124	1		T41	1
index[0x0]	lens_less_than_1000[3]	33	1			T45	11		T62	1		T66	1
index[0x0]	lens_less_than_1000[4]	28	1			T17	1		T78	1		T107	2
index[0x0]	lens_less_than_1000[5]	4	1			T107	1		T32	1		T248	1
index[0x0]	lens_less_than_1000[6]	11	1			T62	1		T63	1		T104	1
index[0x0]	lens_less_than_1000[7]	3	1			T66	1		T249	1		T250	1
index[0x0]	lens_less_than_1000[8]	5	1			T63	1		T251	3		T252	1
index[0x0]	lens_less_than_1000[9]	1	1			T62	1		-	-		-	-
index[0x0]	len_2	2	1			T105	1		T253	1		-	-
index[0x1]	lens_less_than_1000[0]	52	1			T16	1		T35	1		T122	1
index[0x1]	lens_less_than_1000[1]	32	1			T37	1		T97	1		T103	1
index[0x1]	lens_less_than_1000[2]	24	1			T3	1		T102	1		T135	1
index[0x1]	lens_less_than_1000[3]	20	1			T100	1		T104	1		T107	1
index[0x1]	lens_less_than_1000[4]	16	1			T57	1		T41	1		T107	2
index[0x1]	lens_less_than_1000[5]	12	1			T103	1		T254	1		T74	1
index[0x1]	lens_less_than_1000[6]	13	1			T44	1		T82	1		T62	1
index[0x1]	lens_less_than_1000[7]	5	1			T255	1		T256	1		T257	1
index[0x1]	lens_less_than_1000[8]	1	1			T255	1		-	-		-	-
index[0x1]	len_2	1	1			T69	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	44	1			T10	1		T99	1		T91	1
index[0x2]	lens_less_than_1000[1]	31	1			T92	1		T103	1		T86	1
index[0x2]	lens_less_than_1000[2]	35	1			T5	1		T44	1		T17	1
index[0x2]	lens_less_than_1000[3]	19	1			T97	1		T69	1		T258	1
index[0x2]	lens_less_than_1000[4]	18	1			T91	1		T259	1		T107	2
index[0x2]	lens_less_than_1000[5]	7	1			T260	1		T261	1		T262	3
index[0x2]	lens_less_than_1000[6]	5	1			T70	1		T263	1		T264	1
index[0x2]	lens_less_than_1000[7]	4	1			T1	1		T62	1		T63	1
index[0x2]	lens_less_than_1000[8]	3	1			T265	2		T266	1		-	-
index[0x2]	lens_less_than_1000[9]	1	1			T247	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	59	1			T3	4		T33	1		T34	1
index[0x3]	lens_less_than_1000[1]	30	1			T15	1		T78	1		T103	1
index[0x3]	lens_less_than_1000[2]	20	1			T62	1		T103	1		T63	1
index[0x3]	lens_less_than_1000[3]	13	1			T105	1		T267	1		T204	1
index[0x3]	lens_less_than_1000[4]	18	1			T97	1		T100	1		T117	1
index[0x3]	lens_less_than_1000[5]	11	1			T91	1		T63	1		T104	1
index[0x3]	lens_less_than_1000[6]	7	1			T259	1		T268	2		T131	1
index[0x3]	lens_less_than_1000[7]	8	1			T4	2		T66	1		T133	1
index[0x3]	lens_less_than_1000[8]	5	1			T33	1		T103	1		T269	1
index[0x3]	lens_less_than_1000[9]	1	1			T70	1		-	-		-	-
index[0x3]	len_2	3	1			T127	1		T270	1		T271	1