Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	69	0	69	100.00
Crosses	260	0	260	100.00

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
alert_cause_cp	65	0	65	100.00	100	1	1	0
class_index_cp	4	0	4	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::alert_cause_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
alert_cause_cross_class_index	260	0	260	100.00	100	1	1	0

Summary for Variable alert_cause_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	65	0	65	100.00

User Defined Bins for alert_cause_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert[0x0]	32002	1			T1	6		T7	2		T4	102
alert[0x1]	30004	1			T1	5		T4	44		T5	384
alert[0x2]	30243	1			T1	5		T3	3		T4	28
alert[0x3]	32180	1			T1	3		T7	6		T4	84
alert[0x4]	30142	1			T1	1		T7	6		T4	71
alert[0x5]	35058	1			T1	6		T2	1		T3	2
alert[0x6]	36265	1			T1	1		T3	1		T7	8
alert[0x7]	33379	1			T1	6		T7	2		T4	68
alert[0x8]	36057	1			T1	5		T4	125		T5	124
alert[0x9]	31318	1			T1	10		T2	1		T3	3
alert[0xa]	36386	1			T7	6		T4	35		T5	327
alert[0xb]	32842	1			T1	4		T7	8		T4	16
alert[0xc]	31024	1			T1	6		T3	3		T7	1
alert[0xd]	33190	1			T1	1		T3	1		T4	40
alert[0xe]	32027	1			T1	5		T3	2		T7	9
alert[0xf]	32639	1			T3	3		T7	8		T4	31
alert[0x10]	30786	1			T1	1		T7	1		T4	35
alert[0x11]	31817	1			T1	6		T3	1		T7	9
alert[0x12]	31319	1			T1	1		T2	1		T7	1
alert[0x13]	38954	1			T1	1		T3	2		T7	2
alert[0x14]	37409	1			T1	1		T7	1		T4	108
alert[0x15]	40102	1			T1	6		T2	1		T7	4
alert[0x16]	37261	1			T1	6		T3	2		T7	9
alert[0x17]	32858	1			T1	8		T3	2		T4	107
alert[0x18]	35650	1			T1	6		T7	1		T4	85
alert[0x19]	32709	1			T1	6		T3	2		T4	78
alert[0x1a]	30970	1			T1	7		T2	1		T3	1
alert[0x1b]	33370	1			T3	4		T7	6		T4	13
alert[0x1c]	34046	1			T1	2		T7	1		T4	40
alert[0x1d]	36020	1			T1	1		T3	4		T7	10
alert[0x1e]	31704	1			T1	5		T3	1		T7	8
alert[0x1f]	35819	1			T1	8		T4	113		T5	354
alert[0x20]	33627	1			T3	1		T4	22		T5	472
alert[0x21]	32126	1			T1	3		T3	2		T4	56
alert[0x22]	36426	1			T1	5		T2	1		T7	9
alert[0x23]	31269	1			T1	8		T2	1		T3	1
alert[0x24]	34337	1			T2	1		T4	9		T5	336
alert[0x25]	31686	1			T1	1		T7	1		T4	33
alert[0x26]	34776	1			T2	1		T3	1		T7	8
alert[0x27]	33825	1			T1	2		T3	1		T7	2
alert[0x28]	37257	1			T1	5		T2	1		T3	1
alert[0x29]	29882	1			T1	3		T7	8		T4	68
alert[0x2a]	34016	1			T7	3		T4	120		T5	130
alert[0x2b]	35312	1			T1	3		T2	1		T3	4
alert[0x2c]	37355	1			T1	1		T7	1		T4	12
alert[0x2d]	37561	1			T2	1		T3	1		T4	133
alert[0x2e]	38479	1			T3	1		T7	3		T4	75
alert[0x2f]	32218	1			T1	4		T3	1		T7	1
alert[0x30]	33581	1			T3	1		T7	7		T4	17
alert[0x31]	32833	1			T1	10		T3	2		T7	1
alert[0x32]	31260	1			T3	1		T4	75		T5	21
alert[0x33]	30446	1			T1	2		T7	1		T4	89
alert[0x34]	32673	1			T7	7		T4	110		T5	148
alert[0x35]	31862	1			T1	6		T2	1		T7	1
alert[0x36]	31914	1			T1	5		T3	3		T7	8
alert[0x37]	29757	1			T3	1		T4	49		T5	274
alert[0x38]	31308	1			T3	2		T7	3		T4	81
alert[0x39]	31082	1			T1	2		T3	1		T7	13
alert[0x3a]	33512	1			T1	6		T2	1		T3	1
alert[0x3b]	30745	1			T1	6		T7	9		T4	43
alert[0x3c]	30960	1			T3	2		T4	66		T5	481
alert[0x3d]	29792	1			T3	2		T7	8		T4	28
alert[0x3e]	30748	1			T2	1		T7	4		T4	51
alert[0x3f]	33259	1			T3	1		T7	6		T4	88
alert[0x40]	31164	1			T1	2		T3	1		T7	9

---

Summary for Variable class_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for class_index_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
class_i[0x0]	631839	1			T1	64		T2	3		T3	18
class_i[0x1]	519305	1			T1	52		T2	3		T3	19
class_i[0x2]	505092	1			T1	39		T2	3		T3	17
class_i[0x3]	506362	1			T1	48		T2	6		T3	15

---

Summary for Cross alert_cause_cross_class_index

Samples crossed: alert_cause_cp class_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	260	0	260	100.00

Automatically Generated Cross Bins for alert_cause_cross_class_index

Bins

alert_cause_cp	class_index_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert[0x0]	class_i[0x0]	8573	1			T1	3		T7	2		T5	167
alert[0x0]	class_i[0x1]	6924	1			T1	2		T5	2		T6	231
alert[0x0]	class_i[0x2]	6723	1			T1	1		T4	27		T5	128
alert[0x0]	class_i[0x3]	9782	1			T4	75		T5	2		T64	1
alert[0x1]	class_i[0x0]	9949	1			T4	10		T5	245		T21	2
alert[0x1]	class_i[0x1]	7461	1			T1	4		T4	9		T5	2
alert[0x1]	class_i[0x2]	4820	1			T1	1		T4	23		T5	2
alert[0x1]	class_i[0x3]	7774	1			T4	2		T5	135		T19	1
alert[0x2]	class_i[0x0]	11125	1			T1	1		T4	28		T5	22
alert[0x2]	class_i[0x1]	5356	1			T5	5		T6	209		T58	3
alert[0x2]	class_i[0x2]	8049	1			T1	3		T3	3		T21	10
alert[0x2]	class_i[0x3]	5713	1			T1	1		T5	205		T20	6
alert[0x3]	class_i[0x0]	9589	1			T1	3		T7	6		T4	20
alert[0x3]	class_i[0x1]	8371	1			T4	1		T21	2		T23	9
alert[0x3]	class_i[0x2]	6630	1			T4	62		T5	1		T6	243
alert[0x3]	class_i[0x3]	7590	1			T4	1		T5	341		T23	1
alert[0x4]	class_i[0x0]	9625	1			T7	6		T4	61		T5	263
alert[0x4]	class_i[0x1]	5965	1			T1	1		T4	8		T5	10
alert[0x4]	class_i[0x2]	6510	1			T5	6		T58	1		T64	3
alert[0x4]	class_i[0x3]	8042	1			T4	2		T6	230		T23	2
alert[0x5]	class_i[0x0]	9370	1			T1	6		T7	7		T4	13
alert[0x5]	class_i[0x1]	7937	1			T2	1		T4	6		T5	1
alert[0x5]	class_i[0x2]	9406	1			T4	27		T19	1		T57	6
alert[0x5]	class_i[0x3]	8345	1			T3	2		T5	5		T21	1
alert[0x6]	class_i[0x0]	11219	1			T7	8		T4	17		T21	12
alert[0x6]	class_i[0x1]	7677	1			T3	1		T5	2		T21	8
alert[0x6]	class_i[0x2]	8822	1			T4	78		T5	1		T19	3
alert[0x6]	class_i[0x3]	8547	1			T1	1		T4	7		T64	1
alert[0x7]	class_i[0x0]	10088	1			T7	2		T4	21		T5	151
alert[0x7]	class_i[0x1]	7603	1			T5	8		T23	1		T64	2
alert[0x7]	class_i[0x2]	6377	1			T1	5		T4	1		T5	6
alert[0x7]	class_i[0x3]	9311	1			T1	1		T4	46		T23	219
alert[0x8]	class_i[0x0]	12262	1			T1	5		T4	88		T5	113
alert[0x8]	class_i[0x1]	7904	1			T20	6		T23	218		T58	1
alert[0x8]	class_i[0x2]	8311	1			T6	207		T59	1		T60	114
alert[0x8]	class_i[0x3]	7580	1			T4	37		T5	11		T64	1
alert[0x9]	class_i[0x0]	9027	1			T1	1		T2	1		T3	3
alert[0x9]	class_i[0x1]	8932	1			T1	3		T4	4		T5	1
alert[0x9]	class_i[0x2]	7603	1			T1	1		T4	31		T5	305
alert[0x9]	class_i[0x3]	5756	1			T1	5		T4	52		T6	222
alert[0xa]	class_i[0x0]	7412	1			T7	6		T4	32		T5	5
alert[0xa]	class_i[0x1]	11918	1			T4	1		T5	192		T21	1
alert[0xa]	class_i[0x2]	9121	1			T6	226		T20	3		T23	45
alert[0xa]	class_i[0x3]	7935	1			T4	2		T5	130		T22	1
alert[0xb]	class_i[0x0]	8067	1			T7	8		T4	5		T5	7
alert[0xb]	class_i[0x1]	10366	1			T1	3		T4	9		T5	188
alert[0xb]	class_i[0x2]	7143	1			T4	1		T5	140		T6	232
alert[0xb]	class_i[0x3]	7266	1			T1	1		T4	1		T5	3
alert[0xc]	class_i[0x0]	8501	1			T1	1		T7	1		T4	34
alert[0xc]	class_i[0x1]	8517	1			T3	1		T5	95		T19	1
alert[0xc]	class_i[0x2]	6329	1			T3	1		T20	5		T21	9
alert[0xc]	class_i[0x3]	7677	1			T1	5		T3	1		T5	12
alert[0xd]	class_i[0x0]	11159	1			T3	1		T4	18		T5	11
alert[0xd]	class_i[0x1]	7946	1			T1	1		T4	19		T5	1
alert[0xd]	class_i[0x2]	6139	1			T4	1		T5	119		T6	224
alert[0xd]	class_i[0x3]	7946	1			T4	2		T5	10		T19	1
alert[0xe]	class_i[0x0]	10242	1			T3	2		T7	9		T4	70
alert[0xe]	class_i[0x1]	6456	1			T4	2		T5	112		T6	204
alert[0xe]	class_i[0x2]	7697	1			T1	4		T5	4		T23	1
alert[0xe]	class_i[0x3]	7632	1			T1	1		T4	6		T5	1
alert[0xf]	class_i[0x0]	11086	1			T7	8		T4	20		T5	309
alert[0xf]	class_i[0x1]	7285	1			T3	2		T4	3		T23	1
alert[0xf]	class_i[0x2]	6709	1			T3	1		T4	7		T5	6
alert[0xf]	class_i[0x3]	7559	1			T4	1		T5	1		T6	203
alert[0x10]	class_i[0x0]	10898	1			T7	1		T5	206		T19	1
alert[0x10]	class_i[0x1]	6803	1			T4	34		T5	2		T21	7
alert[0x10]	class_i[0x2]	6451	1			T4	1		T5	1		T6	213
alert[0x10]	class_i[0x3]	6634	1			T1	1		T5	2		T22	1
alert[0x11]	class_i[0x0]	8954	1			T1	5		T7	9		T4	8
alert[0x11]	class_i[0x1]	8799	1			T3	1		T5	4		T21	1
alert[0x11]	class_i[0x2]	7743	1			T5	124		T21	2		T23	1
alert[0x11]	class_i[0x3]	6321	1			T1	1		T5	179		T20	7
alert[0x12]	class_i[0x0]	9080	1			T1	1		T7	1		T4	5
alert[0x12]	class_i[0x1]	9237	1			T4	54		T5	10		T20	3
alert[0x12]	class_i[0x2]	6279	1			T2	1		T5	1		T21	1
alert[0x12]	class_i[0x3]	6723	1			T4	37		T5	9		T23	1
alert[0x13]	class_i[0x0]	10176	1			T1	1		T7	2		T4	7
alert[0x13]	class_i[0x1]	11311	1			T4	29		T5	1		T6	220
alert[0x13]	class_i[0x2]	9160	1			T3	2		T4	2		T23	47
alert[0x13]	class_i[0x3]	8307	1			T4	4		T21	3		T22	1
alert[0x14]	class_i[0x0]	9030	1			T7	1		T4	37		T5	19
alert[0x14]	class_i[0x1]	9463	1			T1	1		T5	122		T6	243
alert[0x14]	class_i[0x2]	9538	1			T4	10		T5	1		T94	7
alert[0x14]	class_i[0x3]	9378	1			T4	61		T5	1		T57	5
alert[0x15]	class_i[0x0]	11704	1			T1	5		T7	4		T4	8
alert[0x15]	class_i[0x1]	9264	1			T2	1		T4	9		T5	1
alert[0x15]	class_i[0x2]	8856	1			T1	1		T5	142		T20	6
alert[0x15]	class_i[0x3]	10278	1			T5	5		T6	238		T23	3
alert[0x16]	class_i[0x0]	10627	1			T3	1		T7	9		T4	30
alert[0x16]	class_i[0x1]	7330	1			T3	1		T4	57		T5	317
alert[0x16]	class_i[0x2]	12173	1			T4	1		T5	1		T95	9
alert[0x16]	class_i[0x3]	7131	1			T1	6		T4	10		T5	9
alert[0x17]	class_i[0x0]	9014	1			T1	7		T3	1		T4	61
alert[0x17]	class_i[0x1]	7353	1			T5	147		T20	1		T23	1
alert[0x17]	class_i[0x2]	8807	1			T1	1		T4	45		T19	1
alert[0x17]	class_i[0x3]	7684	1			T3	1		T4	1		T5	155
alert[0x18]	class_i[0x0]	9637	1			T1	1		T7	1		T4	82
alert[0x18]	class_i[0x1]	10182	1			T4	1		T5	2		T6	221
alert[0x18]	class_i[0x2]	8286	1			T1	4		T4	1		T5	250
alert[0x18]	class_i[0x3]	7545	1			T1	1		T4	1		T20	2
alert[0x19]	class_i[0x0]	11000	1			T1	5		T4	12		T5	1
alert[0x19]	class_i[0x1]	6887	1			T3	1		T4	1		T5	104
alert[0x19]	class_i[0x2]	7684	1			T4	1		T5	143		T94	1
alert[0x19]	class_i[0x3]	7138	1			T1	1		T3	1		T4	64
alert[0x1a]	class_i[0x0]	9707	1			T1	1		T2	1		T4	70
alert[0x1a]	class_i[0x1]	5437	1			T1	1		T4	1		T5	15
alert[0x1a]	class_i[0x2]	8314	1			T3	1		T4	11		T5	170
alert[0x1a]	class_i[0x3]	7512	1			T1	5		T4	1		T64	1
alert[0x1b]	class_i[0x0]	9165	1			T7	6		T4	4		T5	23
alert[0x1b]	class_i[0x1]	6773	1			T3	4		T4	9		T5	1
alert[0x1b]	class_i[0x2]	8460	1			T5	131		T57	3		T25	37
alert[0x1b]	class_i[0x3]	8972	1			T5	1		T23	11		T94	1
alert[0x1c]	class_i[0x0]	9774	1			T1	1		T7	1		T4	5
alert[0x1c]	class_i[0x1]	7313	1			T4	34		T5	15		T6	221
alert[0x1c]	class_i[0x2]	7224	1			T1	1		T4	1		T5	1
alert[0x1c]	class_i[0x3]	9735	1			T5	189		T21	6		T22	1
alert[0x1d]	class_i[0x0]	10190	1			T7	10		T4	2		T5	37
alert[0x1d]	class_i[0x1]	6763	1			T4	11		T5	1		T23	197
alert[0x1d]	class_i[0x2]	8592	1			T3	4		T4	1		T5	2
alert[0x1d]	class_i[0x3]	10475	1			T1	1		T5	2		T6	211
alert[0x1e]	class_i[0x0]	9430	1			T7	8		T4	24		T5	303
alert[0x1e]	class_i[0x1]	4150	1			T1	5		T5	9		T21	11
alert[0x1e]	class_i[0x2]	8141	1			T3	1		T4	34		T64	1
alert[0x1e]	class_i[0x3]	9983	1			T5	5		T19	1		T6	217
alert[0x1f]	class_i[0x0]	8962	1			T1	1		T4	85		T5	4
alert[0x1f]	class_i[0x1]	9148	1			T4	1		T5	14		T21	1
alert[0x1f]	class_i[0x2]	9092	1			T4	27		T5	140		T19	2
alert[0x1f]	class_i[0x3]	8617	1			T1	7		T5	196		T21	1
alert[0x20]	class_i[0x0]	8913	1			T4	16		T5	324		T19	1
alert[0x20]	class_i[0x1]	9918	1			T3	1		T5	3		T6	203
alert[0x20]	class_i[0x2]	6704	1			T4	5		T5	137		T21	3
alert[0x20]	class_i[0x3]	8092	1			T4	1		T5	8		T23	52
alert[0x21]	class_i[0x0]	12178	1			T4	21		T5	21		T21	14
alert[0x21]	class_i[0x1]	5969	1			T3	1		T5	10		T6	218
alert[0x21]	class_i[0x2]	6589	1			T1	2		T5	12		T23	196
alert[0x21]	class_i[0x3]	7390	1			T1	1		T3	1		T4	35
alert[0x22]	class_i[0x0]	10934	1			T1	4		T7	9		T4	14
alert[0x22]	class_i[0x1]	8316	1			T4	8		T5	1		T23	4
alert[0x22]	class_i[0x2]	7975	1			T4	31		T5	2		T21	7
alert[0x22]	class_i[0x3]	9201	1			T1	1		T2	1		T4	1
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alert[0x23]	class_i[0x1]	6914	1			T1	7		T4	8		T5	7
alert[0x23]	class_i[0x2]	9467	1			T1	1		T4	63		T6	218
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alert[0x24]	class_i[0x1]	10590	1			T4	8		T5	191		T94	1
alert[0x24]	class_i[0x2]	7603	1			T64	4		T95	2		T60	3
alert[0x24]	class_i[0x3]	6351	1			T2	1		T5	132		T64	1
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alert[0x25]	class_i[0x1]	8328	1			T4	2		T5	3		T20	7
alert[0x25]	class_i[0x2]	7749	1			T4	3		T5	2		T23	1
alert[0x25]	class_i[0x3]	7198	1			T1	1		T4	4		T23	205
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alert[0x26]	class_i[0x2]	8466	1			T3	1		T5	131		T6	216
alert[0x26]	class_i[0x3]	7363	1			T2	1		T5	3		T58	2
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alert[0x27]	class_i[0x2]	7175	1			T1	1		T3	1		T4	1
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alert[0x28]	class_i[0x1]	7953	1			T5	139		T21	2		T23	71
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alert[0x29]	class_i[0x3]	7665	1			T4	64		T21	6		T23	1
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alert[0x2a]	class_i[0x1]	7321	1			T4	9		T5	1		T6	218
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alert[0x3a]	class_i[0x1]	7176	1			T4	8		T5	1		T40	1
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alert[0x3a]	class_i[0x3]	8972	1			T3	1		T4	1		T5	2
alert[0x3b]	class_i[0x0]	7816	1			T7	9		T4	5		T5	135
alert[0x3b]	class_i[0x1]	8459	1			T1	6		T4	7		T5	6
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alert[0x3c]	class_i[0x1]	8174	1			T4	2		T5	105		T6	209
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alert[0x3e]	class_i[0x1]	8077	1			T4	28		T5	191		T19	3
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alert[0x3e]	class_i[0x3]	8630	1			T64	1		T62	1		T109	119
alert[0x3f]	class_i[0x0]	8147	1			T3	1		T7	6		T4	42
alert[0x3f]	class_i[0x1]	8338	1			T5	117		T22	1		T23	7
alert[0x3f]	class_i[0x2]	9868	1			T4	46		T5	1		T6	188
alert[0x3f]	class_i[0x3]	6906	1			T5	2		T23	182		T64	1
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alert[0x40]	class_i[0x1]	6658	1			T1	1		T3	1		T4	2
alert[0x40]	class_i[0x2]	6302	1			T4	1		T5	138		T23	50
alert[0x40]	class_i[0x3]	7942	1			T4	70		T21	13		T64	1