Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
93.22	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	4	40	90.91

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	4	40	90.91	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	172	1			T3	1		T15	1		T41	1
index[0x1]	179	1			T18	2		T11	1		T29	1
index[0x2]	188	1			T2	3		T15	2		T16	1
index[0x3]	186	1			T16	1		T14	1		T115	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	233	1			T3	1		T16	1		T41	2
lens_less_than_1000[1]	135	1			T2	2		T15	1		T18	1
lens_less_than_1000[2]	100	1			T2	1		T16	1		T21	1
lens_less_than_1000[3]	77	1			T23	1		T44	1		T77	1
lens_less_than_1000[4]	57	1			T15	2		T14	1		T26	1
lens_less_than_1000[5]	51	1			T18	2		T24	1		T77	1
lens_less_than_1000[6]	26	1			T68	1		T27	1		T70	1
lens_less_than_1000[7]	19	1			T91	1		T79	1		T49	1
lens_less_than_1000[8]	6	1			T26	4		T46	1		T270	1
lens_less_than_1000[9]	4	1			T102	1		T103	1		T95	1
len_2	17	1			T74	1		T246	2		T271	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	4	40	90.91	4

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[8] , lens_less_than_1000[9]]	--	--	2
[index[0x1]]	[lens_less_than_1000[8]]	0	1	1
[index[0x2]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	50	1			T3	1		T41	1		T29	1
index[0x0]	lens_less_than_1000[1]	30	1			T26	1		T43	1		T70	1
index[0x0]	lens_less_than_1000[2]	33	1			T36	1		T68	1		T100	1
index[0x0]	lens_less_than_1000[3]	15	1			T246	1		T196	1		T272	1
index[0x0]	lens_less_than_1000[4]	14	1			T15	1		T26	1		T77	1
index[0x0]	lens_less_than_1000[5]	22	1			T197	1		T273	1		T274	1
index[0x0]	lens_less_than_1000[6]	3	1			T106	1		T275	1		T276	1
index[0x0]	lens_less_than_1000[7]	3	1			T79	1		T102	1		T251	1
index[0x0]	len_2	2	1			T246	1		T277	1		-	-
index[0x1]	lens_less_than_1000[0]	55	1			T29	1		T26	1		T28	1
index[0x1]	lens_less_than_1000[1]	29	1			T18	1		T36	1		T43	1
index[0x1]	lens_less_than_1000[2]	25	1			T11	1		T23	1		T44	1
index[0x1]	lens_less_than_1000[3]	20	1			T23	1		T278	1		T88	7
index[0x1]	lens_less_than_1000[4]	17	1			T44	1		T279	1		T280	1
index[0x1]	lens_less_than_1000[5]	12	1			T18	1		T80	1		T268	1
index[0x1]	lens_less_than_1000[6]	6	1			T70	1		T80	1		T48	1
index[0x1]	lens_less_than_1000[7]	8	1			T91	1		T81	1		T246	1
index[0x1]	lens_less_than_1000[9]	3	1			T103	1		T95	1		T240	1
index[0x1]	len_2	4	1			T74	1		T257	2		T281	1
index[0x2]	lens_less_than_1000[0]	67	1			T16	1		T41	1		T24	1
index[0x2]	lens_less_than_1000[1]	44	1			T2	2		T15	1		T12	1
index[0x2]	lens_less_than_1000[2]	16	1			T2	1		T21	1		T70	1
index[0x2]	lens_less_than_1000[3]	25	1			T44	1		T77	1		T101	10
index[0x2]	lens_less_than_1000[4]	16	1			T15	1		T282	1		T283	1
index[0x2]	lens_less_than_1000[5]	6	1			T18	1		T284	1		T269	1
index[0x2]	lens_less_than_1000[6]	6	1			T68	1		T44	1		T48	1
index[0x2]	lens_less_than_1000[7]	5	1			T49	1		T278	1		T54	1
index[0x2]	lens_less_than_1000[8]	1	1			T270	1		-	-		-	-
index[0x2]	len_2	2	1			T57	1		T264	1		-	-
index[0x3]	lens_less_than_1000[0]	61	1			T115	1		T30	1		T23	1
index[0x3]	lens_less_than_1000[1]	32	1			T36	1		T28	1		T42	1
index[0x3]	lens_less_than_1000[2]	26	1			T16	1		T86	1		T78	1
index[0x3]	lens_less_than_1000[3]	17	1			T186	1		T45	1		T219	1
index[0x3]	lens_less_than_1000[4]	10	1			T14	1		T48	1		T85	1
index[0x3]	lens_less_than_1000[5]	11	1			T24	1		T77	1		T96	1
index[0x3]	lens_less_than_1000[6]	11	1			T27	1		T109	1		T48	1
index[0x3]	lens_less_than_1000[7]	3	1			T197	1		T250	1		T285	1
index[0x3]	lens_less_than_1000[8]	5	1			T26	4		T46	1		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T102	1		-	-		-	-
index[0x3]	len_2	9	1			T246	1		T271	1		T286	1