Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.31	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	1	43	97.73

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	1	43	97.73	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	134	1			T1	1		T5	1		T6	1
index[0x1]	180	1			T3	1		T18	1		T23	1
index[0x2]	186	1			T19	2		T31	1		T15	2
index[0x3]	187	1			T4	1		T6	1		T18	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	213	1			T1	1		T18	1		T7	1
lens_less_than_1000[1]	124	1			T5	1		T19	2		T31	1
lens_less_than_1000[2]	103	1			T4	1		T6	1		T15	1
lens_less_than_1000[3]	72	1			T18	1		T40	1		T66	1
lens_less_than_1000[4]	37	1			T31	1		T15	1		T16	2
lens_less_than_1000[5]	38	1			T6	1		T90	1		T64	1
lens_less_than_1000[6]	38	1			T268	1		T24	1		T64	1
lens_less_than_1000[7]	30	1			T23	1		T82	2		T269	1
lens_less_than_1000[8]	12	1			T3	1		T24	1		T270	1
lens_less_than_1000[9]	5	1			T271	1		T106	1		T272	1
len_2	15	1			T56	1		T24	1		T59	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	1	43	97.73	1

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	45	1			T1	1		T23	1		T9	1
index[0x0]	lens_less_than_1000[1]	28	1			T5	1		T31	1		T24	1
index[0x0]	lens_less_than_1000[2]	16	1			T37	1		T63	1		T65	1
index[0x0]	lens_less_than_1000[3]	11	1			T40	1		T45	1		T273	1
index[0x0]	lens_less_than_1000[4]	3	1			T42	1		T274	1		T251	1
index[0x0]	lens_less_than_1000[5]	7	1			T6	1		T90	1		T275	1
index[0x0]	lens_less_than_1000[6]	11	1			T276	1		T74	1		T52	1
index[0x0]	lens_less_than_1000[7]	7	1			T269	1		T201	1		T277	2
index[0x0]	lens_less_than_1000[8]	1	1			T270	1		-	-		-	-
index[0x0]	len_2	5	1			T195	1		T278	1		T279	1
index[0x1]	lens_less_than_1000[0]	55	1			T18	1		T26	1		T280	1
index[0x1]	lens_less_than_1000[1]	35	1			T41	1		T42	1		T281	1
index[0x1]	lens_less_than_1000[2]	31	1			T15	1		T196	1		T282	1
index[0x1]	lens_less_than_1000[3]	17	1			T66	1		T43	1		T44	1
index[0x1]	lens_less_than_1000[4]	13	1			T90	1		T273	1		T72	1
index[0x1]	lens_less_than_1000[5]	9	1			T64	1		T49	2		T106	2
index[0x1]	lens_less_than_1000[6]	5	1			T44	1		T273	1		T86	1
index[0x1]	lens_less_than_1000[7]	9	1			T23	1		T283	1		T284	1
index[0x1]	lens_less_than_1000[8]	3	1			T3	1		T24	1		T199	1
index[0x1]	lens_less_than_1000[9]	1	1			T106	1		-	-		-	-
index[0x1]	len_2	2	1			T59	1		T285	1		-	-
index[0x2]	lens_less_than_1000[0]	62	1			T15	1		T16	1		T62	1
index[0x2]	lens_less_than_1000[1]	34	1			T19	2		T34	1		T286	1
index[0x2]	lens_less_than_1000[2]	15	1			T26	1		T63	1		T60	1
index[0x2]	lens_less_than_1000[3]	19	1			T96	1		T52	2		T53	1
index[0x2]	lens_less_than_1000[4]	15	1			T31	1		T15	1		T16	1
index[0x2]	lens_less_than_1000[5]	12	1			T70	2		T105	1		T51	1
index[0x2]	lens_less_than_1000[6]	9	1			T268	1		T24	1		T287	1
index[0x2]	lens_less_than_1000[7]	8	1			T82	1		T98	2		T263	1
index[0x2]	lens_less_than_1000[8]	7	1			T288	2		T289	1		T290	1
index[0x2]	lens_less_than_1000[9]	3	1			T272	1		T259	1		T291	1
index[0x2]	len_2	2	1			T24	1		T103	1		-	-
index[0x3]	lens_less_than_1000[0]	51	1			T7	1		T16	2		T24	2
index[0x3]	lens_less_than_1000[1]	27	1			T59	1		T41	1		T43	1
index[0x3]	lens_less_than_1000[2]	41	1			T4	1		T6	1		T62	1
index[0x3]	lens_less_than_1000[3]	25	1			T18	1		T292	1		T48	1
index[0x3]	lens_less_than_1000[4]	6	1			T16	1		T34	1		T293	1
index[0x3]	lens_less_than_1000[5]	10	1			T294	1		T175	2		T86	1
index[0x3]	lens_less_than_1000[6]	13	1			T64	1		T295	1		T296	1
index[0x3]	lens_less_than_1000[7]	6	1			T82	1		T97	1		T297	1
index[0x3]	lens_less_than_1000[8]	1	1			T298	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T271	1		-	-		-	-
index[0x3]	len_2	6	1			T56	1		T52	5		-	-