Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.31	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	1	43	97.73

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	1	43	97.73	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	156	1			T4	2		T58	1		T6	1
index[0x1]	155	1			T4	1		T56	1		T37	1
index[0x2]	185	1			T4	2		T8	1		T5	1
index[0x3]	178	1			T3	2		T4	1		T6	2

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	241	1			T3	2		T4	1		T56	1
lens_less_than_1000[1]	130	1			T37	1		T42	1		T46	1
lens_less_than_1000[2]	93	1			T4	1		T8	1		T6	1
lens_less_than_1000[3]	78	1			T4	2		T14	1		T76	1
lens_less_than_1000[4]	39	1			T87	1		T88	1		T16	1
lens_less_than_1000[5]	37	1			T4	2		T58	1		T14	1
lens_less_than_1000[6]	20	1			T13	1		T14	1		T27	1
lens_less_than_1000[7]	8	1			T85	1		T273	1		T274	1
lens_less_than_1000[8]	8	1			T185	1		T251	1		T102	1
lens_less_than_1000[9]	6	1			T16	1		T275	1		T276	1
len_2	14	1			T11	1		T28	5		T101	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	1	43	97.73	1

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x1]]	[lens_less_than_1000[7]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	52	1			T4	1		T6	1		T96	1
index[0x0]	lens_less_than_1000[1]	29	1			T51	1		T44	1		T237	1
index[0x0]	lens_less_than_1000[2]	19	1			T5	1		T64	1		T112	1
index[0x0]	lens_less_than_1000[3]	25	1			T4	1		T76	1		T82	1
index[0x0]	lens_less_than_1000[4]	9	1			T93	1		T94	1		T277	1
index[0x0]	lens_less_than_1000[5]	13	1			T58	1		T14	1		T82	1
index[0x0]	lens_less_than_1000[6]	4	1			T64	1		T62	1		T93	1
index[0x0]	lens_less_than_1000[7]	2	1			T274	1		T278	1		-	-
index[0x0]	lens_less_than_1000[8]	1	1			T279	1		-	-		-	-
index[0x0]	lens_less_than_1000[9]	1	1			T280	1		-	-		-	-
index[0x0]	len_2	1	1			T101	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	62	1			T56	1		T38	1		T12	1
index[0x1]	lens_less_than_1000[1]	35	1			T37	1		T46	1		T51	1
index[0x1]	lens_less_than_1000[2]	20	1			T4	1		T51	1		T28	1
index[0x1]	lens_less_than_1000[3]	16	1			T112	1		T281	1		T123	1
index[0x1]	lens_less_than_1000[4]	5	1			T23	1		T282	1		T30	1
index[0x1]	lens_less_than_1000[5]	6	1			T48	1		T283	1		T71	1
index[0x1]	lens_less_than_1000[6]	6	1			T27	1		T23	1		T284	1
index[0x1]	lens_less_than_1000[8]	2	1			T251	1		T246	1		-	-
index[0x1]	lens_less_than_1000[9]	1	1			T16	1		-	-		-	-
index[0x1]	len_2	2	1			T11	1		T263	1		-	-
index[0x2]	lens_less_than_1000[0]	70	1			T5	1		T11	1		T14	1
index[0x2]	lens_less_than_1000[1]	30	1			T42	1		T44	1		T85	1
index[0x2]	lens_less_than_1000[2]	22	1			T8	1		T21	1		T63	2
index[0x2]	lens_less_than_1000[3]	17	1			T4	1		T123	1		T251	1
index[0x2]	lens_less_than_1000[4]	13	1			T112	1		T105	1		T99	1
index[0x2]	lens_less_than_1000[5]	11	1			T4	1		T285	1		T68	3
index[0x2]	lens_less_than_1000[6]	3	1			T14	1		T33	1		T263	1
index[0x2]	lens_less_than_1000[7]	3	1			T85	1		T273	1		T268	1
index[0x2]	lens_less_than_1000[8]	4	1			T102	1		T286	1		T287	1
index[0x2]	lens_less_than_1000[9]	3	1			T275	1		T276	1		T288	1
index[0x2]	len_2	9	1			T28	5		T94	1		T114	1
index[0x3]	lens_less_than_1000[0]	57	1			T3	2		T6	1		T79	1
index[0x3]	lens_less_than_1000[1]	36	1			T234	2		T91	1		T68	1
index[0x3]	lens_less_than_1000[2]	32	1			T6	1		T51	1		T49	2
index[0x3]	lens_less_than_1000[3]	20	1			T14	1		T39	2		T289	1
index[0x3]	lens_less_than_1000[4]	12	1			T87	1		T88	1		T16	1
index[0x3]	lens_less_than_1000[5]	7	1			T4	1		T224	1		T71	1
index[0x3]	lens_less_than_1000[6]	7	1			T13	1		T87	1		T33	1
index[0x3]	lens_less_than_1000[7]	3	1			T290	1		T291	1		T263	1
index[0x3]	lens_less_than_1000[8]	1	1			T185	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T292	1		-	-		-	-
index[0x3]	len_2	2	1			T293	1		T294	1		-	-