Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	198	1			T2	1		T5	6		T45	2
index[0x1]	184	1			T2	3		T18	1		T13	1
index[0x2]	162	1			T2	1		T17	1		T18	1
index[0x3]	168	1			T18	1		T45	2		T27	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	243	1			T2	1		T26	1		T256	1
lens_less_than_1000[1]	141	1			T2	2		T45	1		T82	1
lens_less_than_1000[2]	97	1			T2	1		T5	1		T17	1
lens_less_than_1000[3]	74	1			T2	1		T65	1		T68	1
lens_less_than_1000[4]	55	1			T5	5		T13	1		T21	1
lens_less_than_1000[5]	29	1			T18	1		T23	1		T94	1
lens_less_than_1000[6]	40	1			T18	1		T24	1		T74	4
lens_less_than_1000[7]	17	1			T18	1		T38	1		T84	1
lens_less_than_1000[8]	8	1			T25	1		T257	1		T119	1
lens_less_than_1000[9]	4	1			T258	1		T259	2		T260	1
len_2	4	1			T27	1		T114	1		T261	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[9] , len_2]	--	--	2
[index[0x2]]	[lens_less_than_1000[9]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	72	1			T2	1		T256	1		T21	1
index[0x0]	lens_less_than_1000[1]	39	1			T45	1		T27	2		T78	1
index[0x0]	lens_less_than_1000[2]	26	1			T5	1		T45	1		T226	5
index[0x0]	lens_less_than_1000[3]	22	1			T65	1		T79	1		T47	1
index[0x0]	lens_less_than_1000[4]	18	1			T5	5		T23	1		T262	1
index[0x0]	lens_less_than_1000[5]	6	1			T105	1		T263	1		T264	1
index[0x0]	lens_less_than_1000[6]	10	1			T24	1		T89	4		T265	1
index[0x0]	lens_less_than_1000[7]	3	1			T25	1		T90	1		T115	1
index[0x0]	lens_less_than_1000[8]	2	1			T22	1		T266	1		-	-
index[0x1]	lens_less_than_1000[0]	67	1			T26	1		T27	1		T21	1
index[0x1]	lens_less_than_1000[1]	29	1			T2	2		T82	1		T47	1
index[0x1]	lens_less_than_1000[2]	29	1			T2	1		T112	1		T267	1
index[0x1]	lens_less_than_1000[3]	19	1			T68	1		T104	2		T107	1
index[0x1]	lens_less_than_1000[4]	12	1			T13	1		T105	1		T268	1
index[0x1]	lens_less_than_1000[5]	5	1			T269	1		T96	1		T239	1
index[0x1]	lens_less_than_1000[6]	12	1			T18	1		T74	4		T270	1
index[0x1]	lens_less_than_1000[7]	6	1			T38	1		T25	1		T271	1
index[0x1]	lens_less_than_1000[8]	1	1			T184	1		-	-		-	-
index[0x1]	lens_less_than_1000[9]	3	1			T259	2		T260	1		-	-
index[0x1]	len_2	1	1			T261	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	56	1			T21	3		T68	1		T23	1
index[0x2]	lens_less_than_1000[1]	30	1			T68	1		T272	2		T214	1
index[0x2]	lens_less_than_1000[2]	18	1			T17	1		T45	1		T222	1
index[0x2]	lens_less_than_1000[3]	17	1			T2	1		T71	1		T47	1
index[0x2]	lens_less_than_1000[4]	16	1			T221	1		T116	1		T62	1
index[0x2]	lens_less_than_1000[5]	10	1			T18	1		T23	1		T29	1
index[0x2]	lens_less_than_1000[6]	9	1			T76	2		T92	1		T273	1
index[0x2]	lens_less_than_1000[7]	1	1			T274	1		-	-		-	-
index[0x2]	lens_less_than_1000[8]	3	1			T257	1		T119	1		T266	1
index[0x2]	len_2	2	1			T27	1		T114	1		-	-
index[0x3]	lens_less_than_1000[0]	48	1			T27	1		T21	1		T47	1
index[0x3]	lens_less_than_1000[1]	43	1			T68	1		T275	1		T25	1
index[0x3]	lens_less_than_1000[2]	24	1			T45	2		T21	1		T71	1
index[0x3]	lens_less_than_1000[3]	16	1			T182	1		T53	1		T104	1
index[0x3]	lens_less_than_1000[4]	9	1			T21	1		T65	1		T68	1
index[0x3]	lens_less_than_1000[5]	8	1			T94	1		T19	1		T95	3
index[0x3]	lens_less_than_1000[6]	9	1			T21	1		T59	4		T276	1
index[0x3]	lens_less_than_1000[7]	7	1			T18	1		T84	1		T277	1
index[0x3]	lens_less_than_1000[8]	2	1			T25	1		T278	1		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T258	1		-	-		-	-
index[0x3]	len_2	1	1			T239	1		-	-		-	-