Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.31	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	1	43	97.73

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	1	43	97.73	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	168	1			T1	1		T11	1		T12	1
index[0x1]	153	1			T4	2		T17	1		T13	1
index[0x2]	191	1			T13	1		T22	2		T7	1
index[0x3]	185	1			T4	1		T12	1		T14	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	228	1			T13	1		T14	1		T22	2
lens_less_than_1000[1]	145	1			T21	2		T24	2		T67	2
lens_less_than_1000[2]	102	1			T4	1		T11	1		T13	1
lens_less_than_1000[3]	64	1			T4	2		T31	1		T25	3
lens_less_than_1000[4]	48	1			T31	1		T28	1		T219	1
lens_less_than_1000[5]	36	1			T1	1		T12	1		T17	1
lens_less_than_1000[6]	30	1			T12	1		T21	1		T28	3
lens_less_than_1000[7]	25	1			T66	1		T31	1		T49	1
lens_less_than_1000[8]	6	1			T73	1		T86	1		T60	1
lens_less_than_1000[9]	6	1			T27	1		T54	1		T113	1
len_2	7	1			T257	2		T107	1		T239	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	1	43	97.73	1

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0]]	[lens_less_than_1000[8]]	0	1	1

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	53	1			T67	1		T258	1		T28	1
index[0x0]	lens_less_than_1000[1]	38	1			T21	1		T73	1		T27	2
index[0x0]	lens_less_than_1000[2]	15	1			T11	1		T46	1		T30	1
index[0x0]	lens_less_than_1000[3]	21	1			T31	1		T25	2		T259	1
index[0x0]	lens_less_than_1000[4]	12	1			T28	1		T260	1		T51	1
index[0x0]	lens_less_than_1000[5]	11	1			T1	1		T12	1		T26	1
index[0x0]	lens_less_than_1000[6]	7	1			T28	2		T97	1		T261	1
index[0x0]	lens_less_than_1000[7]	9	1			T66	1		T51	7		T58	1
index[0x0]	lens_less_than_1000[9]	1	1			T27	1		-	-		-	-
index[0x0]	len_2	1	1			T257	1		-	-		-	-
index[0x1]	lens_less_than_1000[0]	52	1			T13	1		T22	1		T31	2
index[0x1]	lens_less_than_1000[1]	42	1			T21	1		T24	1		T27	1
index[0x1]	lens_less_than_1000[2]	20	1			T4	1		T26	1		T50	1
index[0x1]	lens_less_than_1000[3]	15	1			T4	1		T57	1		T248	1
index[0x1]	lens_less_than_1000[4]	4	1			T78	1		T238	1		T262	1
index[0x1]	lens_less_than_1000[5]	6	1			T17	1		T57	2		T237	1
index[0x1]	lens_less_than_1000[6]	8	1			T21	1		T83	1		T263	1
index[0x1]	lens_less_than_1000[7]	2	1			T264	1		T256	1		-	-
index[0x1]	lens_less_than_1000[8]	1	1			T208	1		-	-		-	-
index[0x1]	lens_less_than_1000[9]	2	1			T113	1		T265	1		-	-
index[0x1]	len_2	1	1			T241	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	67	1			T66	1		T31	1		T26	1
index[0x2]	lens_less_than_1000[1]	34	1			T67	1		T31	1		T48	1
index[0x2]	lens_less_than_1000[2]	32	1			T13	1		T22	2		T7	1
index[0x2]	lens_less_than_1000[3]	14	1			T27	1		T266	1		T267	1
index[0x2]	lens_less_than_1000[4]	18	1			T31	1		T268	1		T37	1
index[0x2]	lens_less_than_1000[5]	11	1			T51	1		T60	1		T107	1
index[0x2]	lens_less_than_1000[6]	5	1			T28	1		T269	1		T108	1
index[0x2]	lens_less_than_1000[7]	3	1			T31	1		T49	1		T113	1
index[0x2]	lens_less_than_1000[8]	4	1			T86	1		T60	1		T270	1
index[0x2]	lens_less_than_1000[9]	2	1			T54	1		T271	1		-	-
index[0x2]	len_2	1	1			T239	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	56	1			T14	1		T22	1		T31	6
index[0x3]	lens_less_than_1000[1]	31	1			T24	1		T67	1		T50	1
index[0x3]	lens_less_than_1000[2]	35	1			T30	1		T31	2		T27	1
index[0x3]	lens_less_than_1000[3]	14	1			T4	1		T25	1		T49	1
index[0x3]	lens_less_than_1000[4]	14	1			T219	1		T86	1		T57	1
index[0x3]	lens_less_than_1000[5]	8	1			T272	1		T266	1		T273	1
index[0x3]	lens_less_than_1000[6]	10	1			T12	1		T274	2		T59	1
index[0x3]	lens_less_than_1000[7]	11	1			T51	6		T275	1		T57	1
index[0x3]	lens_less_than_1000[8]	1	1			T73	1		-	-		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T271	1		-	-		-	-
index[0x3]	len_2	4	1			T257	1		T107	1		T276	1