Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	0	44	100.00

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	0	44	100.00	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	186	1			T3	1		T5	1		T20	1
index[0x1]	167	1			T3	1		T7	1		T44	1
index[0x2]	196	1			T3	1		T4	1		T5	1
index[0x3]	194	1			T3	1		T5	1		T20	2

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	235	1			T4	1		T5	1		T20	2
lens_less_than_1000[1]	154	1			T3	1		T5	1		T20	1
lens_less_than_1000[2]	92	1			T20	1		T45	1		T110	1
lens_less_than_1000[3]	69	1			T3	1		T5	1		T7	2
lens_less_than_1000[4]	55	1			T15	1		T112	1		T123	1
lens_less_than_1000[5]	60	1			T3	1		T46	1		T288	1
lens_less_than_1000[6]	29	1			T79	1		T227	1		T52	1
lens_less_than_1000[7]	20	1			T3	1		T113	2		T289	1
lens_less_than_1000[8]	9	1			T123	1		T28	1		T121	1
lens_less_than_1000[9]	6	1			T236	1		T54	1		T290	1
len_2	14	1			T104	1		T291	2		T292	1

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	0	44	100.00

Automatically Generated Cross Bins for len_per_esc_sig

Bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	61	1			T20	1		T14	1		T66	1
index[0x0]	lens_less_than_1000[1]	36	1			T3	1		T85	1		T87	1
index[0x0]	lens_less_than_1000[2]	31	1			T45	1		T293	1		T28	1
index[0x0]	lens_less_than_1000[3]	14	1			T5	1		T30	1		T115	1
index[0x0]	lens_less_than_1000[4]	4	1			T112	1		T123	1		T36	1
index[0x0]	lens_less_than_1000[5]	14	1			T49	1		T70	1		T235	1
index[0x0]	lens_less_than_1000[6]	10	1			T79	1		T227	1		T294	1
index[0x0]	lens_less_than_1000[7]	5	1			T113	1		T57	1		T295	1
index[0x0]	lens_less_than_1000[8]	2	1			T123	1		T225	1		-	-
index[0x0]	lens_less_than_1000[9]	2	1			T290	1		T296	1		-	-
index[0x0]	len_2	7	1			T291	1		T292	1		T297	1
index[0x1]	lens_less_than_1000[0]	60	1			T14	2		T25	1		T100	4
index[0x1]	lens_less_than_1000[1]	37	1			T14	1		T8	1		T17	1
index[0x1]	lens_less_than_1000[2]	18	1			T110	1		T31	1		T298	1
index[0x1]	lens_less_than_1000[3]	11	1			T7	1		T44	1		T123	1
index[0x1]	lens_less_than_1000[4]	19	1			T89	1		T299	1		T300	1
index[0x1]	lens_less_than_1000[5]	8	1			T3	1		T288	1		T58	1
index[0x1]	lens_less_than_1000[6]	6	1			T52	1		T236	1		T94	1
index[0x1]	lens_less_than_1000[7]	2	1			T301	1		T302	1		-	-
index[0x1]	lens_less_than_1000[8]	2	1			T121	1		T225	1		-	-
index[0x1]	lens_less_than_1000[9]	1	1			T303	1		-	-		-	-
index[0x1]	len_2	3	1			T104	1		T304	1		T225	1
index[0x2]	lens_less_than_1000[0]	55	1			T4	1		T5	1		T20	1
index[0x2]	lens_less_than_1000[1]	45	1			T24	1		T14	1		T66	1
index[0x2]	lens_less_than_1000[2]	26	1			T28	1		T49	1		T67	1
index[0x2]	lens_less_than_1000[3]	22	1			T3	1		T7	1		T76	1
index[0x2]	lens_less_than_1000[4]	14	1			T91	2		T87	1		T305	1
index[0x2]	lens_less_than_1000[5]	17	1			T46	1		T306	2		T58	1
index[0x2]	lens_less_than_1000[6]	7	1			T307	1		T57	1		T190	1
index[0x2]	lens_less_than_1000[7]	5	1			T95	1		T299	1		T308	1
index[0x2]	lens_less_than_1000[8]	2	1			T28	1		T58	1		-	-
index[0x2]	lens_less_than_1000[9]	2	1			T236	1		T309	1		-	-
index[0x2]	len_2	1	1			T93	1		-	-		-	-
index[0x3]	lens_less_than_1000[0]	59	1			T24	1		T76	1		T79	1
index[0x3]	lens_less_than_1000[1]	36	1			T5	1		T20	1		T14	1
index[0x3]	lens_less_than_1000[2]	17	1			T20	1		T122	1		T263	1
index[0x3]	lens_less_than_1000[3]	22	1			T76	1		T10	1		T267	1
index[0x3]	lens_less_than_1000[4]	18	1			T15	1		T52	1		T310	1
index[0x3]	lens_less_than_1000[5]	21	1			T37	1		T285	1		T57	2
index[0x3]	lens_less_than_1000[6]	6	1			T311	1		T307	1		T312	1
index[0x3]	lens_less_than_1000[7]	8	1			T3	1		T113	1		T289	1
index[0x3]	lens_less_than_1000[8]	3	1			T313	1		T62	2		-	-
index[0x3]	lens_less_than_1000[9]	1	1			T54	1		-	-		-	-
index[0x3]	len_2	3	1			T291	1		T314	1		T315	1