Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	183	1			T12	1		T22	1		T6	1
index[0x1]	176	1			T2	1		T4	1		T5	1
index[0x2]	195	1			T2	1		T5	2		T18	1
index[0x3]	177	1			T2	1		T7	1		T21	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	249	1			T2	1		T7	1		T4	1
lens_less_than_1000[1]	147	1			T4	1		T5	1		T6	1
lens_less_than_1000[2]	111	1			T2	2		T6	1		T20	1
lens_less_than_1000[3]	64	1			T21	1		T27	1		T69	1
lens_less_than_1000[4]	48	1			T65	1		T27	1		T279	1
lens_less_than_1000[5]	43	1			T12	1		T84	1		T47	1
lens_less_than_1000[6]	23	1			T19	1		T221	1		T77	1
lens_less_than_1000[7]	23	1			T27	2		T84	1		T280	1
lens_less_than_1000[8]	10	1			T20	1		T75	1		T108	1
lens_less_than_1000[9]	2	1			T89	2		-	-		-	-
len_2	11	1			T20	1		T82	1		T85	2

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	3

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	61	1			T22	1		T42	1		T25	2
index[0x0]	lens_less_than_1000[1]	34	1			T42	1		T69	1		T85	2
index[0x0]	lens_less_than_1000[2]	28	1			T6	1		T68	1		T42	1
index[0x0]	lens_less_than_1000[3]	14	1			T27	1		T264	1		T281	1
index[0x0]	lens_less_than_1000[4]	12	1			T70	1		T76	1		T258	1
index[0x0]	lens_less_than_1000[5]	5	1			T12	1		T282	1		T96	1
index[0x0]	lens_less_than_1000[6]	12	1			T283	1		T284	1		T285	8
index[0x0]	lens_less_than_1000[7]	12	1			T84	1		T280	1		T85	1
index[0x0]	lens_less_than_1000[8]	3	1			T108	1		T286	1		T287	1
index[0x0]	len_2	2	1			T20	1		T262	1		-	-
index[0x1]	lens_less_than_1000[0]	58	1			T4	1		T5	1		T42	2
index[0x1]	lens_less_than_1000[1]	34	1			T98	1		T15	1		T42	3
index[0x1]	lens_less_than_1000[2]	40	1			T2	1		T20	1		T65	1
index[0x1]	lens_less_than_1000[3]	13	1			T288	1		T289	1		T290	1
index[0x1]	lens_less_than_1000[4]	15	1			T279	1		T77	1		T291	1
index[0x1]	lens_less_than_1000[5]	8	1			T265	1		T85	1		T96	1
index[0x1]	lens_less_than_1000[6]	2	1			T292	1		T293	1		-	-
index[0x1]	lens_less_than_1000[7]	1	1			T294	1		-	-		-	-
index[0x1]	lens_less_than_1000[8]	3	1			T75	1		T295	1		T115	1
index[0x1]	len_2	2	1			T296	1		T297	1		-	-
index[0x2]	lens_less_than_1000[0]	75	1			T2	1		T5	1		T18	1
index[0x2]	lens_less_than_1000[1]	39	1			T5	1		T42	3		T25	1
index[0x2]	lens_less_than_1000[2]	15	1			T68	1		T70	1		T110	1
index[0x2]	lens_less_than_1000[3]	22	1			T76	1		T44	1		T298	1
index[0x2]	lens_less_than_1000[4]	13	1			T27	1		T47	1		T268	1
index[0x2]	lens_less_than_1000[5]	16	1			T47	1		T299	1		T103	1
index[0x2]	lens_less_than_1000[6]	4	1			T19	1		T221	1		T77	1
index[0x2]	lens_less_than_1000[7]	4	1			T27	2		T45	1		T295	1
index[0x2]	lens_less_than_1000[8]	1	1			T20	1		-	-		-	-
index[0x2]	len_2	6	1			T82	1		T85	2		T300	1
index[0x3]	lens_less_than_1000[0]	55	1			T7	1		T6	1		T65	1
index[0x3]	lens_less_than_1000[1]	40	1			T4	1		T6	1		T116	1
index[0x3]	lens_less_than_1000[2]	28	1			T2	1		T70	1		T261	1
index[0x3]	lens_less_than_1000[3]	15	1			T21	1		T69	1		T77	1
index[0x3]	lens_less_than_1000[4]	8	1			T65	1		T78	1		T301	1
index[0x3]	lens_less_than_1000[5]	14	1			T84	1		T299	1		T265	1
index[0x3]	lens_less_than_1000[6]	5	1			T79	1		T110	2		T92	2
index[0x3]	lens_less_than_1000[7]	6	1			T45	1		T23	1		T85	1
index[0x3]	lens_less_than_1000[8]	3	1			T295	1		T57	1		T262	1
index[0x3]	lens_less_than_1000[9]	2	1			T89	2		-	-		-	-
index[0x3]	len_2	1	1			T302	1		-	-		-	-