Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	149	1			T2	1		T12	1		T15	1
index[0x1]	157	1			T4	2		T5	1		T16	1
index[0x2]	141	1			T11	1		T4	2		T5	1
index[0x3]	143	1			T4	3		T46	1		T5	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	217	1			T4	3		T15	1		T5	3
lens_less_than_1000[1]	105	1			T2	1		T29	1		T30	2
lens_less_than_1000[2]	90	1			T4	1		T16	1		T29	1
lens_less_than_1000[3]	42	1			T11	1		T12	1		T4	2
lens_less_than_1000[4]	43	1			T70	1		T89	2		T114	1
lens_less_than_1000[5]	32	1			T113	1		T234	1		T28	1
lens_less_than_1000[6]	26	1			T4	1		T46	1		T67	1
lens_less_than_1000[7]	14	1			T91	1		T57	1		T59	1
lens_less_than_1000[8]	10	1			T32	1		T286	1		T279	1
lens_less_than_1000[9]	1	1			T265	1		-	-		-	-
len_2	10	1			T287	1		T107	1		T41	4

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	3

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	48	1			T15	1		T49	1		T113	1
index[0x0]	lens_less_than_1000[1]	25	1			T2	1		T30	1		T73	2
index[0x0]	lens_less_than_1000[2]	31	1			T114	1		T50	1		T81	9
index[0x0]	lens_less_than_1000[3]	10	1			T12	1		T58	3		T95	1
index[0x0]	lens_less_than_1000[4]	11	1			T89	1		T50	1		T288	1
index[0x0]	lens_less_than_1000[5]	6	1			T113	1		T99	1		T289	1
index[0x0]	lens_less_than_1000[6]	8	1			T67	1		T194	1		T53	1
index[0x0]	lens_less_than_1000[7]	2	1			T275	1		T290	1		-	-
index[0x0]	lens_less_than_1000[8]	3	1			T291	1		T277	1		T292	1
index[0x0]	len_2	5	1			T107	1		T41	4		-	-
index[0x1]	lens_less_than_1000[0]	56	1			T5	1		T49	1		T89	1
index[0x1]	lens_less_than_1000[1]	37	1			T30	1		T68	1		T50	1
index[0x1]	lens_less_than_1000[2]	20	1			T4	1		T16	1		T50	1
index[0x1]	lens_less_than_1000[3]	14	1			T4	1		T50	1		T293	1
index[0x1]	lens_less_than_1000[4]	10	1			T74	1		T294	1		T32	1
index[0x1]	lens_less_than_1000[5]	10	1			T185	1		T85	1		T295	1
index[0x1]	lens_less_than_1000[6]	4	1			T84	1		T57	1		T296	1
index[0x1]	lens_less_than_1000[7]	4	1			T91	1		T59	1		T260	1
index[0x1]	lens_less_than_1000[8]	1	1			T263	1		-	-		-	-
index[0x1]	len_2	1	1			T297	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	56	1			T4	1		T5	1		T26	1
index[0x2]	lens_less_than_1000[1]	22	1			T68	1		T28	1		T58	1
index[0x2]	lens_less_than_1000[2]	20	1			T29	1		T56	2		T33	1
index[0x2]	lens_less_than_1000[3]	11	1			T11	1		T53	1		T185	1
index[0x2]	lens_less_than_1000[4]	12	1			T70	1		T114	1		T53	1
index[0x2]	lens_less_than_1000[5]	6	1			T28	1		T298	1		T192	1
index[0x2]	lens_less_than_1000[6]	5	1			T4	1		T299	1		T300	1
index[0x2]	lens_less_than_1000[7]	4	1			T301	1		T271	1		T302	1
index[0x2]	lens_less_than_1000[8]	3	1			T32	1		T303	1		T254	1
index[0x2]	len_2	2	1			T287	1		T297	1		-	-
index[0x3]	lens_less_than_1000[0]	57	1			T4	2		T5	1		T21	7
index[0x3]	lens_less_than_1000[1]	21	1			T29	1		T50	1		T53	2
index[0x3]	lens_less_than_1000[2]	19	1			T28	1		T304	1		T85	1
index[0x3]	lens_less_than_1000[3]	7	1			T4	1		T129	1		T81	1
index[0x3]	lens_less_than_1000[4]	10	1			T89	1		T28	1		T33	1
index[0x3]	lens_less_than_1000[5]	10	1			T234	1		T185	1		T246	1
index[0x3]	lens_less_than_1000[6]	9	1			T46	1		T115	1		T96	1
index[0x3]	lens_less_than_1000[7]	4	1			T57	1		T126	1		T256	1
index[0x3]	lens_less_than_1000[8]	3	1			T286	1		T279	1		T305	1
index[0x3]	lens_less_than_1000[9]	1	1			T265	1		-	-		-	-
index[0x3]	len_2	2	1			T306	1		T297	1		-	-