Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.92	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_24/alert_handler-sim-vcs/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	44	3	41	93.18

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
esc_sig_index_cp	4	0	4	100.00	100	1	1	0
esc_sig_len_cp	11	0	11	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::esc_sig_length_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
len_per_esc_sig	44	3	41	93.18	100	1	1	0

Summary for Variable esc_sig_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for esc_sig_index_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	161	1			T44	1		T55	2		T156	1
index[0x1]	176	1			T13	2		T16	1		T77	1
index[0x2]	142	1			T13	1		T32	1		T58	1
index[0x3]	179	1			T28	2		T44	1		T54	1

---

Summary for Variable esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for esc_sig_len_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lens_less_than_1000[0]	201	1			T13	2		T16	1		T28	2
lens_less_than_1000[1]	133	1			T13	1		T77	1		T54	1
lens_less_than_1000[2]	95	1			T32	1		T93	1		T121	1
lens_less_than_1000[3]	68	1			T55	2		T133	1		T49	1
lens_less_than_1000[4]	46	1			T44	1		T61	2		T63	1
lens_less_than_1000[5]	38	1			T44	1		T302	1		T42	1
lens_less_than_1000[6]	26	1			T156	1		T88	1		T81	1
lens_less_than_1000[7]	16	1			T20	1		T133	1		T303	1
lens_less_than_1000[8]	17	1			T40	1		T289	1		T155	2
lens_less_than_1000[9]	1	1			T35	1		-	-		-	-
len_2	17	1			T78	1		T90	1		T304	2

---

Summary for Cross len_per_esc_sig

Samples crossed: esc_sig_index_cp esc_sig_len_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	44	3	41	93.18	3

Automatically Generated Cross Bins for len_per_esc_sig

Uncovered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	NUMBER	STATUS
[index[0x0] , index[0x1] , index[0x2]]	[lens_less_than_1000[9]]	--	--	3

Covered bins

esc_sig_index_cp	esc_sig_len_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
index[0x0]	lens_less_than_1000[0]	50	1			T55	1		T78	1		T305	1
index[0x0]	lens_less_than_1000[1]	29	1			T38	1		T101	2		T106	1
index[0x0]	lens_less_than_1000[2]	22	1			T84	1		T306	1		T153	1
index[0x0]	lens_less_than_1000[3]	15	1			T55	1		T101	1		T50	1
index[0x0]	lens_less_than_1000[4]	14	1			T61	1		T63	1		T307	1
index[0x0]	lens_less_than_1000[5]	10	1			T44	1		T73	1		T308	1
index[0x0]	lens_less_than_1000[6]	7	1			T156	1		T309	1		T286	1
index[0x0]	lens_less_than_1000[7]	3	1			T109	1		T298	1		T310	1
index[0x0]	lens_less_than_1000[8]	1	1			T311	1		-	-		-	-
index[0x0]	len_2	10	1			T304	1		T312	6		T109	1
index[0x1]	lens_less_than_1000[0]	55	1			T13	1		T16	1		T62	1
index[0x1]	lens_less_than_1000[1]	37	1			T13	1		T77	1		T90	1
index[0x1]	lens_less_than_1000[2]	18	1			T90	1		T223	1		T106	1
index[0x1]	lens_less_than_1000[3]	25	1			T261	1		T134	1		T116	1
index[0x1]	lens_less_than_1000[4]	8	1			T37	1		T42	1		T106	1
index[0x1]	lens_less_than_1000[5]	8	1			T302	1		T313	1		T154	1
index[0x1]	lens_less_than_1000[6]	10	1			T158	1		T119	2		T314	1
index[0x1]	lens_less_than_1000[7]	8	1			T20	1		T315	1		T291	1
index[0x1]	lens_less_than_1000[8]	6	1			T289	1		T43	3		T285	1
index[0x1]	len_2	1	1			T136	1		-	-		-	-
index[0x2]	lens_less_than_1000[0]	35	1			T13	1		T88	1		T84	1
index[0x2]	lens_less_than_1000[1]	33	1			T58	1		T99	1		T106	1
index[0x2]	lens_less_than_1000[2]	30	1			T32	1		T121	1		T119	3
index[0x2]	lens_less_than_1000[3]	11	1			T133	1		T316	1		T68	1
index[0x2]	lens_less_than_1000[4]	8	1			T61	1		T45	1		T50	1
index[0x2]	lens_less_than_1000[5]	14	1			T134	1		T317	1		T318	1
index[0x2]	lens_less_than_1000[6]	4	1			T88	1		T81	1		T319	1
index[0x2]	lens_less_than_1000[7]	1	1			T285	1		-	-		-	-
index[0x2]	lens_less_than_1000[8]	4	1			T40	1		T155	1		T320	2
index[0x2]	len_2	2	1			T78	1		T321	1		-	-
index[0x3]	lens_less_than_1000[0]	61	1			T28	2		T55	2		T63	1
index[0x3]	lens_less_than_1000[1]	34	1			T54	1		T60	1		T39	6
index[0x3]	lens_less_than_1000[2]	25	1			T93	1		T223	1		T71	1
index[0x3]	lens_less_than_1000[3]	17	1			T55	1		T49	1		T322	1
index[0x3]	lens_less_than_1000[4]	16	1			T44	1		T282	1		T323	1
index[0x3]	lens_less_than_1000[5]	6	1			T42	1		T324	1		T284	1
index[0x3]	lens_less_than_1000[6]	5	1			T260	1		T47	1		T325	1
index[0x3]	lens_less_than_1000[7]	4	1			T133	1		T303	1		T290	1
index[0x3]	lens_less_than_1000[8]	6	1			T155	1		T43	1		T326	1
index[0x3]	lens_less_than_1000[9]	1	1			T35	1		-	-		-	-
index[0x3]	len_2	4	1			T90	1		T304	1		T327	1