Unified Coverage Report :: Group :: alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg

Group : alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/alert_handler-sim-vcs/default/sim-vcs/../src/lowrisc_dv_alert_handler_env_0.1/alert_handler_env_cov.sv

---

Summary for Group alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	71	0	71	100.00
Crosses	138	0	138	100.00

Variables for Group alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
alert_index_cp	65	0	65	100.00	100	1	1	0
class_index_cp	4	0	4	100.00	100	1	1	0
loc_alert_cause_cp	2	0	2	100.00	100	1	1	0

Crosses for Group alert_handler_env_pkg::alert_handler_env_cov::alert_loc_alert_cause_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
loc_alert_cause_cross_alert_index	130	0	130	100.00	100	1	1	0
loc_alert_cause_cross_class_index	8	0	8	100.00	100	1	1	0

Summary for Variable alert_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	65	0	65	100.00

User Defined Bins for alert_index_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert[0x0]	4470	1			T11	1		T50	5		T34	7
alert[0x1]	3933	1			T49	3		T16	1		T34	26
alert[0x2]	2364	1			T15	1		T50	7		T34	1
alert[0x3]	2562	1			T16	1		T337	2		T55	247
alert[0x4]	5438	1			T15	2		T16	1		T34	57
alert[0x5]	2494	1			T158	1		T337	1		T53	1
alert[0x6]	2265	1			T50	12		T338	1		T337	1
alert[0x7]	1488	1			T49	2		T138	1		T255	14
alert[0x8]	1752	1			T34	2		T338	1		T337	1
alert[0x9]	3582	1			T50	79		T34	20		T337	1
alert[0xa]	7522	1			T34	5		T158	1		T154	4
alert[0xb]	4289	1			T15	1		T136	7		T337	1
alert[0xc]	1268	1			T338	2		T158	1		T154	2
alert[0xd]	1810	1			T138	4		T339	1		T340	1
alert[0xe]	3767	1			T15	1		T82	53		T98	1
alert[0xf]	5511	1			T50	4		T338	1		T255	234
alert[0x10]	3276	1			T15	1		T67	1		T16	1
alert[0x11]	4215	1			T34	6		T158	1		T53	8
alert[0x12]	5349	1			T15	1		T327	1		T255	128
alert[0x13]	10099	1			T34	22		T158	1		T314	1
alert[0x14]	2181	1			T15	1		T49	2		T50	16
alert[0x15]	7669	1			T257	1		T55	27		T255	27
alert[0x16]	6011	1			T15	1		T338	2		T137	1
alert[0x17]	3290	1			T11	9		T34	3		T257	7
alert[0x18]	5210	1			T55	29		T255	288		T119	2051
alert[0x19]	4676	1			T11	1		T67	3		T137	20
alert[0x1a]	5190	1			T15	1		T158	1		T339	1
alert[0x1b]	3758	1			T136	2		T55	148		T29	1
alert[0x1c]	8641	1			T7	1		T34	10		T338	1
alert[0x1d]	1304	1			T34	12		T338	1		T337	1
alert[0x1e]	2431	1			T34	2		T341	1		T342	1
alert[0x1f]	4175	1			T34	113		T340	2		T343	1
alert[0x20]	5745	1			T34	12		T257	2		T54	3
alert[0x21]	2262	1			T50	2		T34	1		T337	2
alert[0x22]	2314	1			T338	1		T314	1		T340	1
alert[0x23]	7566	1			T15	1		T16	1		T34	1
alert[0x24]	4249	1			T35	12		T16	1		T137	4
alert[0x25]	5404	1			T343	2		T341	1		T258	483
alert[0x26]	840	1			T136	18		T314	1		T256	4
alert[0x27]	9186	1			T338	1		T137	4		T314	1
alert[0x28]	2557	1			T138	1		T137	2		T158	1
alert[0x29]	3584	1			T50	53		T34	184		T137	2
alert[0x2a]	4720	1			T50	1		T158	1		T337	1
alert[0x2b]	10727	1			T339	1		T337	1		T327	1
alert[0x2c]	1744	1			T343	2		T258	46		T342	1
alert[0x2d]	6413	1			T50	2		T338	1		T158	2
alert[0x2e]	9766	1			T15	1		T34	5		T158	1
alert[0x2f]	5621	1			T338	2		T339	1		T53	1
alert[0x30]	3293	1			T7	1		T15	1		T54	3
alert[0x31]	5186	1			T136	1		T343	1		T257	3
alert[0x32]	3470	1			T343	1		T341	1		T258	82
alert[0x33]	4089	1			T337	1		T154	20		T343	1
alert[0x34]	5807	1			T34	2		T136	1		T137	4
alert[0x35]	6325	1			T11	18		T16	1		T138	11
alert[0x36]	2892	1			T34	1		T136	2		T137	2
alert[0x37]	1656	1			T138	3		T343	1		T256	22
alert[0x38]	5536	1			T50	5		T339	1		T154	9
alert[0x39]	5388	1			T16	1		T337	1		T154	8
alert[0x3a]	4930	1			T67	2		T50	1		T34	50
alert[0x3b]	2577	1			T138	1		T337	1		T314	1
alert[0x3c]	7007	1			T49	1		T50	2		T339	1
alert[0x3d]	1218	1			T339	1		T342	1		T344	1
alert[0x3e]	7992	1			T7	1		T67	2		T340	1
alert[0x3f]	1549	1			T50	12		T34	3		T137	3
alert[0x40]	2423	1			T34	6		T337	1		T259	38

---

Summary for Variable class_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for class_index_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
class_i[0x0]	91954	1			T11	28		T15	2		T50	158
class_i[0x1]	102953	1			T7	2		T15	4		T67	7
class_i[0x2]	48298	1			T35	12		T15	5		T50	11
class_i[0x3]	42821	1			T11	1		T7	1		T15	2

---

Summary for Variable loc_alert_cause_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for loc_alert_cause_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
il	0	Illegal

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

alert_integrity_fail

285303

1

T11

29

T35

12

T67

8

alert_ping_fail

723

1

T7

3

T15

13

T16

8

---

Summary for Cross loc_alert_cause_cross_alert_index

Samples crossed: loc_alert_cause_cp alert_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	130	0	130	100.00

Automatically Generated Cross Bins for loc_alert_cause_cross_alert_index

Bins

loc_alert_cause_cp	alert_index_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert_integrity_fail	alert[0x0]	4456	1			T11	1		T50	5		T34	7
alert_integrity_fail	alert[0x1]	3921	1			T49	3		T34	26		T138	10
alert_integrity_fail	alert[0x2]	2355	1			T50	7		T34	1		T255	23
alert_integrity_fail	alert[0x3]	2552	1			T55	247		T119	12		T103	8
alert_integrity_fail	alert[0x4]	5425	1			T34	57		T256	12		T259	118
alert_integrity_fail	alert[0x5]	2478	1			T53	1		T54	2		T55	24
alert_integrity_fail	alert[0x6]	2257	1			T50	12		T119	15		T103	149
alert_integrity_fail	alert[0x7]	1470	1			T49	2		T138	1		T255	14
alert_integrity_fail	alert[0x8]	1738	1			T34	2		T259	75		T217	1
alert_integrity_fail	alert[0x9]	3569	1			T50	79		T34	20		T30	4
alert_integrity_fail	alert[0xa]	7506	1			T34	5		T154	4		T54	1
alert_integrity_fail	alert[0xb]	4275	1			T136	7		T55	126		T30	28
alert_integrity_fail	alert[0xc]	1256	1			T154	2		T54	2		T255	22
alert_integrity_fail	alert[0xd]	1800	1			T138	4		T55	17		T70	64
alert_integrity_fail	alert[0xe]	3760	1			T82	53		T98	1		T30	1
alert_integrity_fail	alert[0xf]	5502	1			T50	4		T255	234		T119	66
alert_integrity_fail	alert[0x10]	3259	1			T67	1		T34	17		T154	41
alert_integrity_fail	alert[0x11]	4207	1			T34	6		T53	8		T154	134
alert_integrity_fail	alert[0x12]	5343	1			T255	128		T259	324		T70	151
alert_integrity_fail	alert[0x13]	10084	1			T34	22		T55	75		T255	11
alert_integrity_fail	alert[0x14]	2167	1			T49	2		T50	16		T136	2
alert_integrity_fail	alert[0x15]	7656	1			T257	1		T55	27		T255	27
alert_integrity_fail	alert[0x16]	5994	1			T137	1		T154	1		T257	2
alert_integrity_fail	alert[0x17]	3278	1			T11	9		T34	3		T257	7
alert_integrity_fail	alert[0x18]	5209	1			T55	29		T255	288		T119	2051
alert_integrity_fail	alert[0x19]	4666	1			T11	1		T67	3		T137	20
alert_integrity_fail	alert[0x1a]	5181	1			T256	9		T54	48		T259	258
alert_integrity_fail	alert[0x1b]	3748	1			T136	2		T55	148		T56	2
alert_integrity_fail	alert[0x1c]	8627	1			T34	10		T82	1		T154	1
alert_integrity_fail	alert[0x1d]	1290	1			T34	12		T259	157		T316	1
alert_integrity_fail	alert[0x1e]	2426	1			T34	2		T119	351		T103	176
alert_integrity_fail	alert[0x1f]	4156	1			T34	113		T257	28		T55	108
alert_integrity_fail	alert[0x20]	5735	1			T34	12		T257	2		T54	3
alert_integrity_fail	alert[0x21]	2250	1			T50	2		T34	1		T258	197
alert_integrity_fail	alert[0x22]	2294	1			T255	4		T259	55		T104	14
alert_integrity_fail	alert[0x23]	7554	1			T34	1		T138	49		T257	15
alert_integrity_fail	alert[0x24]	4238	1			T35	12		T137	4		T82	3
alert_integrity_fail	alert[0x25]	5393	1			T258	483		T55	53		T255	1
alert_integrity_fail	alert[0x26]	833	1			T136	18		T256	4		T259	65
alert_integrity_fail	alert[0x27]	9175	1			T137	4		T258	15		T55	13
alert_integrity_fail	alert[0x28]	2536	1			T138	1		T137	2		T256	4
alert_integrity_fail	alert[0x29]	3577	1			T50	53		T34	184		T137	2
alert_integrity_fail	alert[0x2a]	4710	1			T50	1		T259	2356		T119	248
alert_integrity_fail	alert[0x2b]	10716	1			T55	2269		T255	96		T259	501
alert_integrity_fail	alert[0x2c]	1729	1			T258	46		T255	30		T259	5
alert_integrity_fail	alert[0x2d]	6403	1			T50	2		T255	384		T104	1
alert_integrity_fail	alert[0x2e]	9754	1			T34	5		T54	2		T55	513
alert_integrity_fail	alert[0x2f]	5609	1			T53	1		T55	22		T255	1686
alert_integrity_fail	alert[0x30]	3280	1			T54	3		T258	108		T259	1
alert_integrity_fail	alert[0x31]	5176	1			T136	1		T257	3		T258	13
alert_integrity_fail	alert[0x32]	3463	1			T258	82		T255	747		T259	19
alert_integrity_fail	alert[0x33]	4078	1			T154	20		T255	384		T103	43
alert_integrity_fail	alert[0x34]	5798	1			T34	2		T136	1		T137	4
alert_integrity_fail	alert[0x35]	6319	1			T11	18		T138	11		T257	1
alert_integrity_fail	alert[0x36]	2882	1			T34	1		T136	2		T137	2
alert_integrity_fail	alert[0x37]	1646	1			T138	3		T256	22		T255	519
alert_integrity_fail	alert[0x38]	5530	1			T50	5		T154	9		T258	207
alert_integrity_fail	alert[0x39]	5371	1			T154	8		T257	15		T55	537
alert_integrity_fail	alert[0x3a]	4923	1			T67	2		T50	1		T34	50
alert_integrity_fail	alert[0x3b]	2566	1			T138	1		T257	1		T55	289
alert_integrity_fail	alert[0x3c]	6998	1			T49	1		T50	2		T258	34
alert_integrity_fail	alert[0x3d]	1209	1			T103	17		T345	4		T57	6
alert_integrity_fail	alert[0x3e]	7983	1			T67	2		T54	9		T258	11
alert_integrity_fail	alert[0x3f]	1544	1			T50	12		T34	3		T137	3
alert_integrity_fail	alert[0x40]	2420	1			T34	6		T259	38		T119	76
alert_ping_fail	alert[0x0]	14	1			T337	1		T340	1		T343	1
alert_ping_fail	alert[0x1]	12	1			T16	1		T158	1		T314	2
alert_ping_fail	alert[0x2]	9	1			T15	1		T71	1		T346	1
alert_ping_fail	alert[0x3]	10	1			T16	1		T337	2		T342	1
alert_ping_fail	alert[0x4]	13	1			T15	2		T16	1		T344	1
alert_ping_fail	alert[0x5]	16	1			T158	1		T337	1		T340	1
alert_ping_fail	alert[0x6]	8	1			T338	1		T337	1		T341	2
alert_ping_fail	alert[0x7]	18	1			T29	1		T347	1		T75	2
alert_ping_fail	alert[0x8]	14	1			T338	1		T337	1		T341	1
alert_ping_fail	alert[0x9]	13	1			T337	1		T347	1		T265	1
alert_ping_fail	alert[0xa]	16	1			T158	1		T348	1		T349	1
alert_ping_fail	alert[0xb]	14	1			T15	1		T337	1		T314	1
alert_ping_fail	alert[0xc]	12	1			T338	2		T158	1		T71	1
alert_ping_fail	alert[0xd]	10	1			T339	1		T340	1		T29	1
alert_ping_fail	alert[0xe]	7	1			T15	1		T347	1		T350	1
alert_ping_fail	alert[0xf]	9	1			T338	1		T348	1		T299	1
alert_ping_fail	alert[0x10]	17	1			T15	1		T16	1		T158	2
alert_ping_fail	alert[0x11]	8	1			T158	1		T351	1		T352	1
alert_ping_fail	alert[0x12]	6	1			T15	1		T327	1		T353	1
alert_ping_fail	alert[0x13]	15	1			T158	1		T314	1		T340	1
alert_ping_fail	alert[0x14]	14	1			T15	1		T158	1		T74	1
alert_ping_fail	alert[0x15]	13	1			T311	1		T344	1		T352	1
alert_ping_fail	alert[0x16]	17	1			T15	1		T338	2		T337	1
alert_ping_fail	alert[0x17]	12	1			T342	2		T346	1		T348	1
alert_ping_fail	alert[0x18]	1	1			T354	1		-	-		-	-
alert_ping_fail	alert[0x19]	10	1			T327	1		T352	1		T350	1
alert_ping_fail	alert[0x1a]	9	1			T15	1		T158	1		T339	1
alert_ping_fail	alert[0x1b]	10	1			T29	1		T71	1		T355	1
alert_ping_fail	alert[0x1c]	14	1			T7	1		T338	1		T339	1
alert_ping_fail	alert[0x1d]	14	1			T338	1		T337	1		T343	1
alert_ping_fail	alert[0x1e]	5	1			T341	1		T342	1		T346	1
alert_ping_fail	alert[0x1f]	19	1			T340	2		T343	1		T341	1
alert_ping_fail	alert[0x20]	10	1			T71	1		T75	1		T352	1
alert_ping_fail	alert[0x21]	12	1			T337	2		T314	1		T342	1
alert_ping_fail	alert[0x22]	20	1			T338	1		T314	1		T340	1
alert_ping_fail	alert[0x23]	12	1			T15	1		T16	1		T29	2
alert_ping_fail	alert[0x24]	11	1			T16	1		T314	1		T352	2
alert_ping_fail	alert[0x25]	11	1			T343	2		T341	1		T350	1
alert_ping_fail	alert[0x26]	7	1			T314	1		T356	1		T357	1
alert_ping_fail	alert[0x27]	11	1			T338	1		T314	1		T341	1
alert_ping_fail	alert[0x28]	21	1			T158	1		T337	1		T341	2
alert_ping_fail	alert[0x29]	7	1			T265	1		T358	1		T359	2
alert_ping_fail	alert[0x2a]	10	1			T158	1		T337	1		T314	1
alert_ping_fail	alert[0x2b]	11	1			T339	1		T337	1		T327	1
alert_ping_fail	alert[0x2c]	15	1			T343	2		T342	1		T333	1
alert_ping_fail	alert[0x2d]	10	1			T338	1		T158	2		T314	1
alert_ping_fail	alert[0x2e]	12	1			T15	1		T158	1		T327	1
alert_ping_fail	alert[0x2f]	12	1			T338	2		T339	1		T351	1
alert_ping_fail	alert[0x30]	13	1			T7	1		T15	1		T341	1
alert_ping_fail	alert[0x31]	10	1			T343	1		T29	1		T344	1
alert_ping_fail	alert[0x32]	7	1			T343	1		T341	1		T265	1
alert_ping_fail	alert[0x33]	11	1			T337	1		T343	1		T29	1
alert_ping_fail	alert[0x34]	9	1			T158	1		T340	1		T342	1
alert_ping_fail	alert[0x35]	6	1			T16	1		T340	1		T343	1
alert_ping_fail	alert[0x36]	10	1			T158	1		T342	1		T352	1
alert_ping_fail	alert[0x37]	10	1			T343	1		T29	1		T71	2
alert_ping_fail	alert[0x38]	6	1			T339	1		T343	1		T342	2
alert_ping_fail	alert[0x39]	17	1			T16	1		T337	1		T341	1
alert_ping_fail	alert[0x3a]	7	1			T158	1		T360	2		T354	1
alert_ping_fail	alert[0x3b]	11	1			T337	1		T314	1		T340	1
alert_ping_fail	alert[0x3c]	9	1			T339	1		T341	1		T342	1
alert_ping_fail	alert[0x3d]	9	1			T339	1		T342	1		T344	1
alert_ping_fail	alert[0x3e]	9	1			T7	1		T340	1		T343	1
alert_ping_fail	alert[0x3f]	5	1			T337	1		T343	1		T265	1
alert_ping_fail	alert[0x40]	3	1			T337	1		T350	1		T299	1

---

Summary for Cross loc_alert_cause_cross_class_index

Samples crossed: loc_alert_cause_cp class_index_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for loc_alert_cause_cross_class_index

Bins

loc_alert_cause_cp	class_index_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
alert_integrity_fail	class_i[0x0]	91835	1			T11	28		T50	158		T34	90
alert_integrity_fail	class_i[0x1]	102790	1			T67	7		T49	4		T50	32
alert_integrity_fail	class_i[0x2]	48054	1			T35	12		T50	11		T34	476
alert_integrity_fail	class_i[0x3]	42624	1			T11	1		T67	1		T49	4
alert_ping_fail	class_i[0x0]	119	1			T15	2		T337	1		T314	1
alert_ping_fail	class_i[0x1]	163	1			T7	2		T15	4		T16	8
alert_ping_fail	class_i[0x2]	244	1			T15	5		T338	13		T158	15
alert_ping_fail	class_i[0x3]	197	1			T7	1		T15	2		T338	1