T799 |
/workspace/coverage/default/8.clkmgr_lc_ctrl_intersig_mubi.3818337189 |
|
|
Apr 25 02:43:03 PM PDT 24 |
Apr 25 02:43:06 PM PDT 24 |
46580409 ps |
T800 |
/workspace/coverage/default/30.clkmgr_idle_intersig_mubi.2302085128 |
|
|
Apr 25 02:44:13 PM PDT 24 |
Apr 25 02:44:14 PM PDT 24 |
65600426 ps |
T801 |
/workspace/coverage/default/27.clkmgr_frequency.651946520 |
|
|
Apr 25 02:44:06 PM PDT 24 |
Apr 25 02:44:15 PM PDT 24 |
1545124972 ps |
T802 |
/workspace/coverage/default/31.clkmgr_div_intersig_mubi.3026177560 |
|
|
Apr 25 02:44:19 PM PDT 24 |
Apr 25 02:44:21 PM PDT 24 |
28168627 ps |
T803 |
/workspace/coverage/default/39.clkmgr_alert_test.3024746919 |
|
|
Apr 25 02:44:41 PM PDT 24 |
Apr 25 02:44:44 PM PDT 24 |
14545456 ps |
T804 |
/workspace/coverage/default/40.clkmgr_frequency_timeout.2563940455 |
|
|
Apr 25 02:44:42 PM PDT 24 |
Apr 25 02:44:45 PM PDT 24 |
270405508 ps |
T805 |
/workspace/coverage/default/0.clkmgr_extclk.1024216808 |
|
|
Apr 25 02:42:33 PM PDT 24 |
Apr 25 02:42:36 PM PDT 24 |
16512081 ps |
T806 |
/workspace/coverage/default/40.clkmgr_clk_status.3002970314 |
|
|
Apr 25 02:44:45 PM PDT 24 |
Apr 25 02:44:47 PM PDT 24 |
18466870 ps |
T807 |
/workspace/coverage/default/16.clkmgr_lc_ctrl_intersig_mubi.705673708 |
|
|
Apr 25 02:43:26 PM PDT 24 |
Apr 25 02:43:28 PM PDT 24 |
16517543 ps |
T808 |
/workspace/coverage/default/33.clkmgr_frequency_timeout.1737739688 |
|
|
Apr 25 02:44:22 PM PDT 24 |
Apr 25 02:44:31 PM PDT 24 |
2032190594 ps |
T809 |
/workspace/coverage/default/19.clkmgr_peri.3476090408 |
|
|
Apr 25 02:43:35 PM PDT 24 |
Apr 25 02:43:37 PM PDT 24 |
46049664 ps |
T810 |
/workspace/coverage/default/35.clkmgr_div_intersig_mubi.3612695725 |
|
|
Apr 25 02:44:30 PM PDT 24 |
Apr 25 02:44:32 PM PDT 24 |
30146330 ps |
T811 |
/workspace/coverage/default/28.clkmgr_smoke.4283030885 |
|
|
Apr 25 02:44:05 PM PDT 24 |
Apr 25 02:44:08 PM PDT 24 |
18151335 ps |
T812 |
/workspace/coverage/default/46.clkmgr_div_intersig_mubi.810598118 |
|
|
Apr 25 02:45:06 PM PDT 24 |
Apr 25 02:45:08 PM PDT 24 |
17300762 ps |
T813 |
/workspace/coverage/default/30.clkmgr_lc_ctrl_intersig_mubi.3197151241 |
|
|
Apr 25 02:44:12 PM PDT 24 |
Apr 25 02:44:14 PM PDT 24 |
18332278 ps |
T814 |
/workspace/coverage/default/1.clkmgr_extclk.2746333884 |
|
|
Apr 25 02:42:32 PM PDT 24 |
Apr 25 02:42:34 PM PDT 24 |
45395208 ps |
T815 |
/workspace/coverage/default/19.clkmgr_clk_status.446282305 |
|
|
Apr 25 02:43:36 PM PDT 24 |
Apr 25 02:43:39 PM PDT 24 |
36841931 ps |
T816 |
/workspace/coverage/default/14.clkmgr_clk_handshake_intersig_mubi.308319034 |
|
|
Apr 25 02:43:19 PM PDT 24 |
Apr 25 02:43:22 PM PDT 24 |
20351341 ps |
T817 |
/workspace/coverage/default/20.clkmgr_trans.1513656018 |
|
|
Apr 25 02:43:40 PM PDT 24 |
Apr 25 02:43:43 PM PDT 24 |
112285882 ps |
T818 |
/workspace/coverage/default/6.clkmgr_frequency.2894817519 |
|
|
Apr 25 02:42:57 PM PDT 24 |
Apr 25 02:43:09 PM PDT 24 |
1525091954 ps |
T819 |
/workspace/coverage/default/29.clkmgr_alert_test.2536995067 |
|
|
Apr 25 02:44:07 PM PDT 24 |
Apr 25 02:44:10 PM PDT 24 |
67388574 ps |
T820 |
/workspace/coverage/default/0.clkmgr_trans.374617685 |
|
|
Apr 25 02:42:30 PM PDT 24 |
Apr 25 02:42:33 PM PDT 24 |
29601490 ps |
T821 |
/workspace/coverage/default/39.clkmgr_clk_handshake_intersig_mubi.1318226735 |
|
|
Apr 25 02:44:41 PM PDT 24 |
Apr 25 02:44:43 PM PDT 24 |
68282373 ps |
T822 |
/workspace/coverage/default/31.clkmgr_regwen.4204168657 |
|
|
Apr 25 02:44:19 PM PDT 24 |
Apr 25 02:44:25 PM PDT 24 |
1442359868 ps |
T823 |
/workspace/coverage/default/6.clkmgr_extclk.3971583574 |
|
|
Apr 25 02:42:56 PM PDT 24 |
Apr 25 02:43:01 PM PDT 24 |
208707450 ps |
T824 |
/workspace/coverage/default/27.clkmgr_clk_status.1050046161 |
|
|
Apr 25 02:44:08 PM PDT 24 |
Apr 25 02:44:10 PM PDT 24 |
21209172 ps |
T825 |
/workspace/coverage/default/27.clkmgr_idle_intersig_mubi.1033628960 |
|
|
Apr 25 02:44:05 PM PDT 24 |
Apr 25 02:44:08 PM PDT 24 |
13876737 ps |
T826 |
/workspace/coverage/default/14.clkmgr_frequency.2710468504 |
|
|
Apr 25 02:43:19 PM PDT 24 |
Apr 25 02:43:37 PM PDT 24 |
2118131012 ps |
T827 |
/workspace/coverage/default/36.clkmgr_smoke.2298666851 |
|
|
Apr 25 02:44:29 PM PDT 24 |
Apr 25 02:44:32 PM PDT 24 |
61827122 ps |
T828 |
/workspace/coverage/default/43.clkmgr_regwen.692940248 |
|
|
Apr 25 02:45:32 PM PDT 24 |
Apr 25 02:45:34 PM PDT 24 |
227158311 ps |
T829 |
/workspace/coverage/default/27.clkmgr_stress_all_with_rand_reset.3760994436 |
|
|
Apr 25 02:44:03 PM PDT 24 |
Apr 25 03:13:23 PM PDT 24 |
305172251842 ps |
T830 |
/workspace/coverage/default/2.clkmgr_frequency.3609814749 |
|
|
Apr 25 02:42:40 PM PDT 24 |
Apr 25 02:42:46 PM PDT 24 |
806269033 ps |
T831 |
/workspace/coverage/default/17.clkmgr_clk_handshake_intersig_mubi.1929446906 |
|
|
Apr 25 02:43:39 PM PDT 24 |
Apr 25 02:43:41 PM PDT 24 |
33508123 ps |
T832 |
/workspace/coverage/default/2.clkmgr_frequency_timeout.1381954897 |
|
|
Apr 25 02:42:40 PM PDT 24 |
Apr 25 02:42:50 PM PDT 24 |
1100942605 ps |
T833 |
/workspace/coverage/default/39.clkmgr_stress_all_with_rand_reset.1963830432 |
|
|
Apr 25 02:45:11 PM PDT 24 |
Apr 25 02:52:15 PM PDT 24 |
30025352721 ps |
T834 |
/workspace/coverage/default/12.clkmgr_clk_status.1845647955 |
|
|
Apr 25 02:43:16 PM PDT 24 |
Apr 25 02:43:19 PM PDT 24 |
38635130 ps |
T835 |
/workspace/coverage/default/15.clkmgr_peri.3535786963 |
|
|
Apr 25 02:43:18 PM PDT 24 |
Apr 25 02:43:21 PM PDT 24 |
81052175 ps |
T836 |
/workspace/coverage/default/48.clkmgr_smoke.96196324 |
|
|
Apr 25 02:45:09 PM PDT 24 |
Apr 25 02:45:11 PM PDT 24 |
22557180 ps |
T837 |
/workspace/coverage/default/12.clkmgr_peri.1940880196 |
|
|
Apr 25 02:43:16 PM PDT 24 |
Apr 25 02:43:19 PM PDT 24 |
23342632 ps |
T838 |
/workspace/coverage/default/0.clkmgr_frequency.1913857149 |
|
|
Apr 25 02:42:29 PM PDT 24 |
Apr 25 02:42:34 PM PDT 24 |
828996199 ps |
T839 |
/workspace/coverage/default/21.clkmgr_div_intersig_mubi.452269896 |
|
|
Apr 25 02:43:49 PM PDT 24 |
Apr 25 02:43:51 PM PDT 24 |
13908683 ps |
T840 |
/workspace/coverage/default/28.clkmgr_stress_all.3821547887 |
|
|
Apr 25 02:44:08 PM PDT 24 |
Apr 25 02:44:26 PM PDT 24 |
4064860250 ps |
T841 |
/workspace/coverage/default/37.clkmgr_idle_intersig_mubi.1738228936 |
|
|
Apr 25 02:44:32 PM PDT 24 |
Apr 25 02:44:34 PM PDT 24 |
36105100 ps |
T842 |
/workspace/coverage/default/49.clkmgr_peri.1800044698 |
|
|
Apr 25 02:45:13 PM PDT 24 |
Apr 25 02:45:14 PM PDT 24 |
17466991 ps |
T843 |
/workspace/coverage/default/1.clkmgr_regwen.2850815926 |
|
|
Apr 25 02:42:40 PM PDT 24 |
Apr 25 02:42:46 PM PDT 24 |
1570725201 ps |
T844 |
/workspace/coverage/default/45.clkmgr_frequency.2565562169 |
|
|
Apr 25 02:44:59 PM PDT 24 |
Apr 25 02:45:09 PM PDT 24 |
1156373451 ps |
T845 |
/workspace/coverage/default/18.clkmgr_stress_all.3124324441 |
|
|
Apr 25 02:43:35 PM PDT 24 |
Apr 25 02:43:56 PM PDT 24 |
5886617928 ps |
T846 |
/workspace/coverage/default/25.clkmgr_trans.2502348180 |
|
|
Apr 25 02:43:55 PM PDT 24 |
Apr 25 02:43:58 PM PDT 24 |
30006709 ps |
T847 |
/workspace/coverage/default/7.clkmgr_regwen.2927687870 |
|
|
Apr 25 02:43:04 PM PDT 24 |
Apr 25 02:43:10 PM PDT 24 |
909627935 ps |
T848 |
/workspace/coverage/default/12.clkmgr_stress_all_with_rand_reset.1557493814 |
|
|
Apr 25 02:43:15 PM PDT 24 |
Apr 25 02:53:43 PM PDT 24 |
74224330431 ps |
T849 |
/workspace/coverage/default/29.clkmgr_clk_handshake_intersig_mubi.1342545427 |
|
|
Apr 25 02:44:08 PM PDT 24 |
Apr 25 02:44:10 PM PDT 24 |
15841370 ps |
T850 |
/workspace/coverage/default/14.clkmgr_stress_all.3599557992 |
|
|
Apr 25 02:43:21 PM PDT 24 |
Apr 25 02:43:46 PM PDT 24 |
7360812814 ps |
T851 |
/workspace/coverage/default/47.clkmgr_trans.934955422 |
|
|
Apr 25 02:45:12 PM PDT 24 |
Apr 25 02:45:14 PM PDT 24 |
83689875 ps |
T852 |
/workspace/coverage/default/43.clkmgr_stress_all_with_rand_reset.526088685 |
|
|
Apr 25 02:44:59 PM PDT 24 |
Apr 25 02:54:38 PM PDT 24 |
37650103997 ps |
T853 |
/workspace/coverage/default/19.clkmgr_stress_all_with_rand_reset.4288070269 |
|
|
Apr 25 02:43:39 PM PDT 24 |
Apr 25 02:50:58 PM PDT 24 |
73472452787 ps |
T115 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.1094636689 |
|
|
Apr 25 12:40:23 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
1393883683 ps |
T854 |
/workspace/coverage/cover_reg_top/29.clkmgr_intr_test.3621400749 |
|
|
Apr 25 12:40:53 PM PDT 24 |
Apr 25 12:40:54 PM PDT 24 |
31935003 ps |
T84 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.2960716670 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
57584810 ps |
T116 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.824889716 |
|
|
Apr 25 12:40:51 PM PDT 24 |
Apr 25 12:40:52 PM PDT 24 |
22841700 ps |
T85 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.153702409 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
51947534 ps |
T107 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2505818045 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
93731602 ps |
T855 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.2733203400 |
|
|
Apr 25 12:40:36 PM PDT 24 |
Apr 25 12:40:40 PM PDT 24 |
122619559 ps |
T856 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.971735428 |
|
|
Apr 25 12:40:34 PM PDT 24 |
Apr 25 12:40:36 PM PDT 24 |
36462044 ps |
T857 |
/workspace/coverage/cover_reg_top/47.clkmgr_intr_test.4237362380 |
|
|
Apr 25 12:40:30 PM PDT 24 |
Apr 25 12:40:33 PM PDT 24 |
42788127 ps |
T858 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.1495242842 |
|
|
Apr 25 12:40:10 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
20989559 ps |
T859 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.200476301 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:50 PM PDT 24 |
10851836 ps |
T860 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.3834638801 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
86868669 ps |
T861 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.917570756 |
|
|
Apr 25 12:40:27 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
19041896 ps |
T108 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.4043449144 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
409646329 ps |
T64 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.3817805137 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:43 PM PDT 24 |
319677893 ps |
T862 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.2473404630 |
|
|
Apr 25 12:40:08 PM PDT 24 |
Apr 25 12:40:11 PM PDT 24 |
31468646 ps |
T109 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2812624937 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
140273390 ps |
T67 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.1217401401 |
|
|
Apr 25 12:40:09 PM PDT 24 |
Apr 25 12:40:14 PM PDT 24 |
154479149 ps |
T863 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.1381500705 |
|
|
Apr 25 12:40:12 PM PDT 24 |
Apr 25 12:40:15 PM PDT 24 |
149614585 ps |
T864 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.157300625 |
|
|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:47 PM PDT 24 |
61928489 ps |
T865 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.1583483898 |
|
|
Apr 25 12:40:43 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
28018245 ps |
T866 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.968246472 |
|
|
Apr 25 12:40:36 PM PDT 24 |
Apr 25 12:40:38 PM PDT 24 |
15170619 ps |
T867 |
/workspace/coverage/cover_reg_top/18.clkmgr_intr_test.519027085 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
15490581 ps |
T65 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.2925631495 |
|
|
Apr 25 12:40:30 PM PDT 24 |
Apr 25 12:40:33 PM PDT 24 |
68997592 ps |
T66 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2629388460 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:51 PM PDT 24 |
73358411 ps |
T71 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.714892542 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
160582233 ps |
T75 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.3880218595 |
|
|
Apr 25 12:40:52 PM PDT 24 |
Apr 25 12:40:54 PM PDT 24 |
64299396 ps |
T868 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.3085218034 |
|
|
Apr 25 12:40:34 PM PDT 24 |
Apr 25 12:40:37 PM PDT 24 |
111261759 ps |
T86 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.3630574741 |
|
|
Apr 25 12:40:20 PM PDT 24 |
Apr 25 12:40:22 PM PDT 24 |
18370976 ps |
T869 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.2003239104 |
|
|
Apr 25 12:40:43 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
15013243 ps |
T870 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.3923700390 |
|
|
Apr 25 12:40:09 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
21870899 ps |
T871 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.2807429568 |
|
|
Apr 25 12:40:56 PM PDT 24 |
Apr 25 12:40:58 PM PDT 24 |
44922978 ps |
T872 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.3921948439 |
|
|
Apr 25 12:40:26 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
430644358 ps |
T87 |
/workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.1441989952 |
|
|
Apr 25 12:40:22 PM PDT 24 |
Apr 25 12:40:25 PM PDT 24 |
82138406 ps |
T88 |
/workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.3413677638 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:43 PM PDT 24 |
43837752 ps |
T873 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.3496062088 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
12180369 ps |
T117 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.3806855321 |
|
|
Apr 25 12:40:20 PM PDT 24 |
Apr 25 12:40:23 PM PDT 24 |
193463870 ps |
T874 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.2613564930 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
14464500 ps |
T875 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.1849471956 |
|
|
Apr 25 12:40:49 PM PDT 24 |
Apr 25 12:40:51 PM PDT 24 |
29085410 ps |
T876 |
/workspace/coverage/cover_reg_top/23.clkmgr_intr_test.455397960 |
|
|
Apr 25 12:40:43 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
30837825 ps |
T89 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.3103055550 |
|
|
Apr 25 12:40:10 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
13904508 ps |
T877 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.942779161 |
|
|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:47 PM PDT 24 |
11414265 ps |
T90 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.1291857880 |
|
|
Apr 25 12:40:10 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
60128703 ps |
T878 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3993477047 |
|
|
Apr 25 12:40:30 PM PDT 24 |
Apr 25 12:40:33 PM PDT 24 |
112665611 ps |
T70 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2170371486 |
|
|
Apr 25 12:40:02 PM PDT 24 |
Apr 25 12:40:05 PM PDT 24 |
112464212 ps |
T879 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.1306111629 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:37 PM PDT 24 |
22979758 ps |
T73 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.196645911 |
|
|
Apr 25 12:40:45 PM PDT 24 |
Apr 25 12:40:48 PM PDT 24 |
77646785 ps |
T880 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.2097104043 |
|
|
Apr 25 12:40:25 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
52519544 ps |
T122 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.3847520712 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:41 PM PDT 24 |
224402099 ps |
T881 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.500694074 |
|
|
Apr 25 12:40:10 PM PDT 24 |
Apr 25 12:40:18 PM PDT 24 |
166925935 ps |
T882 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.217200063 |
|
|
Apr 25 12:40:32 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
43552285 ps |
T883 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.4131801456 |
|
|
Apr 25 12:40:29 PM PDT 24 |
Apr 25 12:40:33 PM PDT 24 |
128821133 ps |
T884 |
/workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.2505267179 |
|
|
Apr 25 12:40:31 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
68457016 ps |
T885 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.1353767877 |
|
|
Apr 25 12:40:27 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
211787526 ps |
T886 |
/workspace/coverage/cover_reg_top/49.clkmgr_intr_test.4219676372 |
|
|
Apr 25 12:40:57 PM PDT 24 |
Apr 25 12:40:58 PM PDT 24 |
13653730 ps |
T887 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.109971983 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
66608923 ps |
T888 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.3572895380 |
|
|
Apr 25 12:40:08 PM PDT 24 |
Apr 25 12:40:11 PM PDT 24 |
48768602 ps |
T113 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.430323482 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
424429717 ps |
T889 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.2320152510 |
|
|
Apr 25 12:40:10 PM PDT 24 |
Apr 25 12:40:14 PM PDT 24 |
30701145 ps |
T890 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.1747151127 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:37 PM PDT 24 |
46300607 ps |
T891 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.2443619864 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
23304969 ps |
T892 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.3576189667 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:38 PM PDT 24 |
366506102 ps |
T893 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.4031484587 |
|
|
Apr 25 12:40:13 PM PDT 24 |
Apr 25 12:40:16 PM PDT 24 |
83305316 ps |
T121 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.585146171 |
|
|
Apr 25 12:40:20 PM PDT 24 |
Apr 25 12:40:24 PM PDT 24 |
112445192 ps |
T894 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.2601115510 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
18524806 ps |
T895 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.1985468014 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
53158782 ps |
T896 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.162286266 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
63801759 ps |
T74 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.2368180504 |
|
|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:49 PM PDT 24 |
654012566 ps |
T897 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.355893429 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
12467232 ps |
T898 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.3830339319 |
|
|
Apr 25 12:40:54 PM PDT 24 |
Apr 25 12:40:56 PM PDT 24 |
143267284 ps |
T142 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.2335737451 |
|
|
Apr 25 12:40:36 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
114352173 ps |
T118 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.1406261615 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
367179527 ps |
T899 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.3243001939 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
133987177 ps |
T900 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.4125925024 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
14057893 ps |
T901 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.1604004187 |
|
|
Apr 25 12:40:46 PM PDT 24 |
Apr 25 12:40:48 PM PDT 24 |
14110079 ps |
T902 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.2122688447 |
|
|
Apr 25 12:40:26 PM PDT 24 |
Apr 25 12:40:29 PM PDT 24 |
33220936 ps |
T903 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.2268927488 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:37 PM PDT 24 |
12830948 ps |
T904 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.528999139 |
|
|
Apr 25 12:40:23 PM PDT 24 |
Apr 25 12:40:26 PM PDT 24 |
56509395 ps |
T905 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.1211373183 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
76963614 ps |
T906 |
/workspace/coverage/cover_reg_top/7.clkmgr_intr_test.2741643341 |
|
|
Apr 25 12:40:25 PM PDT 24 |
Apr 25 12:40:29 PM PDT 24 |
34519576 ps |
T907 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.989345339 |
|
|
Apr 25 12:40:33 PM PDT 24 |
Apr 25 12:40:35 PM PDT 24 |
80650619 ps |
T908 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.1401827793 |
|
|
Apr 25 12:40:25 PM PDT 24 |
Apr 25 12:40:29 PM PDT 24 |
13884791 ps |
T909 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.3686366863 |
|
|
Apr 25 12:40:08 PM PDT 24 |
Apr 25 12:40:11 PM PDT 24 |
42342388 ps |
T910 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.2143298522 |
|
|
Apr 25 12:40:24 PM PDT 24 |
Apr 25 12:40:27 PM PDT 24 |
53361592 ps |
T911 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.2809241481 |
|
|
Apr 25 12:40:25 PM PDT 24 |
Apr 25 12:40:29 PM PDT 24 |
25521905 ps |
T912 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.824838984 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
39725542 ps |
T913 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.2011234850 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
36991988 ps |
T914 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.1620077591 |
|
|
Apr 25 12:40:16 PM PDT 24 |
Apr 25 12:40:20 PM PDT 24 |
94066157 ps |
T68 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.2138706805 |
|
|
Apr 25 12:40:09 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
140297986 ps |
T915 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.89646115 |
|
|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:47 PM PDT 24 |
17903302 ps |
T145 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3842480117 |
|
|
Apr 25 12:40:04 PM PDT 24 |
Apr 25 12:40:08 PM PDT 24 |
135678782 ps |
T72 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.2553021445 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
49868799 ps |
T916 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.2638419434 |
|
|
Apr 25 12:40:13 PM PDT 24 |
Apr 25 12:40:17 PM PDT 24 |
519997140 ps |
T917 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.451876085 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
20384574 ps |
T918 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.3999196423 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
119660336 ps |
T919 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.1537692319 |
|
|
Apr 25 12:40:24 PM PDT 24 |
Apr 25 12:40:29 PM PDT 24 |
136040368 ps |
T920 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.654398447 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:51 PM PDT 24 |
138853938 ps |
T921 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2059387534 |
|
|
Apr 25 12:40:21 PM PDT 24 |
Apr 25 12:40:23 PM PDT 24 |
33280470 ps |
T136 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.3267138552 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
154940826 ps |
T137 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.2167503604 |
|
|
Apr 25 12:40:46 PM PDT 24 |
Apr 25 12:40:49 PM PDT 24 |
178499501 ps |
T69 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.553884766 |
|
|
Apr 25 12:40:05 PM PDT 24 |
Apr 25 12:40:08 PM PDT 24 |
193477828 ps |
T138 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.2778540938 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
90359152 ps |
T922 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.3888644920 |
|
|
Apr 25 12:40:30 PM PDT 24 |
Apr 25 12:40:33 PM PDT 24 |
33697435 ps |
T923 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.752685116 |
|
|
Apr 25 12:40:21 PM PDT 24 |
Apr 25 12:40:24 PM PDT 24 |
16055619 ps |
T139 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.3070206586 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
253785878 ps |
T147 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3828896579 |
|
|
Apr 25 12:40:17 PM PDT 24 |
Apr 25 12:40:21 PM PDT 24 |
104801800 ps |
T924 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.1244839845 |
|
|
Apr 25 12:40:32 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
21923508 ps |
T119 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.3970056569 |
|
|
Apr 25 12:40:21 PM PDT 24 |
Apr 25 12:40:25 PM PDT 24 |
139071749 ps |
T925 |
/workspace/coverage/cover_reg_top/5.clkmgr_intr_test.885590675 |
|
|
Apr 25 12:40:29 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
13454948 ps |
T926 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.556008874 |
|
|
Apr 25 12:40:47 PM PDT 24 |
Apr 25 12:40:49 PM PDT 24 |
67430208 ps |
T927 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.2849449548 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
48991592 ps |
T928 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.1601718412 |
|
|
Apr 25 12:40:25 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
84950248 ps |
T929 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.465717447 |
|
|
Apr 25 12:40:52 PM PDT 24 |
Apr 25 12:40:53 PM PDT 24 |
28350350 ps |
T930 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.4064810682 |
|
|
Apr 25 12:40:54 PM PDT 24 |
Apr 25 12:40:56 PM PDT 24 |
138293103 ps |
T931 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.338981477 |
|
|
Apr 25 12:40:43 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
15828849 ps |
T932 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.822870348 |
|
|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:47 PM PDT 24 |
201462516 ps |
T933 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.2492603250 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
19888850 ps |
T120 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2942776843 |
|
|
Apr 25 12:40:26 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
253356522 ps |
T934 |
/workspace/coverage/cover_reg_top/24.clkmgr_intr_test.1673340633 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:50 PM PDT 24 |
89712652 ps |
T935 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.442386287 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:37 PM PDT 24 |
16545214 ps |
T936 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.4021098078 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
516867686 ps |
T937 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.1905778520 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
22611135 ps |
T938 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.36648060 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
92851038 ps |
T939 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.3790878681 |
|
|
Apr 25 12:40:29 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
91602883 ps |
T940 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.197101305 |
|
|
Apr 25 12:40:11 PM PDT 24 |
Apr 25 12:40:14 PM PDT 24 |
22977040 ps |
T941 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.178102260 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
14738885 ps |
T942 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.1742112823 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:40 PM PDT 24 |
23508669 ps |
T943 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.681560737 |
|
|
Apr 25 12:40:32 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
49793457 ps |
T123 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.1897342 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:51 PM PDT 24 |
122050538 ps |
T944 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.2542556616 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
26567723 ps |
T945 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.895823629 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
14225646 ps |
T946 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3502176424 |
|
|
Apr 25 12:40:45 PM PDT 24 |
Apr 25 12:40:47 PM PDT 24 |
62554821 ps |
T947 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.2220942021 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
321437747 ps |
T948 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.2496622442 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
22455078 ps |
T140 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.83657919 |
|
|
Apr 25 12:40:58 PM PDT 24 |
Apr 25 12:41:01 PM PDT 24 |
189832023 ps |
T949 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.2059963947 |
|
|
Apr 25 12:40:27 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
848518859 ps |
T143 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2633912605 |
|
|
Apr 25 12:40:35 PM PDT 24 |
Apr 25 12:40:38 PM PDT 24 |
258334359 ps |
T950 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.3467682652 |
|
|
Apr 25 12:40:31 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
128235111 ps |
T951 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.3005730210 |
|
|
Apr 25 12:40:42 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
36883246 ps |
T952 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3314339026 |
|
|
Apr 25 12:40:08 PM PDT 24 |
Apr 25 12:40:14 PM PDT 24 |
139893874 ps |
T953 |
/workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.3116920503 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
31653116 ps |
T954 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3735383943 |
|
|
Apr 25 12:40:25 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
144292882 ps |
T955 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.1571516579 |
|
|
Apr 25 12:40:29 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
172801125 ps |
T956 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.1760123272 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:50 PM PDT 24 |
13028248 ps |
T124 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3702090734 |
|
|
Apr 25 12:40:33 PM PDT 24 |
Apr 25 12:40:36 PM PDT 24 |
56953783 ps |
T957 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.2809584487 |
|
|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:41 PM PDT 24 |
339841839 ps |
T958 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.2061918262 |
|
|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
81533273 ps |
T959 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.4235616152 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:45 PM PDT 24 |
107932331 ps |
T960 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.3103327557 |
|
|
Apr 25 12:40:47 PM PDT 24 |
Apr 25 12:40:49 PM PDT 24 |
12385904 ps |
T141 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.4165187735 |
|
|
Apr 25 12:40:30 PM PDT 24 |
Apr 25 12:40:36 PM PDT 24 |
563328588 ps |
T144 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.1956759347 |
|
|
Apr 25 12:40:12 PM PDT 24 |
Apr 25 12:40:16 PM PDT 24 |
118615383 ps |
T961 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.3922883763 |
|
|
Apr 25 12:40:09 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
128145675 ps |
T962 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.1040713294 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:43 PM PDT 24 |
155907675 ps |
T963 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.2928455366 |
|
|
Apr 25 12:40:39 PM PDT 24 |
Apr 25 12:40:42 PM PDT 24 |
67196428 ps |
T964 |
/workspace/coverage/cover_reg_top/42.clkmgr_intr_test.2369461189 |
|
|
Apr 25 12:40:46 PM PDT 24 |
Apr 25 12:40:48 PM PDT 24 |
31739691 ps |
T965 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.2411504937 |
|
|
Apr 25 12:40:40 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
204080742 ps |
T966 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.393535265 |
|
|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
30762668 ps |
T114 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.3188740838 |
|
|
Apr 25 12:40:29 PM PDT 24 |
Apr 25 12:40:34 PM PDT 24 |
230362497 ps |
T146 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.4211265777 |
|
|
Apr 25 12:40:43 PM PDT 24 |
Apr 25 12:40:47 PM PDT 24 |
174509359 ps |
T967 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.2609387623 |
|
|
Apr 25 12:40:22 PM PDT 24 |
Apr 25 12:40:26 PM PDT 24 |
138213044 ps |
T968 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.983742348 |
|
|
Apr 25 12:40:36 PM PDT 24 |
Apr 25 12:40:38 PM PDT 24 |
131839000 ps |
T969 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.1841422471 |
|
|
Apr 25 12:40:53 PM PDT 24 |
Apr 25 12:40:55 PM PDT 24 |
23725395 ps |
T148 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.1132902959 |
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|
Apr 25 12:40:44 PM PDT 24 |
Apr 25 12:40:48 PM PDT 24 |
387011700 ps |
T970 |
/workspace/coverage/cover_reg_top/40.clkmgr_intr_test.2092566140 |
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|
Apr 25 12:40:55 PM PDT 24 |
Apr 25 12:40:56 PM PDT 24 |
13491377 ps |
T971 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.2250540466 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:40 PM PDT 24 |
51435191 ps |
T972 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.984244709 |
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|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
27401599 ps |
T183 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.1756184370 |
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|
Apr 25 12:40:16 PM PDT 24 |
Apr 25 12:40:25 PM PDT 24 |
96791906 ps |
T973 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.1381369550 |
|
|
Apr 25 12:40:07 PM PDT 24 |
Apr 25 12:40:11 PM PDT 24 |
110427718 ps |
T974 |
/workspace/coverage/cover_reg_top/13.clkmgr_intr_test.2316972384 |
|
|
Apr 25 12:40:30 PM PDT 24 |
Apr 25 12:40:33 PM PDT 24 |
12449498 ps |
T975 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1856008188 |
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|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:46 PM PDT 24 |
128946315 ps |
T976 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3015150296 |
|
|
Apr 25 12:40:10 PM PDT 24 |
Apr 25 12:40:14 PM PDT 24 |
90016544 ps |
T977 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.953069133 |
|
|
Apr 25 12:40:24 PM PDT 24 |
Apr 25 12:40:28 PM PDT 24 |
21185540 ps |
T978 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1824942043 |
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|
Apr 25 12:40:07 PM PDT 24 |
Apr 25 12:40:13 PM PDT 24 |
245621866 ps |
T979 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.2658667155 |
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|
Apr 25 12:40:26 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
184951123 ps |
T980 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.3826569133 |
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|
Apr 25 12:40:34 PM PDT 24 |
Apr 25 12:40:36 PM PDT 24 |
97922525 ps |
T981 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.1281238801 |
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|
Apr 25 12:40:11 PM PDT 24 |
Apr 25 12:40:15 PM PDT 24 |
103467591 ps |
T982 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.2008183374 |
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|
Apr 25 12:40:26 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
158464336 ps |
T983 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.3662665677 |
|
|
Apr 25 12:40:51 PM PDT 24 |
Apr 25 12:40:57 PM PDT 24 |
13751867 ps |
T984 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.2526663441 |
|
|
Apr 25 12:40:08 PM PDT 24 |
Apr 25 12:40:12 PM PDT 24 |
15376292 ps |
T985 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.3207999198 |
|
|
Apr 25 12:40:16 PM PDT 24 |
Apr 25 12:40:25 PM PDT 24 |
496519983 ps |
T986 |
/workspace/coverage/cover_reg_top/38.clkmgr_intr_test.323873676 |
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|
Apr 25 12:40:37 PM PDT 24 |
Apr 25 12:40:39 PM PDT 24 |
21972153 ps |
T987 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.2955984936 |
|
|
Apr 25 12:40:21 PM PDT 24 |
Apr 25 12:40:25 PM PDT 24 |
68387886 ps |
T988 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.1654438062 |
|
|
Apr 25 12:40:41 PM PDT 24 |
Apr 25 12:40:44 PM PDT 24 |
122847311 ps |
T989 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3486668861 |
|
|
Apr 25 12:40:38 PM PDT 24 |
Apr 25 12:40:43 PM PDT 24 |
247283927 ps |
T990 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1327625938 |
|
|
Apr 25 12:40:19 PM PDT 24 |
Apr 25 12:40:22 PM PDT 24 |
106503107 ps |
T991 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.3401589529 |
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|
Apr 25 12:40:28 PM PDT 24 |
Apr 25 12:40:32 PM PDT 24 |
61486940 ps |
T992 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.255233786 |
|
|
Apr 25 12:40:27 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
26743696 ps |
T993 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.494242609 |
|
|
Apr 25 12:40:18 PM PDT 24 |
Apr 25 12:40:20 PM PDT 24 |
110374313 ps |
T994 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.3555120400 |
|
|
Apr 25 12:40:24 PM PDT 24 |
Apr 25 12:40:30 PM PDT 24 |
353953972 ps |
T995 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.1934940092 |
|
|
Apr 25 12:40:47 PM PDT 24 |
Apr 25 12:40:50 PM PDT 24 |
41258164 ps |
T996 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3073202092 |
|
|
Apr 25 12:40:26 PM PDT 24 |
Apr 25 12:40:31 PM PDT 24 |
224582878 ps |
T997 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.1316959838 |
|
|
Apr 25 12:40:48 PM PDT 24 |
Apr 25 12:40:50 PM PDT 24 |
40125225 ps |
T998 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.3049382684 |
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|
Apr 25 12:40:50 PM PDT 24 |
Apr 25 12:40:51 PM PDT 24 |
30135399 ps |
T999 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.2286671395 |
|
|
Apr 25 12:40:32 PM PDT 24 |
Apr 25 12:40:35 PM PDT 24 |
62758577 ps |
T1000 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.2517820998 |
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|
Apr 25 12:40:36 PM PDT 24 |
Apr 25 12:40:38 PM PDT 24 |
48042751 ps |