T793 |
/workspace/coverage/default/6.clkmgr_idle_intersig_mubi.234554023 |
|
|
Apr 30 02:36:06 PM PDT 24 |
Apr 30 02:36:07 PM PDT 24 |
12130919 ps |
T794 |
/workspace/coverage/default/27.clkmgr_regwen.4194020012 |
|
|
Apr 30 02:37:35 PM PDT 24 |
Apr 30 02:37:39 PM PDT 24 |
570132521 ps |
T795 |
/workspace/coverage/default/15.clkmgr_idle_intersig_mubi.971276483 |
|
|
Apr 30 02:36:58 PM PDT 24 |
Apr 30 02:37:00 PM PDT 24 |
71739323 ps |
T796 |
/workspace/coverage/default/17.clkmgr_lc_clk_byp_req_intersig_mubi.1455562117 |
|
|
Apr 30 02:36:59 PM PDT 24 |
Apr 30 02:37:01 PM PDT 24 |
21176275 ps |
T797 |
/workspace/coverage/default/7.clkmgr_alert_test.1893809127 |
|
|
Apr 30 02:36:14 PM PDT 24 |
Apr 30 02:36:16 PM PDT 24 |
16476816 ps |
T798 |
/workspace/coverage/default/41.clkmgr_smoke.381094429 |
|
|
Apr 30 02:38:17 PM PDT 24 |
Apr 30 02:38:19 PM PDT 24 |
41261735 ps |
T799 |
/workspace/coverage/default/33.clkmgr_idle_intersig_mubi.1888981811 |
|
|
Apr 30 02:37:54 PM PDT 24 |
Apr 30 02:37:56 PM PDT 24 |
99010052 ps |
T800 |
/workspace/coverage/default/46.clkmgr_clk_status.1201831497 |
|
|
Apr 30 02:38:30 PM PDT 24 |
Apr 30 02:38:32 PM PDT 24 |
43858774 ps |
T801 |
/workspace/coverage/default/36.clkmgr_trans.1209423159 |
|
|
Apr 30 02:38:01 PM PDT 24 |
Apr 30 02:38:02 PM PDT 24 |
22453064 ps |
T802 |
/workspace/coverage/default/36.clkmgr_div_intersig_mubi.3797211210 |
|
|
Apr 30 02:38:07 PM PDT 24 |
Apr 30 02:38:08 PM PDT 24 |
46435342 ps |
T803 |
/workspace/coverage/default/38.clkmgr_stress_all_with_rand_reset.57421133 |
|
|
Apr 30 02:38:15 PM PDT 24 |
Apr 30 02:45:16 PM PDT 24 |
28188427474 ps |
T804 |
/workspace/coverage/default/27.clkmgr_div_intersig_mubi.3752116105 |
|
|
Apr 30 02:37:37 PM PDT 24 |
Apr 30 02:37:38 PM PDT 24 |
58277179 ps |
T805 |
/workspace/coverage/default/18.clkmgr_extclk.3328160853 |
|
|
Apr 30 02:37:00 PM PDT 24 |
Apr 30 02:37:01 PM PDT 24 |
37030926 ps |
T806 |
/workspace/coverage/default/1.clkmgr_clk_handshake_intersig_mubi.3881445075 |
|
|
Apr 30 02:35:41 PM PDT 24 |
Apr 30 02:35:42 PM PDT 24 |
23406348 ps |
T807 |
/workspace/coverage/default/9.clkmgr_extclk.2335452041 |
|
|
Apr 30 02:36:23 PM PDT 24 |
Apr 30 02:36:24 PM PDT 24 |
47327943 ps |
T808 |
/workspace/coverage/default/0.clkmgr_peri.3210427895 |
|
|
Apr 30 02:35:29 PM PDT 24 |
Apr 30 02:35:30 PM PDT 24 |
18549549 ps |
T809 |
/workspace/coverage/default/19.clkmgr_idle_intersig_mubi.3960742935 |
|
|
Apr 30 02:37:08 PM PDT 24 |
Apr 30 02:37:09 PM PDT 24 |
22265022 ps |
T810 |
/workspace/coverage/default/45.clkmgr_frequency.540744294 |
|
|
Apr 30 02:38:30 PM PDT 24 |
Apr 30 02:38:50 PM PDT 24 |
2474475065 ps |
T811 |
/workspace/coverage/default/0.clkmgr_stress_all.2708199446 |
|
|
Apr 30 02:35:36 PM PDT 24 |
Apr 30 02:35:37 PM PDT 24 |
145624579 ps |
T812 |
/workspace/coverage/default/7.clkmgr_idle_intersig_mubi.2437908696 |
|
|
Apr 30 02:36:15 PM PDT 24 |
Apr 30 02:36:16 PM PDT 24 |
25817353 ps |
T813 |
/workspace/coverage/default/48.clkmgr_smoke.3933193171 |
|
|
Apr 30 02:38:40 PM PDT 24 |
Apr 30 02:38:42 PM PDT 24 |
42741589 ps |
T814 |
/workspace/coverage/default/16.clkmgr_clk_status.3083705415 |
|
|
Apr 30 02:36:50 PM PDT 24 |
Apr 30 02:36:52 PM PDT 24 |
34417449 ps |
T815 |
/workspace/coverage/default/16.clkmgr_frequency_timeout.3301661046 |
|
|
Apr 30 02:36:59 PM PDT 24 |
Apr 30 02:37:13 PM PDT 24 |
1820425241 ps |
T816 |
/workspace/coverage/default/17.clkmgr_alert_test.3841679696 |
|
|
Apr 30 02:36:59 PM PDT 24 |
Apr 30 02:37:01 PM PDT 24 |
24755095 ps |
T817 |
/workspace/coverage/default/33.clkmgr_lc_ctrl_intersig_mubi.1228386314 |
|
|
Apr 30 02:37:53 PM PDT 24 |
Apr 30 02:37:55 PM PDT 24 |
59569449 ps |
T818 |
/workspace/coverage/default/40.clkmgr_regwen.2677308730 |
|
|
Apr 30 02:38:17 PM PDT 24 |
Apr 30 02:38:21 PM PDT 24 |
555612589 ps |
T819 |
/workspace/coverage/default/7.clkmgr_lc_clk_byp_req_intersig_mubi.973226920 |
|
|
Apr 30 02:36:14 PM PDT 24 |
Apr 30 02:36:16 PM PDT 24 |
15543013 ps |
T820 |
/workspace/coverage/default/5.clkmgr_extclk.686197461 |
|
|
Apr 30 02:36:01 PM PDT 24 |
Apr 30 02:36:02 PM PDT 24 |
23075723 ps |
T821 |
/workspace/coverage/default/19.clkmgr_frequency_timeout.1624462035 |
|
|
Apr 30 02:37:09 PM PDT 24 |
Apr 30 02:37:18 PM PDT 24 |
1920082803 ps |
T822 |
/workspace/coverage/default/40.clkmgr_stress_all_with_rand_reset.3657761259 |
|
|
Apr 30 02:38:16 PM PDT 24 |
Apr 30 02:54:26 PM PDT 24 |
52320479904 ps |
T823 |
/workspace/coverage/default/7.clkmgr_clk_status.3203631616 |
|
|
Apr 30 02:36:14 PM PDT 24 |
Apr 30 02:36:16 PM PDT 24 |
27472502 ps |
T824 |
/workspace/coverage/default/0.clkmgr_frequency.4061236061 |
|
|
Apr 30 02:35:25 PM PDT 24 |
Apr 30 02:35:43 PM PDT 24 |
2475187435 ps |
T825 |
/workspace/coverage/default/23.clkmgr_frequency_timeout.1500799697 |
|
|
Apr 30 02:37:24 PM PDT 24 |
Apr 30 02:37:32 PM PDT 24 |
1830162190 ps |
T826 |
/workspace/coverage/default/2.clkmgr_frequency.1673386626 |
|
|
Apr 30 02:35:43 PM PDT 24 |
Apr 30 02:35:45 PM PDT 24 |
344494120 ps |
T827 |
/workspace/coverage/default/9.clkmgr_lc_ctrl_intersig_mubi.1845900152 |
|
|
Apr 30 02:36:21 PM PDT 24 |
Apr 30 02:36:22 PM PDT 24 |
21210779 ps |
T828 |
/workspace/coverage/default/28.clkmgr_idle_intersig_mubi.461134738 |
|
|
Apr 30 02:37:41 PM PDT 24 |
Apr 30 02:37:43 PM PDT 24 |
19813606 ps |
T829 |
/workspace/coverage/default/35.clkmgr_div_intersig_mubi.3195650638 |
|
|
Apr 30 02:38:00 PM PDT 24 |
Apr 30 02:38:01 PM PDT 24 |
20870113 ps |
T830 |
/workspace/coverage/default/41.clkmgr_clk_status.1641057419 |
|
|
Apr 30 02:38:18 PM PDT 24 |
Apr 30 02:38:19 PM PDT 24 |
24004314 ps |
T831 |
/workspace/coverage/default/7.clkmgr_extclk.3470831474 |
|
|
Apr 30 02:36:16 PM PDT 24 |
Apr 30 02:36:17 PM PDT 24 |
46401590 ps |
T832 |
/workspace/coverage/default/40.clkmgr_idle_intersig_mubi.4260352446 |
|
|
Apr 30 02:38:16 PM PDT 24 |
Apr 30 02:38:18 PM PDT 24 |
18846042 ps |
T833 |
/workspace/coverage/default/17.clkmgr_clk_status.3951717802 |
|
|
Apr 30 02:37:02 PM PDT 24 |
Apr 30 02:37:04 PM PDT 24 |
16290805 ps |
T834 |
/workspace/coverage/default/28.clkmgr_trans.647838607 |
|
|
Apr 30 02:37:36 PM PDT 24 |
Apr 30 02:37:37 PM PDT 24 |
44806302 ps |
T835 |
/workspace/coverage/default/32.clkmgr_div_intersig_mubi.1184817197 |
|
|
Apr 30 02:37:50 PM PDT 24 |
Apr 30 02:37:51 PM PDT 24 |
24136893 ps |
T836 |
/workspace/coverage/default/29.clkmgr_clk_handshake_intersig_mubi.2858969391 |
|
|
Apr 30 02:37:44 PM PDT 24 |
Apr 30 02:37:45 PM PDT 24 |
78229611 ps |
T837 |
/workspace/coverage/default/37.clkmgr_smoke.2374208177 |
|
|
Apr 30 02:38:09 PM PDT 24 |
Apr 30 02:38:11 PM PDT 24 |
29099158 ps |
T838 |
/workspace/coverage/default/20.clkmgr_alert_test.1414063544 |
|
|
Apr 30 02:37:12 PM PDT 24 |
Apr 30 02:37:13 PM PDT 24 |
15366565 ps |
T839 |
/workspace/coverage/default/6.clkmgr_lc_clk_byp_req_intersig_mubi.3285032393 |
|
|
Apr 30 02:36:14 PM PDT 24 |
Apr 30 02:36:16 PM PDT 24 |
19241092 ps |
T840 |
/workspace/coverage/default/19.clkmgr_div_intersig_mubi.2964063745 |
|
|
Apr 30 02:37:10 PM PDT 24 |
Apr 30 02:37:12 PM PDT 24 |
246143256 ps |
T841 |
/workspace/coverage/default/44.clkmgr_stress_all.2882292802 |
|
|
Apr 30 02:38:30 PM PDT 24 |
Apr 30 02:39:04 PM PDT 24 |
6399800566 ps |
T842 |
/workspace/coverage/default/34.clkmgr_clk_handshake_intersig_mubi.548214545 |
|
|
Apr 30 02:38:02 PM PDT 24 |
Apr 30 02:38:04 PM PDT 24 |
39442013 ps |
T843 |
/workspace/coverage/default/24.clkmgr_trans.42155897 |
|
|
Apr 30 02:37:27 PM PDT 24 |
Apr 30 02:37:29 PM PDT 24 |
94846406 ps |
T844 |
/workspace/coverage/default/16.clkmgr_stress_all_with_rand_reset.604095603 |
|
|
Apr 30 02:36:58 PM PDT 24 |
Apr 30 02:43:40 PM PDT 24 |
71356931359 ps |
T845 |
/workspace/coverage/default/8.clkmgr_idle_intersig_mubi.1316382267 |
|
|
Apr 30 02:36:23 PM PDT 24 |
Apr 30 02:36:24 PM PDT 24 |
56625101 ps |
T846 |
/workspace/coverage/default/47.clkmgr_regwen.1152818175 |
|
|
Apr 30 02:38:39 PM PDT 24 |
Apr 30 02:38:42 PM PDT 24 |
532291804 ps |
T847 |
/workspace/coverage/default/42.clkmgr_stress_all.1006902741 |
|
|
Apr 30 02:38:22 PM PDT 24 |
Apr 30 02:38:23 PM PDT 24 |
91815211 ps |
T52 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.1078418040 |
|
|
Apr 30 02:24:17 PM PDT 24 |
Apr 30 02:24:20 PM PDT 24 |
206720515 ps |
T78 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1439937207 |
|
|
Apr 30 02:24:33 PM PDT 24 |
Apr 30 02:24:34 PM PDT 24 |
39120535 ps |
T79 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.1132205132 |
|
|
Apr 30 02:24:48 PM PDT 24 |
Apr 30 02:24:50 PM PDT 24 |
68127726 ps |
T53 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.840740965 |
|
|
Apr 30 02:25:20 PM PDT 24 |
Apr 30 02:25:24 PM PDT 24 |
114619220 ps |
T848 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.2021165316 |
|
|
Apr 30 02:24:40 PM PDT 24 |
Apr 30 02:24:42 PM PDT 24 |
46398681 ps |
T849 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.1631260741 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
90736436 ps |
T850 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.69744851 |
|
|
Apr 30 02:24:34 PM PDT 24 |
Apr 30 02:24:35 PM PDT 24 |
73609289 ps |
T55 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.458136916 |
|
|
Apr 30 02:25:18 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
87043264 ps |
T851 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.1586339805 |
|
|
Apr 30 02:24:41 PM PDT 24 |
Apr 30 02:24:43 PM PDT 24 |
57207789 ps |
T852 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3766338678 |
|
|
Apr 30 02:24:17 PM PDT 24 |
Apr 30 02:24:22 PM PDT 24 |
228970523 ps |
T94 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.930979542 |
|
|
Apr 30 02:24:32 PM PDT 24 |
Apr 30 02:24:34 PM PDT 24 |
50506534 ps |
T853 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.4052439968 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
36209259 ps |
T95 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2007321707 |
|
|
Apr 30 02:25:06 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
238858940 ps |
T80 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1530873122 |
|
|
Apr 30 02:24:28 PM PDT 24 |
Apr 30 02:24:30 PM PDT 24 |
17622773 ps |
T854 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.1556176823 |
|
|
Apr 30 02:24:33 PM PDT 24 |
Apr 30 02:24:34 PM PDT 24 |
22121568 ps |
T855 |
/workspace/coverage/cover_reg_top/49.clkmgr_intr_test.1663961796 |
|
|
Apr 30 02:25:39 PM PDT 24 |
Apr 30 02:25:40 PM PDT 24 |
35732460 ps |
T54 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.2455234810 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
93687278 ps |
T56 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.704568553 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:28 PM PDT 24 |
347859139 ps |
T96 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2126736749 |
|
|
Apr 30 02:25:19 PM PDT 24 |
Apr 30 02:25:23 PM PDT 24 |
142549018 ps |
T81 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.1752709409 |
|
|
Apr 30 02:24:32 PM PDT 24 |
Apr 30 02:24:34 PM PDT 24 |
48969250 ps |
T82 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.2023375136 |
|
|
Apr 30 02:25:11 PM PDT 24 |
Apr 30 02:25:13 PM PDT 24 |
33458588 ps |
T856 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.3313013773 |
|
|
Apr 30 02:24:59 PM PDT 24 |
Apr 30 02:25:03 PM PDT 24 |
234524826 ps |
T857 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.2468009999 |
|
|
Apr 30 02:25:30 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
33481499 ps |
T858 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.849827325 |
|
|
Apr 30 02:24:57 PM PDT 24 |
Apr 30 02:25:02 PM PDT 24 |
509132891 ps |
T57 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.560058678 |
|
|
Apr 30 02:24:56 PM PDT 24 |
Apr 30 02:24:59 PM PDT 24 |
278503478 ps |
T859 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.4159360800 |
|
|
Apr 30 02:25:19 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
46455342 ps |
T860 |
/workspace/coverage/cover_reg_top/23.clkmgr_intr_test.3268903435 |
|
|
Apr 30 02:25:33 PM PDT 24 |
Apr 30 02:25:35 PM PDT 24 |
15850821 ps |
T861 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.410189017 |
|
|
Apr 30 02:25:27 PM PDT 24 |
Apr 30 02:25:30 PM PDT 24 |
187164617 ps |
T83 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3114236644 |
|
|
Apr 30 02:24:35 PM PDT 24 |
Apr 30 02:24:37 PM PDT 24 |
87939346 ps |
T60 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.3348665423 |
|
|
Apr 30 02:25:28 PM PDT 24 |
Apr 30 02:25:31 PM PDT 24 |
161607307 ps |
T862 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.2897053562 |
|
|
Apr 30 02:24:40 PM PDT 24 |
Apr 30 02:24:42 PM PDT 24 |
14761185 ps |
T863 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3249094413 |
|
|
Apr 30 02:24:42 PM PDT 24 |
Apr 30 02:24:44 PM PDT 24 |
40257974 ps |
T115 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.1224663150 |
|
|
Apr 30 02:25:22 PM PDT 24 |
Apr 30 02:25:25 PM PDT 24 |
154134205 ps |
T864 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.4266094160 |
|
|
Apr 30 02:24:56 PM PDT 24 |
Apr 30 02:24:59 PM PDT 24 |
118928708 ps |
T865 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.2016208299 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
14650402 ps |
T866 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.161612553 |
|
|
Apr 30 02:24:55 PM PDT 24 |
Apr 30 02:24:58 PM PDT 24 |
65043239 ps |
T867 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.3453477376 |
|
|
Apr 30 02:25:38 PM PDT 24 |
Apr 30 02:25:39 PM PDT 24 |
36150411 ps |
T868 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.2570177361 |
|
|
Apr 30 02:25:08 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
32923022 ps |
T869 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2611569209 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
260284943 ps |
T58 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.3858125919 |
|
|
Apr 30 02:25:12 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
603242260 ps |
T870 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2922640187 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
38062398 ps |
T59 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.2063397803 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:32 PM PDT 24 |
108539171 ps |
T871 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.1616006445 |
|
|
Apr 30 02:25:30 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
38424873 ps |
T872 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.3388169873 |
|
|
Apr 30 02:25:36 PM PDT 24 |
Apr 30 02:25:37 PM PDT 24 |
20040036 ps |
T173 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.2147846796 |
|
|
Apr 30 02:25:17 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
72307123 ps |
T873 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2244024135 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:26 PM PDT 24 |
35836318 ps |
T112 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3232081496 |
|
|
Apr 30 02:25:19 PM PDT 24 |
Apr 30 02:25:24 PM PDT 24 |
527425606 ps |
T99 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.986915341 |
|
|
Apr 30 02:25:12 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
173334616 ps |
T874 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.1373498148 |
|
|
Apr 30 02:24:32 PM PDT 24 |
Apr 30 02:24:34 PM PDT 24 |
18731056 ps |
T875 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.245039814 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
12668942 ps |
T876 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.3868050131 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
39544896 ps |
T877 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.3406787679 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
46250509 ps |
T878 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.633668736 |
|
|
Apr 30 02:24:19 PM PDT 24 |
Apr 30 02:24:20 PM PDT 24 |
12173092 ps |
T879 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1236433560 |
|
|
Apr 30 02:25:18 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
52396413 ps |
T880 |
/workspace/coverage/cover_reg_top/18.clkmgr_intr_test.3317665526 |
|
|
Apr 30 02:25:28 PM PDT 24 |
Apr 30 02:25:30 PM PDT 24 |
10943476 ps |
T881 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.399433579 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:15 PM PDT 24 |
12618799 ps |
T882 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.3408257480 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:15 PM PDT 24 |
28569077 ps |
T883 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.2918134260 |
|
|
Apr 30 02:25:17 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
32529767 ps |
T884 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.3053588552 |
|
|
Apr 30 02:25:06 PM PDT 24 |
Apr 30 02:25:11 PM PDT 24 |
900118109 ps |
T105 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.500963335 |
|
|
Apr 30 02:25:18 PM PDT 24 |
Apr 30 02:25:23 PM PDT 24 |
304782096 ps |
T885 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.3738319861 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:26 PM PDT 24 |
29651702 ps |
T886 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.2124082391 |
|
|
Apr 30 02:24:47 PM PDT 24 |
Apr 30 02:24:49 PM PDT 24 |
52998135 ps |
T119 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1630969341 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:32 PM PDT 24 |
73041907 ps |
T887 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.3461082984 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
118315440 ps |
T888 |
/workspace/coverage/cover_reg_top/47.clkmgr_intr_test.3306906363 |
|
|
Apr 30 02:25:39 PM PDT 24 |
Apr 30 02:25:41 PM PDT 24 |
65176091 ps |
T123 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.12842938 |
|
|
Apr 30 02:25:06 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
70506107 ps |
T889 |
/workspace/coverage/cover_reg_top/13.clkmgr_intr_test.46259475 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
25955538 ps |
T890 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.2496673788 |
|
|
Apr 30 02:25:40 PM PDT 24 |
Apr 30 02:25:41 PM PDT 24 |
23586177 ps |
T891 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.1805527469 |
|
|
Apr 30 02:24:43 PM PDT 24 |
Apr 30 02:24:45 PM PDT 24 |
18580918 ps |
T892 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.2438016063 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:19 PM PDT 24 |
132125268 ps |
T893 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.778226334 |
|
|
Apr 30 02:24:47 PM PDT 24 |
Apr 30 02:24:50 PM PDT 24 |
89589065 ps |
T894 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.1488965906 |
|
|
Apr 30 02:24:19 PM PDT 24 |
Apr 30 02:24:20 PM PDT 24 |
56169344 ps |
T106 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.3741776929 |
|
|
Apr 30 02:25:16 PM PDT 24 |
Apr 30 02:25:19 PM PDT 24 |
65290651 ps |
T895 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.2804071907 |
|
|
Apr 30 02:25:25 PM PDT 24 |
Apr 30 02:25:26 PM PDT 24 |
46536562 ps |
T896 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.2216227395 |
|
|
Apr 30 02:25:21 PM PDT 24 |
Apr 30 02:25:23 PM PDT 24 |
18075980 ps |
T897 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.1202926219 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
180316419 ps |
T898 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.798832459 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:26 PM PDT 24 |
67300927 ps |
T899 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.1082436812 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
162193946 ps |
T125 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.1930686916 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
388211772 ps |
T900 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.769263238 |
|
|
Apr 30 02:25:09 PM PDT 24 |
Apr 30 02:25:11 PM PDT 24 |
75883955 ps |
T113 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.2425775002 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
57547909 ps |
T901 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.4174355804 |
|
|
Apr 30 02:25:34 PM PDT 24 |
Apr 30 02:25:35 PM PDT 24 |
28998401 ps |
T902 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.3918366677 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
76067889 ps |
T903 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.652024400 |
|
|
Apr 30 02:24:48 PM PDT 24 |
Apr 30 02:24:50 PM PDT 24 |
25461623 ps |
T904 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3272802010 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
406991080 ps |
T905 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.3991851733 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
12209916 ps |
T906 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.628752726 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:31 PM PDT 24 |
170426586 ps |
T907 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.2261883833 |
|
|
Apr 30 02:25:20 PM PDT 24 |
Apr 30 02:25:22 PM PDT 24 |
33418053 ps |
T116 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.2900644003 |
|
|
Apr 30 02:24:50 PM PDT 24 |
Apr 30 02:24:54 PM PDT 24 |
497040264 ps |
T908 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.2922010953 |
|
|
Apr 30 02:24:39 PM PDT 24 |
Apr 30 02:24:41 PM PDT 24 |
111780120 ps |
T117 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.2202280524 |
|
|
Apr 30 02:24:39 PM PDT 24 |
Apr 30 02:24:42 PM PDT 24 |
91244879 ps |
T909 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.2935714500 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:31 PM PDT 24 |
25801393 ps |
T910 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.3357339175 |
|
|
Apr 30 02:24:40 PM PDT 24 |
Apr 30 02:24:42 PM PDT 24 |
34775065 ps |
T911 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.989981667 |
|
|
Apr 30 02:25:08 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
94375742 ps |
T912 |
/workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.1735295962 |
|
|
Apr 30 02:24:55 PM PDT 24 |
Apr 30 02:24:56 PM PDT 24 |
29093907 ps |
T913 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.3664357959 |
|
|
Apr 30 02:25:09 PM PDT 24 |
Apr 30 02:25:11 PM PDT 24 |
17083404 ps |
T914 |
/workspace/coverage/cover_reg_top/40.clkmgr_intr_test.2163608310 |
|
|
Apr 30 02:25:32 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
17471640 ps |
T915 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.4252690143 |
|
|
Apr 30 02:25:33 PM PDT 24 |
Apr 30 02:25:34 PM PDT 24 |
54694610 ps |
T916 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.379222252 |
|
|
Apr 30 02:24:41 PM PDT 24 |
Apr 30 02:24:43 PM PDT 24 |
46976074 ps |
T917 |
/workspace/coverage/cover_reg_top/38.clkmgr_intr_test.4273538289 |
|
|
Apr 30 02:25:30 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
16910016 ps |
T918 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.3911865043 |
|
|
Apr 30 02:24:43 PM PDT 24 |
Apr 30 02:24:46 PM PDT 24 |
196411592 ps |
T919 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.274627142 |
|
|
Apr 30 02:25:21 PM PDT 24 |
Apr 30 02:25:25 PM PDT 24 |
239979495 ps |
T920 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.2590294193 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
27101449 ps |
T114 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.2283473940 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
54827674 ps |
T121 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.3493296055 |
|
|
Apr 30 02:24:55 PM PDT 24 |
Apr 30 02:24:58 PM PDT 24 |
245041416 ps |
T921 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.1311836700 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
18366334 ps |
T922 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3640517282 |
|
|
Apr 30 02:25:30 PM PDT 24 |
Apr 30 02:25:31 PM PDT 24 |
54725183 ps |
T118 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.1510980138 |
|
|
Apr 30 02:24:48 PM PDT 24 |
Apr 30 02:24:51 PM PDT 24 |
338349801 ps |
T923 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.2494824632 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:27 PM PDT 24 |
140448968 ps |
T100 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.370326430 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:15 PM PDT 24 |
61601927 ps |
T122 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.915384846 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
172572450 ps |
T924 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3796259208 |
|
|
Apr 30 02:25:23 PM PDT 24 |
Apr 30 02:25:25 PM PDT 24 |
35831869 ps |
T120 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.776754232 |
|
|
Apr 30 02:24:49 PM PDT 24 |
Apr 30 02:24:51 PM PDT 24 |
65584024 ps |
T925 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.3962939934 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
42135101 ps |
T926 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.3792095337 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:32 PM PDT 24 |
115035427 ps |
T927 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.3675528810 |
|
|
Apr 30 02:24:49 PM PDT 24 |
Apr 30 02:24:50 PM PDT 24 |
11100073 ps |
T928 |
/workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.2038529391 |
|
|
Apr 30 02:24:48 PM PDT 24 |
Apr 30 02:24:50 PM PDT 24 |
237560346 ps |
T929 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.3113744122 |
|
|
Apr 30 02:25:06 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
197589920 ps |
T930 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.192954780 |
|
|
Apr 30 02:24:21 PM PDT 24 |
Apr 30 02:24:22 PM PDT 24 |
76882387 ps |
T931 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.3663625739 |
|
|
Apr 30 02:24:41 PM PDT 24 |
Apr 30 02:24:42 PM PDT 24 |
21321986 ps |
T932 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.3653810537 |
|
|
Apr 30 02:25:30 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
74566645 ps |
T124 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.3701394466 |
|
|
Apr 30 02:24:56 PM PDT 24 |
Apr 30 02:24:58 PM PDT 24 |
94500040 ps |
T101 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.623694952 |
|
|
Apr 30 02:25:06 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
554236025 ps |
T933 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2885829079 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:16 PM PDT 24 |
216865246 ps |
T934 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1425370624 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:10 PM PDT 24 |
94383940 ps |
T935 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.3399951463 |
|
|
Apr 30 02:25:21 PM PDT 24 |
Apr 30 02:25:23 PM PDT 24 |
57020113 ps |
T936 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.3017682415 |
|
|
Apr 30 02:25:06 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
179676735 ps |
T937 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.2119682273 |
|
|
Apr 30 02:25:26 PM PDT 24 |
Apr 30 02:25:28 PM PDT 24 |
55438157 ps |
T126 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.288739793 |
|
|
Apr 30 02:24:40 PM PDT 24 |
Apr 30 02:24:43 PM PDT 24 |
105179883 ps |
T938 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1526844998 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:31 PM PDT 24 |
138513561 ps |
T939 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.884256044 |
|
|
Apr 30 02:25:17 PM PDT 24 |
Apr 30 02:25:20 PM PDT 24 |
132820154 ps |
T940 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3054553189 |
|
|
Apr 30 02:25:12 PM PDT 24 |
Apr 30 02:25:14 PM PDT 24 |
42093201 ps |
T941 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.3391364383 |
|
|
Apr 30 02:24:50 PM PDT 24 |
Apr 30 02:24:51 PM PDT 24 |
17911791 ps |
T942 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.3233755833 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
279012256 ps |
T943 |
/workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.851704902 |
|
|
Apr 30 02:24:48 PM PDT 24 |
Apr 30 02:24:50 PM PDT 24 |
57139308 ps |
T944 |
/workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.638352279 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
38192590 ps |
T945 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.862812771 |
|
|
Apr 30 02:25:07 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
51169331 ps |
T946 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.1645311787 |
|
|
Apr 30 02:24:35 PM PDT 24 |
Apr 30 02:24:38 PM PDT 24 |
33556539 ps |
T947 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.2282785585 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:31 PM PDT 24 |
21348351 ps |
T948 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.2776633052 |
|
|
Apr 30 02:25:19 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
14145893 ps |
T949 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.1011882084 |
|
|
Apr 30 02:24:56 PM PDT 24 |
Apr 30 02:24:57 PM PDT 24 |
10847603 ps |
T950 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.2623474207 |
|
|
Apr 30 02:24:40 PM PDT 24 |
Apr 30 02:24:43 PM PDT 24 |
128137570 ps |
T951 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1948779568 |
|
|
Apr 30 02:25:16 PM PDT 24 |
Apr 30 02:25:20 PM PDT 24 |
130270068 ps |
T952 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.2395572807 |
|
|
Apr 30 02:24:56 PM PDT 24 |
Apr 30 02:24:59 PM PDT 24 |
144066247 ps |
T953 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.793991815 |
|
|
Apr 30 02:25:19 PM PDT 24 |
Apr 30 02:25:22 PM PDT 24 |
19572267 ps |
T954 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.4228413534 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
14295835 ps |
T103 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1118892780 |
|
|
Apr 30 02:24:49 PM PDT 24 |
Apr 30 02:24:53 PM PDT 24 |
387975251 ps |
T955 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.222492306 |
|
|
Apr 30 02:24:18 PM PDT 24 |
Apr 30 02:24:20 PM PDT 24 |
58908370 ps |
T956 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.3684309732 |
|
|
Apr 30 02:24:33 PM PDT 24 |
Apr 30 02:24:37 PM PDT 24 |
215474553 ps |
T957 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.3007069809 |
|
|
Apr 30 02:24:47 PM PDT 24 |
Apr 30 02:24:49 PM PDT 24 |
480624369 ps |
T958 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.171939171 |
|
|
Apr 30 02:25:32 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
19525606 ps |
T959 |
/workspace/coverage/cover_reg_top/7.clkmgr_intr_test.835399513 |
|
|
Apr 30 02:24:56 PM PDT 24 |
Apr 30 02:24:57 PM PDT 24 |
54379871 ps |
T960 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.2434100877 |
|
|
Apr 30 02:25:05 PM PDT 24 |
Apr 30 02:25:09 PM PDT 24 |
132029251 ps |
T961 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3203733864 |
|
|
Apr 30 02:24:40 PM PDT 24 |
Apr 30 02:24:51 PM PDT 24 |
548062165 ps |
T962 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.68833217 |
|
|
Apr 30 02:24:41 PM PDT 24 |
Apr 30 02:24:43 PM PDT 24 |
157405452 ps |
T963 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.1848011585 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:15 PM PDT 24 |
15094803 ps |
T964 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.3343425410 |
|
|
Apr 30 02:25:20 PM PDT 24 |
Apr 30 02:25:22 PM PDT 24 |
37387657 ps |
T965 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.1501257657 |
|
|
Apr 30 02:25:39 PM PDT 24 |
Apr 30 02:25:40 PM PDT 24 |
29898138 ps |
T966 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1428901672 |
|
|
Apr 30 02:24:35 PM PDT 24 |
Apr 30 02:24:36 PM PDT 24 |
66520642 ps |
T967 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.163883730 |
|
|
Apr 30 02:25:37 PM PDT 24 |
Apr 30 02:25:38 PM PDT 24 |
14196052 ps |
T968 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.4055508960 |
|
|
Apr 30 02:25:28 PM PDT 24 |
Apr 30 02:25:29 PM PDT 24 |
32787684 ps |
T969 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.474914323 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
297962580 ps |
T970 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1987277440 |
|
|
Apr 30 02:25:17 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
111494568 ps |
T127 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.2304085872 |
|
|
Apr 30 02:25:17 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
70430417 ps |
T971 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.130761257 |
|
|
Apr 30 02:25:37 PM PDT 24 |
Apr 30 02:25:38 PM PDT 24 |
24097474 ps |
T972 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.1788005844 |
|
|
Apr 30 02:25:32 PM PDT 24 |
Apr 30 02:25:33 PM PDT 24 |
36020643 ps |
T973 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.1074538204 |
|
|
Apr 30 02:25:08 PM PDT 24 |
Apr 30 02:25:11 PM PDT 24 |
330276319 ps |
T974 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.220987497 |
|
|
Apr 30 02:24:34 PM PDT 24 |
Apr 30 02:24:44 PM PDT 24 |
985393942 ps |
T975 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.1431128439 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:15 PM PDT 24 |
72961367 ps |
T976 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.217461878 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:27 PM PDT 24 |
345108781 ps |
T977 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3835082707 |
|
|
Apr 30 02:24:19 PM PDT 24 |
Apr 30 02:24:23 PM PDT 24 |
375115267 ps |
T978 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.1421088713 |
|
|
Apr 30 02:24:34 PM PDT 24 |
Apr 30 02:24:36 PM PDT 24 |
137985894 ps |
T979 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.1947118102 |
|
|
Apr 30 02:25:13 PM PDT 24 |
Apr 30 02:25:15 PM PDT 24 |
28664785 ps |
T980 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.555923515 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
26890529 ps |
T981 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.3951371602 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:29 PM PDT 24 |
567079646 ps |
T982 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.2406967473 |
|
|
Apr 30 02:25:15 PM PDT 24 |
Apr 30 02:25:17 PM PDT 24 |
11248686 ps |
T983 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.2523667379 |
|
|
Apr 30 02:25:20 PM PDT 24 |
Apr 30 02:25:23 PM PDT 24 |
109794754 ps |
T984 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.2437213208 |
|
|
Apr 30 02:24:34 PM PDT 24 |
Apr 30 02:24:38 PM PDT 24 |
410451912 ps |
T985 |
/workspace/coverage/cover_reg_top/5.clkmgr_intr_test.2153784727 |
|
|
Apr 30 02:24:46 PM PDT 24 |
Apr 30 02:24:47 PM PDT 24 |
36823732 ps |
T986 |
/workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1575111239 |
|
|
Apr 30 02:25:21 PM PDT 24 |
Apr 30 02:25:24 PM PDT 24 |
91094158 ps |
T987 |
/workspace/coverage/cover_reg_top/24.clkmgr_intr_test.2292558687 |
|
|
Apr 30 02:25:31 PM PDT 24 |
Apr 30 02:25:32 PM PDT 24 |
61757480 ps |
T988 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.4104649177 |
|
|
Apr 30 02:25:27 PM PDT 24 |
Apr 30 02:25:30 PM PDT 24 |
182888044 ps |
T989 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.1181553070 |
|
|
Apr 30 02:25:08 PM PDT 24 |
Apr 30 02:25:11 PM PDT 24 |
202665858 ps |
T990 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.504594950 |
|
|
Apr 30 02:24:49 PM PDT 24 |
Apr 30 02:24:51 PM PDT 24 |
34624629 ps |
T991 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.2492256098 |
|
|
Apr 30 02:24:28 PM PDT 24 |
Apr 30 02:24:29 PM PDT 24 |
17621519 ps |
T992 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.682181149 |
|
|
Apr 30 02:25:14 PM PDT 24 |
Apr 30 02:25:18 PM PDT 24 |
152658416 ps |
T993 |
/workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.2357013503 |
|
|
Apr 30 02:24:41 PM PDT 24 |
Apr 30 02:24:42 PM PDT 24 |
87478945 ps |
T994 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.742037030 |
|
|
Apr 30 02:25:32 PM PDT 24 |
Apr 30 02:25:34 PM PDT 24 |
26367470 ps |
T995 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.81469296 |
|
|
Apr 30 02:25:24 PM PDT 24 |
Apr 30 02:25:26 PM PDT 24 |
33496546 ps |
T996 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2534454407 |
|
|
Apr 30 02:25:18 PM PDT 24 |
Apr 30 02:25:21 PM PDT 24 |
81822400 ps |
T997 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2890620400 |
|
|
Apr 30 02:24:47 PM PDT 24 |
Apr 30 02:24:55 PM PDT 24 |
429607956 ps |
T998 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.136739016 |
|
|
Apr 30 02:24:29 PM PDT 24 |
Apr 30 02:24:31 PM PDT 24 |
145576586 ps |
T104 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1267248695 |
|
|
Apr 30 02:24:19 PM PDT 24 |
Apr 30 02:24:21 PM PDT 24 |
99566015 ps |
T999 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.2431708038 |
|
|
Apr 30 02:25:25 PM PDT 24 |
Apr 30 02:25:26 PM PDT 24 |
15845308 ps |
T1000 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.1713272753 |
|
|
Apr 30 02:25:10 PM PDT 24 |
Apr 30 02:25:14 PM PDT 24 |
293725096 ps |