Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.50 99.15 95.75 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1009
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T792 /workspace/coverage/default/3.clkmgr_div_intersig_mubi.2899755992 May 05 01:06:06 PM PDT 24 May 05 01:06:07 PM PDT 24 24634384 ps
T793 /workspace/coverage/default/18.clkmgr_clk_handshake_intersig_mubi.3365440623 May 05 01:06:55 PM PDT 24 May 05 01:06:56 PM PDT 24 28639187 ps
T794 /workspace/coverage/default/21.clkmgr_peri.3070487979 May 05 01:07:00 PM PDT 24 May 05 01:07:01 PM PDT 24 16101176 ps
T795 /workspace/coverage/default/12.clkmgr_alert_test.741367779 May 05 01:06:26 PM PDT 24 May 05 01:06:28 PM PDT 24 21605199 ps
T796 /workspace/coverage/default/3.clkmgr_lc_clk_byp_req_intersig_mubi.344988864 May 05 01:06:00 PM PDT 24 May 05 01:06:01 PM PDT 24 19954000 ps
T797 /workspace/coverage/default/37.clkmgr_trans.1792522523 May 05 01:07:43 PM PDT 24 May 05 01:07:44 PM PDT 24 39924492 ps
T798 /workspace/coverage/default/49.clkmgr_frequency.3216908493 May 05 01:08:41 PM PDT 24 May 05 01:08:54 PM PDT 24 1635204996 ps
T799 /workspace/coverage/default/4.clkmgr_lc_clk_byp_req_intersig_mubi.2623573264 May 05 01:06:21 PM PDT 24 May 05 01:06:23 PM PDT 24 34846424 ps
T800 /workspace/coverage/default/8.clkmgr_lc_clk_byp_req_intersig_mubi.1328663866 May 05 01:06:17 PM PDT 24 May 05 01:06:19 PM PDT 24 16344110 ps
T801 /workspace/coverage/default/9.clkmgr_frequency.195916483 May 05 01:06:22 PM PDT 24 May 05 01:06:35 PM PDT 24 1635808681 ps
T802 /workspace/coverage/default/11.clkmgr_idle_intersig_mubi.1700892988 May 05 01:06:26 PM PDT 24 May 05 01:06:28 PM PDT 24 43302160 ps
T803 /workspace/coverage/default/10.clkmgr_lc_ctrl_intersig_mubi.2948652128 May 05 01:06:23 PM PDT 24 May 05 01:06:26 PM PDT 24 32029465 ps
T804 /workspace/coverage/default/21.clkmgr_frequency_timeout.3393125016 May 05 01:07:08 PM PDT 24 May 05 01:07:25 PM PDT 24 2299051656 ps
T805 /workspace/coverage/default/31.clkmgr_idle_intersig_mubi.2075761788 May 05 01:07:26 PM PDT 24 May 05 01:07:27 PM PDT 24 27638398 ps
T806 /workspace/coverage/default/23.clkmgr_frequency.3844856946 May 05 01:07:07 PM PDT 24 May 05 01:07:10 PM PDT 24 572076728 ps
T807 /workspace/coverage/default/25.clkmgr_idle_intersig_mubi.1944653220 May 05 01:07:10 PM PDT 24 May 05 01:07:13 PM PDT 24 148858778 ps
T808 /workspace/coverage/default/12.clkmgr_stress_all.1295387350 May 05 01:06:27 PM PDT 24 May 05 01:06:58 PM PDT 24 9346416991 ps
T809 /workspace/coverage/default/46.clkmgr_frequency_timeout.3289867783 May 05 01:08:08 PM PDT 24 May 05 01:08:31 PM PDT 24 1820018493 ps
T810 /workspace/coverage/default/14.clkmgr_lc_ctrl_intersig_mubi.3688487830 May 05 01:06:34 PM PDT 24 May 05 01:06:35 PM PDT 24 29368436 ps
T811 /workspace/coverage/default/9.clkmgr_lc_ctrl_intersig_mubi.3953509260 May 05 01:06:20 PM PDT 24 May 05 01:06:22 PM PDT 24 29631371 ps
T812 /workspace/coverage/default/8.clkmgr_clk_handshake_intersig_mubi.4086807227 May 05 01:06:21 PM PDT 24 May 05 01:06:23 PM PDT 24 29930929 ps
T813 /workspace/coverage/default/37.clkmgr_smoke.1968699203 May 05 01:07:42 PM PDT 24 May 05 01:07:43 PM PDT 24 23757355 ps
T814 /workspace/coverage/default/4.clkmgr_clk_handshake_intersig_mubi.2310414220 May 05 01:06:08 PM PDT 24 May 05 01:06:10 PM PDT 24 103725248 ps
T815 /workspace/coverage/default/48.clkmgr_peri.435796204 May 05 01:08:38 PM PDT 24 May 05 01:08:39 PM PDT 24 33515573 ps
T816 /workspace/coverage/default/41.clkmgr_stress_all.869208228 May 05 01:08:00 PM PDT 24 May 05 01:08:26 PM PDT 24 6286953855 ps
T817 /workspace/coverage/default/22.clkmgr_div_intersig_mubi.3421964238 May 05 01:07:09 PM PDT 24 May 05 01:07:11 PM PDT 24 15491041 ps
T818 /workspace/coverage/default/45.clkmgr_frequency.325596127 May 05 01:08:02 PM PDT 24 May 05 01:08:05 PM PDT 24 201777879 ps
T819 /workspace/coverage/default/24.clkmgr_clk_handshake_intersig_mubi.4259625120 May 05 01:07:01 PM PDT 24 May 05 01:07:03 PM PDT 24 91221519 ps
T820 /workspace/coverage/default/27.clkmgr_smoke.2203562667 May 05 01:07:08 PM PDT 24 May 05 01:07:10 PM PDT 24 16996116 ps
T821 /workspace/coverage/default/38.clkmgr_smoke.2717642287 May 05 01:07:40 PM PDT 24 May 05 01:07:41 PM PDT 24 24402386 ps
T822 /workspace/coverage/default/11.clkmgr_frequency.2127517996 May 05 01:06:25 PM PDT 24 May 05 01:06:31 PM PDT 24 559544344 ps
T823 /workspace/coverage/default/11.clkmgr_extclk.4179611313 May 05 01:06:22 PM PDT 24 May 05 01:06:25 PM PDT 24 62261995 ps
T824 /workspace/coverage/default/36.clkmgr_frequency.3504850720 May 05 01:07:45 PM PDT 24 May 05 01:07:52 PM PDT 24 1538514196 ps
T825 /workspace/coverage/default/30.clkmgr_frequency.526707397 May 05 01:07:21 PM PDT 24 May 05 01:07:35 PM PDT 24 2238245715 ps
T826 /workspace/coverage/default/0.clkmgr_smoke.583292663 May 05 01:06:01 PM PDT 24 May 05 01:06:03 PM PDT 24 62820948 ps
T827 /workspace/coverage/default/39.clkmgr_clk_status.1849193193 May 05 01:07:53 PM PDT 24 May 05 01:07:55 PM PDT 24 43696402 ps
T828 /workspace/coverage/default/25.clkmgr_smoke.42121543 May 05 01:07:01 PM PDT 24 May 05 01:07:03 PM PDT 24 62330700 ps
T829 /workspace/coverage/default/48.clkmgr_stress_all.3458671184 May 05 01:08:30 PM PDT 24 May 05 01:09:04 PM PDT 24 4591304406 ps
T830 /workspace/coverage/default/47.clkmgr_frequency.2892758529 May 05 01:08:18 PM PDT 24 May 05 01:08:29 PM PDT 24 2531850185 ps
T831 /workspace/coverage/default/49.clkmgr_div_intersig_mubi.1401554922 May 05 01:08:43 PM PDT 24 May 05 01:08:44 PM PDT 24 26712612 ps
T832 /workspace/coverage/default/5.clkmgr_stress_all.843431269 May 05 01:06:16 PM PDT 24 May 05 01:06:59 PM PDT 24 10702503300 ps
T833 /workspace/coverage/default/7.clkmgr_alert_test.628263893 May 05 01:06:16 PM PDT 24 May 05 01:06:17 PM PDT 24 21518263 ps
T834 /workspace/coverage/default/46.clkmgr_stress_all.400938817 May 05 01:08:25 PM PDT 24 May 05 01:08:55 PM PDT 24 8709239012 ps
T835 /workspace/coverage/default/21.clkmgr_idle_intersig_mubi.466372347 May 05 01:07:03 PM PDT 24 May 05 01:07:05 PM PDT 24 69625939 ps
T836 /workspace/coverage/default/27.clkmgr_idle_intersig_mubi.1407433823 May 05 01:07:14 PM PDT 24 May 05 01:07:16 PM PDT 24 59683350 ps
T837 /workspace/coverage/default/34.clkmgr_regwen.2914109085 May 05 01:07:40 PM PDT 24 May 05 01:07:47 PM PDT 24 962972573 ps
T838 /workspace/coverage/default/39.clkmgr_stress_all.900636151 May 05 01:07:47 PM PDT 24 May 05 01:08:31 PM PDT 24 6157685537 ps
T839 /workspace/coverage/default/41.clkmgr_peri.1119818122 May 05 01:07:56 PM PDT 24 May 05 01:07:58 PM PDT 24 15495460 ps
T840 /workspace/coverage/default/4.clkmgr_stress_all.4053767788 May 05 01:06:16 PM PDT 24 May 05 01:06:18 PM PDT 24 74220018 ps
T841 /workspace/coverage/default/10.clkmgr_idle_intersig_mubi.3702124768 May 05 01:06:29 PM PDT 24 May 05 01:06:31 PM PDT 24 30070742 ps
T842 /workspace/coverage/default/42.clkmgr_lc_ctrl_intersig_mubi.3123092812 May 05 01:08:01 PM PDT 24 May 05 01:08:03 PM PDT 24 91374949 ps
T843 /workspace/coverage/default/13.clkmgr_frequency.999611411 May 05 01:06:29 PM PDT 24 May 05 01:06:47 PM PDT 24 2242034635 ps
T844 /workspace/coverage/default/41.clkmgr_lc_clk_byp_req_intersig_mubi.1007679557 May 05 01:07:56 PM PDT 24 May 05 01:07:58 PM PDT 24 21124288 ps
T845 /workspace/coverage/default/36.clkmgr_lc_clk_byp_req_intersig_mubi.225527213 May 05 01:07:42 PM PDT 24 May 05 01:07:43 PM PDT 24 79454371 ps
T85 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1090548816 May 05 02:07:15 PM PDT 24 May 05 02:07:18 PM PDT 24 52930300 ps
T846 /workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.809745286 May 05 02:07:14 PM PDT 24 May 05 02:07:18 PM PDT 24 45632197 ps
T64 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.183848878 May 05 02:07:24 PM PDT 24 May 05 02:07:27 PM PDT 24 217080041 ps
T61 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.1950170375 May 05 02:07:25 PM PDT 24 May 05 02:07:28 PM PDT 24 233573587 ps
T847 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.1049065428 May 05 02:08:42 PM PDT 24 May 05 02:08:43 PM PDT 24 38513883 ps
T848 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.3081877308 May 05 02:07:46 PM PDT 24 May 05 02:07:48 PM PDT 24 12787855 ps
T113 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.1294330693 May 05 02:07:26 PM PDT 24 May 05 02:07:28 PM PDT 24 39677160 ps
T62 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.2807609065 May 05 02:07:17 PM PDT 24 May 05 02:07:21 PM PDT 24 165406983 ps
T108 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3464752706 May 05 02:08:11 PM PDT 24 May 05 02:08:13 PM PDT 24 63532535 ps
T109 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1357221331 May 05 02:07:51 PM PDT 24 May 05 02:07:55 PM PDT 24 291820549 ps
T849 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.4161892634 May 05 02:08:43 PM PDT 24 May 05 02:08:44 PM PDT 24 24831574 ps
T86 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.1999064695 May 05 02:07:12 PM PDT 24 May 05 02:07:14 PM PDT 24 22988417 ps
T110 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.2420329057 May 05 02:07:22 PM PDT 24 May 05 02:07:24 PM PDT 24 79017685 ps
T850 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.4073394042 May 05 02:08:27 PM PDT 24 May 05 02:08:28 PM PDT 24 16185791 ps
T72 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1923034042 May 05 02:08:24 PM PDT 24 May 05 02:08:26 PM PDT 24 111576707 ps
T87 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.49165831 May 05 02:08:02 PM PDT 24 May 05 02:08:04 PM PDT 24 133263838 ps
T851 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.3133129219 May 05 02:08:45 PM PDT 24 May 05 02:08:47 PM PDT 24 44724850 ps
T117 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.3260855075 May 05 02:08:20 PM PDT 24 May 05 02:08:23 PM PDT 24 253152893 ps
T88 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.4193993357 May 05 02:07:30 PM PDT 24 May 05 02:07:33 PM PDT 24 63208684 ps
T852 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.3844152555 May 05 02:08:48 PM PDT 24 May 05 02:08:49 PM PDT 24 10880426 ps
T853 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.2364409743 May 05 02:07:23 PM PDT 24 May 05 02:07:25 PM PDT 24 28161954 ps
T854 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.2607100747 May 05 02:07:49 PM PDT 24 May 05 02:07:51 PM PDT 24 257300818 ps
T63 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1076808888 May 05 02:07:51 PM PDT 24 May 05 02:07:54 PM PDT 24 159527327 ps
T118 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.1798066489 May 05 02:08:29 PM PDT 24 May 05 02:08:32 PM PDT 24 102034776 ps
T855 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.1726003292 May 05 02:07:55 PM PDT 24 May 05 02:07:56 PM PDT 24 36230958 ps
T89 /workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.3430110354 May 05 02:07:46 PM PDT 24 May 05 02:07:49 PM PDT 24 93505183 ps
T65 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1184650512 May 05 02:08:03 PM PDT 24 May 05 02:08:06 PM PDT 24 135949947 ps
T856 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.962273410 May 05 02:08:32 PM PDT 24 May 05 02:08:36 PM PDT 24 257976839 ps
T857 /workspace/coverage/cover_reg_top/24.clkmgr_intr_test.522047228 May 05 02:08:43 PM PDT 24 May 05 02:08:44 PM PDT 24 12357477 ps
T858 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.1866476621 May 05 02:08:39 PM PDT 24 May 05 02:08:41 PM PDT 24 57599284 ps
T111 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.852469318 May 05 02:07:31 PM PDT 24 May 05 02:07:35 PM PDT 24 198923738 ps
T859 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3990463740 May 05 02:08:08 PM PDT 24 May 05 02:08:10 PM PDT 24 48587256 ps
T860 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.1957118606 May 05 02:08:07 PM PDT 24 May 05 02:08:08 PM PDT 24 47428931 ps
T861 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.625206663 May 05 02:08:26 PM PDT 24 May 05 02:08:28 PM PDT 24 118170016 ps
T862 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.2581788693 May 05 02:08:33 PM PDT 24 May 05 02:08:34 PM PDT 24 11238551 ps
T863 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.1298425333 May 05 02:07:44 PM PDT 24 May 05 02:07:47 PM PDT 24 69535444 ps
T112 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2603543324 May 05 02:08:25 PM PDT 24 May 05 02:08:29 PM PDT 24 332830820 ps
T864 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.4220955405 May 05 02:08:19 PM PDT 24 May 05 02:08:21 PM PDT 24 85690958 ps
T865 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.4169251455 May 05 02:07:50 PM PDT 24 May 05 02:07:52 PM PDT 24 32508135 ps
T114 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.70884183 May 05 02:08:24 PM PDT 24 May 05 02:08:27 PM PDT 24 98417174 ps
T866 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.215776958 May 05 02:08:24 PM PDT 24 May 05 02:08:26 PM PDT 24 135513856 ps
T867 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.3661252950 May 05 02:07:43 PM PDT 24 May 05 02:07:49 PM PDT 24 373789549 ps
T115 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1780962929 May 05 02:07:48 PM PDT 24 May 05 02:07:51 PM PDT 24 247149450 ps
T868 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.2838689457 May 05 02:08:34 PM PDT 24 May 05 02:08:35 PM PDT 24 13172867 ps
T869 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.4039316873 May 05 02:07:44 PM PDT 24 May 05 02:07:47 PM PDT 24 45983919 ps
T870 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.840267667 May 05 02:07:51 PM PDT 24 May 05 02:07:53 PM PDT 24 13349213 ps
T871 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.314249022 May 05 02:08:39 PM PDT 24 May 05 02:08:42 PM PDT 24 295011503 ps
T872 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.1178000761 May 05 02:08:39 PM PDT 24 May 05 02:08:41 PM PDT 24 52725123 ps
T66 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3111688451 May 05 02:08:31 PM PDT 24 May 05 02:08:34 PM PDT 24 326812993 ps
T873 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.875915351 May 05 02:07:57 PM PDT 24 May 05 02:07:59 PM PDT 24 82168683 ps
T874 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.1154922926 May 05 02:07:51 PM PDT 24 May 05 02:07:52 PM PDT 24 23535691 ps
T875 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.3746866811 May 05 02:08:03 PM PDT 24 May 05 02:08:04 PM PDT 24 35872276 ps
T876 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.1981288887 May 05 02:07:55 PM PDT 24 May 05 02:07:58 PM PDT 24 45887710 ps
T116 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.849733548 May 05 02:07:08 PM PDT 24 May 05 02:07:11 PM PDT 24 205993741 ps
T877 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.1086140068 May 05 02:08:51 PM PDT 24 May 05 02:08:53 PM PDT 24 15149241 ps
T878 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.2059748998 May 05 02:08:11 PM PDT 24 May 05 02:08:12 PM PDT 24 37590277 ps
T879 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3005248831 May 05 02:07:12 PM PDT 24 May 05 02:07:14 PM PDT 24 153487431 ps
T880 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1513863658 May 05 02:07:49 PM PDT 24 May 05 02:07:53 PM PDT 24 359395878 ps
T881 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2110454778 May 05 02:08:08 PM PDT 24 May 05 02:08:11 PM PDT 24 82129384 ps
T70 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3672785683 May 05 02:08:06 PM PDT 24 May 05 02:08:08 PM PDT 24 90619607 ps
T882 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.2726364205 May 05 02:08:20 PM PDT 24 May 05 02:08:21 PM PDT 24 31310486 ps
T71 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.504659646 May 05 02:08:20 PM PDT 24 May 05 02:08:24 PM PDT 24 575118873 ps
T883 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.1409182241 May 05 02:08:03 PM PDT 24 May 05 02:08:05 PM PDT 24 41609558 ps
T884 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.2093806790 May 05 02:07:17 PM PDT 24 May 05 02:07:19 PM PDT 24 48113893 ps
T885 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.3757940810 May 05 02:08:20 PM PDT 24 May 05 02:08:21 PM PDT 24 38265157 ps
T886 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.1720347097 May 05 02:08:51 PM PDT 24 May 05 02:08:52 PM PDT 24 26344739 ps
T887 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.2279702997 May 05 02:08:33 PM PDT 24 May 05 02:08:34 PM PDT 24 41341072 ps
T128 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.981559272 May 05 02:07:11 PM PDT 24 May 05 02:07:13 PM PDT 24 146481703 ps
T888 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.1053656433 May 05 02:07:32 PM PDT 24 May 05 02:07:36 PM PDT 24 86228066 ps
T889 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2357307330 May 05 02:07:55 PM PDT 24 May 05 02:07:57 PM PDT 24 24603330 ps
T134 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.4267181165 May 05 02:07:55 PM PDT 24 May 05 02:07:56 PM PDT 24 57535901 ps
T69 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.100416665 May 05 02:08:15 PM PDT 24 May 05 02:08:16 PM PDT 24 54903391 ps
T73 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.2729635012 May 05 02:07:07 PM PDT 24 May 05 02:07:09 PM PDT 24 94308595 ps
T890 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.1625793880 May 05 02:08:43 PM PDT 24 May 05 02:08:44 PM PDT 24 23680423 ps
T891 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.3513155835 May 05 02:07:44 PM PDT 24 May 05 02:07:48 PM PDT 24 282764088 ps
T892 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.724720299 May 05 02:08:43 PM PDT 24 May 05 02:08:45 PM PDT 24 130730039 ps
T893 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.1451078757 May 05 02:08:25 PM PDT 24 May 05 02:08:26 PM PDT 24 24671379 ps
T894 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.4051095526 May 05 02:07:47 PM PDT 24 May 05 02:07:49 PM PDT 24 40555405 ps
T895 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.2601644719 May 05 02:08:47 PM PDT 24 May 05 02:08:48 PM PDT 24 11186531 ps
T896 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1770319471 May 05 02:08:03 PM PDT 24 May 05 02:08:05 PM PDT 24 225971378 ps
T897 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.869800399 May 05 02:07:49 PM PDT 24 May 05 02:07:50 PM PDT 24 45915741 ps
T67 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.2141848734 May 05 02:08:38 PM PDT 24 May 05 02:08:40 PM PDT 24 101711908 ps
T898 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.3922809704 May 05 02:08:43 PM PDT 24 May 05 02:08:44 PM PDT 24 33959834 ps
T899 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.537136558 May 05 02:07:26 PM PDT 24 May 05 02:07:29 PM PDT 24 97368053 ps
T900 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.1253180612 May 05 02:07:22 PM PDT 24 May 05 02:07:25 PM PDT 24 48394981 ps
T901 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.654873335 May 05 02:08:48 PM PDT 24 May 05 02:08:49 PM PDT 24 12383634 ps
T902 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.1740035636 May 05 02:08:57 PM PDT 24 May 05 02:08:58 PM PDT 24 20393361 ps
T129 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3156281655 May 05 02:07:46 PM PDT 24 May 05 02:07:50 PM PDT 24 277369220 ps
T903 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.769767176 May 05 02:07:11 PM PDT 24 May 05 02:07:15 PM PDT 24 411224748 ps
T130 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2656122144 May 05 02:08:17 PM PDT 24 May 05 02:08:20 PM PDT 24 250558326 ps
T904 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.2027579793 May 05 02:08:58 PM PDT 24 May 05 02:08:59 PM PDT 24 13634462 ps
T905 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1596488918 May 05 02:07:13 PM PDT 24 May 05 02:07:15 PM PDT 24 16689572 ps
T906 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.3755239396 May 05 02:07:31 PM PDT 24 May 05 02:07:33 PM PDT 24 64593113 ps
T907 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.1450962436 May 05 02:08:27 PM PDT 24 May 05 02:08:28 PM PDT 24 23801852 ps
T908 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3217451524 May 05 02:08:53 PM PDT 24 May 05 02:08:54 PM PDT 24 49012666 ps
T909 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3214427090 May 05 02:08:15 PM PDT 24 May 05 02:08:16 PM PDT 24 29866998 ps
T131 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3044732441 May 05 02:07:44 PM PDT 24 May 05 02:07:47 PM PDT 24 68675784 ps
T910 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.3183669235 May 05 02:07:44 PM PDT 24 May 05 02:07:47 PM PDT 24 33937835 ps
T911 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3997649787 May 05 02:07:31 PM PDT 24 May 05 02:07:36 PM PDT 24 616204144 ps
T912 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.1495317306 May 05 02:07:56 PM PDT 24 May 05 02:07:57 PM PDT 24 16109035 ps
T913 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.3107432282 May 05 02:07:12 PM PDT 24 May 05 02:07:14 PM PDT 24 152597868 ps
T914 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3738880525 May 05 02:08:29 PM PDT 24 May 05 02:08:33 PM PDT 24 751805956 ps
T915 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.1821677012 May 05 02:08:06 PM PDT 24 May 05 02:08:10 PM PDT 24 401096335 ps
T132 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.311123845 May 05 02:08:35 PM PDT 24 May 05 02:08:41 PM PDT 24 1104023127 ps
T916 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.3869104315 May 05 02:08:39 PM PDT 24 May 05 02:08:40 PM PDT 24 29412454 ps
T917 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.92123930 May 05 02:08:15 PM PDT 24 May 05 02:08:22 PM PDT 24 1361438093 ps
T68 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.184353285 May 05 02:08:31 PM PDT 24 May 05 02:08:33 PM PDT 24 95640952 ps
T918 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.234339866 May 05 02:08:47 PM PDT 24 May 05 02:08:49 PM PDT 24 18692310 ps
T919 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.2597740508 May 05 02:08:04 PM PDT 24 May 05 02:08:06 PM PDT 24 23543230 ps
T920 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3670799479 May 05 02:07:09 PM PDT 24 May 05 02:07:10 PM PDT 24 26176427 ps
T921 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.1919507571 May 05 02:07:31 PM PDT 24 May 05 02:07:34 PM PDT 24 243391818 ps
T922 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.744565700 May 05 02:07:17 PM PDT 24 May 05 02:07:19 PM PDT 24 83239406 ps
T923 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.814533900 May 05 02:08:23 PM PDT 24 May 05 02:08:25 PM PDT 24 72798909 ps
T924 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3713552084 May 05 02:08:14 PM PDT 24 May 05 02:08:16 PM PDT 24 76695226 ps
T925 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.4245590923 May 05 02:08:04 PM PDT 24 May 05 02:08:05 PM PDT 24 18694630 ps
T926 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3254242212 May 05 02:08:29 PM PDT 24 May 05 02:08:31 PM PDT 24 46494574 ps
T927 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.363737056 May 05 02:08:00 PM PDT 24 May 05 02:08:01 PM PDT 24 30772976 ps
T133 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.3657298197 May 05 02:08:11 PM PDT 24 May 05 02:08:13 PM PDT 24 185986287 ps
T928 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.4055514802 May 05 02:08:11 PM PDT 24 May 05 02:08:14 PM PDT 24 209556646 ps
T929 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.3497825971 May 05 02:08:39 PM PDT 24 May 05 02:08:40 PM PDT 24 37823916 ps
T930 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.1757829674 May 05 02:08:43 PM PDT 24 May 05 02:08:45 PM PDT 24 26387716 ps
T931 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.521056847 May 05 02:08:45 PM PDT 24 May 05 02:08:47 PM PDT 24 18144431 ps
T137 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.505783024 May 05 02:07:12 PM PDT 24 May 05 02:07:15 PM PDT 24 147713160 ps
T183 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.4279456707 May 05 02:08:19 PM PDT 24 May 05 02:08:22 PM PDT 24 98168070 ps
T932 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.2389983050 May 05 02:08:32 PM PDT 24 May 05 02:08:34 PM PDT 24 141309193 ps
T138 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.1307176371 May 05 02:07:52 PM PDT 24 May 05 02:07:54 PM PDT 24 66804231 ps
T933 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.4035357838 May 05 02:08:38 PM PDT 24 May 05 02:08:40 PM PDT 24 93119624 ps
T934 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.2702027814 May 05 02:08:51 PM PDT 24 May 05 02:08:52 PM PDT 24 38795523 ps
T935 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.891971044 May 05 02:08:26 PM PDT 24 May 05 02:08:28 PM PDT 24 116801070 ps
T936 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.2869016196 May 05 02:08:11 PM PDT 24 May 05 02:08:12 PM PDT 24 12555254 ps
T937 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.1003978843 May 05 02:08:29 PM PDT 24 May 05 02:08:30 PM PDT 24 19264394 ps
T938 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.1271543417 May 05 02:08:20 PM PDT 24 May 05 02:08:22 PM PDT 24 56241192 ps
T939 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.3452851906 May 05 02:08:56 PM PDT 24 May 05 02:08:57 PM PDT 24 14691463 ps
T940 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.3843553409 May 05 02:07:07 PM PDT 24 May 05 02:07:08 PM PDT 24 14238321 ps
T941 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.631591195 May 05 02:07:23 PM PDT 24 May 05 02:07:25 PM PDT 24 14322400 ps
T942 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.188478717 May 05 02:08:04 PM PDT 24 May 05 02:08:06 PM PDT 24 194747701 ps
T943 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.418374184 May 05 02:08:24 PM PDT 24 May 05 02:08:27 PM PDT 24 144250489 ps
T136 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.810626690 May 05 02:08:40 PM PDT 24 May 05 02:08:44 PM PDT 24 511900869 ps
T944 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.3391132120 May 05 02:08:29 PM PDT 24 May 05 02:08:32 PM PDT 24 126208151 ps
T945 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.1587093722 May 05 02:07:03 PM PDT 24 May 05 02:07:06 PM PDT 24 244514643 ps
T946 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.1109848779 May 05 02:08:56 PM PDT 24 May 05 02:08:57 PM PDT 24 14416768 ps
T947 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.626090712 May 05 02:08:26 PM PDT 24 May 05 02:08:28 PM PDT 24 210361408 ps
T135 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.3899575238 May 05 02:07:36 PM PDT 24 May 05 02:07:40 PM PDT 24 325001969 ps
T948 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.3332076760 May 05 02:08:30 PM PDT 24 May 05 02:08:31 PM PDT 24 15716345 ps
T949 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.466692263 May 05 02:08:45 PM PDT 24 May 05 02:08:46 PM PDT 24 34323204 ps
T950 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.236970579 May 05 02:08:46 PM PDT 24 May 05 02:08:47 PM PDT 24 25830460 ps
T951 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.3898296072 May 05 02:08:45 PM PDT 24 May 05 02:08:48 PM PDT 24 231866146 ps
T952 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.2758050034 May 05 02:08:43 PM PDT 24 May 05 02:08:44 PM PDT 24 69892909 ps
T953 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.3922096090 May 05 02:08:19 PM PDT 24 May 05 02:08:21 PM PDT 24 67185892 ps
T954 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.1271223070 May 05 02:08:49 PM PDT 24 May 05 02:08:50 PM PDT 24 28723305 ps
T955 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.1209983053 May 05 02:07:44 PM PDT 24 May 05 02:07:47 PM PDT 24 106970864 ps
T956 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.1375086155 May 05 02:08:45 PM PDT 24 May 05 02:08:46 PM PDT 24 14883120 ps
T957 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3129073094 May 05 02:07:35 PM PDT 24 May 05 02:07:40 PM PDT 24 387590606 ps
T958 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.4082990484 May 05 02:07:15 PM PDT 24 May 05 02:07:16 PM PDT 24 14184524 ps
T959 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.3807470506 May 05 02:08:52 PM PDT 24 May 05 02:08:53 PM PDT 24 22326213 ps
T960 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.803245614 May 05 02:07:43 PM PDT 24 May 05 02:07:45 PM PDT 24 20137411 ps
T961 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.156233948 May 05 02:07:06 PM PDT 24 May 05 02:07:08 PM PDT 24 37444727 ps
T962 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.3073964014 May 05 02:08:47 PM PDT 24 May 05 02:08:48 PM PDT 24 31970018 ps
T963 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.2080624562 May 05 02:07:37 PM PDT 24 May 05 02:07:40 PM PDT 24 161526372 ps
T964 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.2260606976 May 05 02:08:19 PM PDT 24 May 05 02:08:21 PM PDT 24 22796916 ps
T965 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.3817581145 May 05 02:07:32 PM PDT 24 May 05 02:07:34 PM PDT 24 24395736 ps
T966 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.996982292 May 05 02:07:17 PM PDT 24 May 05 02:07:20 PM PDT 24 224232049 ps
T967 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.1666163670 May 05 02:08:47 PM PDT 24 May 05 02:08:48 PM PDT 24 13725291 ps
T968 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.800678149 May 05 02:08:06 PM PDT 24 May 05 02:08:08 PM PDT 24 135400107 ps
T969 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.1054277740 May 05 02:07:50 PM PDT 24 May 05 02:07:54 PM PDT 24 410261024 ps
T970 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.3436856085 May 05 02:08:11 PM PDT 24 May 05 02:08:15 PM PDT 24 347277389 ps
T971 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.1566244763 May 05 02:07:21 PM PDT 24 May 05 02:07:23 PM PDT 24 25491614 ps
T972 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.3755347124 May 05 02:08:05 PM PDT 24 May 05 02:08:08 PM PDT 24 210183895 ps
T973 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.3566769619 May 05 02:08:48 PM PDT 24 May 05 02:08:49 PM PDT 24 19867581 ps
T974 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.198769452 May 05 02:07:44 PM PDT 24 May 05 02:07:49 PM PDT 24 432407460 ps
T975 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.617553403 May 05 02:08:24 PM PDT 24 May 05 02:08:25 PM PDT 24 54049243 ps
T976 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.3411935939 May 05 02:08:23 PM PDT 24 May 05 02:08:25 PM PDT 24 241346149 ps
T977 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.2917826179 May 05 02:07:24 PM PDT 24 May 05 02:07:25 PM PDT 24 14602228 ps
T978 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.1093639990 May 05 02:07:30 PM PDT 24 May 05 02:07:33 PM PDT 24 114052068 ps
T979 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.1602974474 May 05 02:07:29 PM PDT 24 May 05 02:07:39 PM PDT 24 532043561 ps
T980 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.4241437392 May 05 02:07:48 PM PDT 24 May 05 02:07:50 PM PDT 24 141125277 ps
T981 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.387370747 May 05 02:08:27 PM PDT 24 May 05 02:08:29 PM PDT 24 209854097 ps
T982 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.297367328 May 05 02:07:49 PM PDT 24 May 05 02:07:52 PM PDT 24 159869155 ps
T983 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.379850554 May 05 02:07:11 PM PDT 24 May 05 02:07:13 PM PDT 24 14983321 ps
T984 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.788760743 May 05 02:07:23 PM PDT 24 May 05 02:07:30 PM PDT 24 678463312 ps
T985 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.3351532102 May 05 02:07:53 PM PDT 24 May 05 02:07:55 PM PDT 24 42366834 ps
T986 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.203304751 May 05 02:08:05 PM PDT 24 May 05 02:08:07 PM PDT 24 15285158 ps
T987 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.1197741922 May 05 02:07:07 PM PDT 24 May 05 02:07:08 PM PDT 24 26454300 ps
T988 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.4161646516 May 05 02:08:58 PM PDT 24 May 05 02:08:59 PM PDT 24 12432774 ps
T989 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.873085445 May 05 02:08:30 PM PDT 24 May 05 02:08:32 PM PDT 24 62714197 ps
T990 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.1585749443 May 05 02:07:50 PM PDT 24 May 05 02:07:53 PM PDT 24 96752437 ps
T991 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.2505081373 May 05 02:07:50 PM PDT 24 May 05 02:07:53 PM PDT 24 161010412 ps
T992 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.207946242 May 05 02:08:30 PM PDT 24 May 05 02:08:32 PM PDT 24 69506214 ps
T993 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.3793343094 May 05 02:08:18 PM PDT 24 May 05 02:08:20 PM PDT 24 30732379 ps
T994 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.3326243787 May 05 02:08:32 PM PDT 24 May 05 02:08:34 PM PDT 24 107265083 ps
T995 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.520970272 May 05 02:08:52 PM PDT 24 May 05 02:08:53 PM PDT 24 38132161 ps
T996 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.1967587899 May 05 02:08:18 PM PDT 24 May 05 02:08:20 PM PDT 24 87133063 ps
T997 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.1598875930 May 05 02:08:25 PM PDT 24 May 05 02:08:28 PM PDT 24 134352460 ps
T998 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.139223477 May 05 02:07:55 PM PDT 24 May 05 02:07:57 PM PDT 24 125993960 ps
T999 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.3422974111 May 05 02:08:51 PM PDT 24 May 05 02:08:52 PM PDT 24 37668080 ps
T1000 /workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.2752729541 May 05 02:07:44 PM PDT 24 May 05 02:07:47 PM PDT 24 94224848 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%