Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.51 99.15 95.76 100.00 100.00 98.81 97.02 98.80


Total test records in report: 1009
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
T804 /workspace/coverage/default/31.clkmgr_trans.1005864494 May 23 03:18:08 PM PDT 24 May 23 03:18:14 PM PDT 24 198653086 ps
T805 /workspace/coverage/default/36.clkmgr_peri.2370502400 May 23 03:18:37 PM PDT 24 May 23 03:18:41 PM PDT 24 39912042 ps
T806 /workspace/coverage/default/44.clkmgr_div_intersig_mubi.1363444663 May 23 03:19:06 PM PDT 24 May 23 03:19:15 PM PDT 24 18813722 ps
T807 /workspace/coverage/default/25.clkmgr_idle_intersig_mubi.2513774589 May 23 03:17:31 PM PDT 24 May 23 03:17:34 PM PDT 24 21775042 ps
T808 /workspace/coverage/default/41.clkmgr_regwen.1075227828 May 23 03:18:57 PM PDT 24 May 23 03:19:12 PM PDT 24 1270757648 ps
T809 /workspace/coverage/default/42.clkmgr_div_intersig_mubi.916972163 May 23 03:19:05 PM PDT 24 May 23 03:19:14 PM PDT 24 80662582 ps
T810 /workspace/coverage/default/39.clkmgr_smoke.2383281552 May 23 03:18:51 PM PDT 24 May 23 03:18:58 PM PDT 24 54508264 ps
T811 /workspace/coverage/default/49.clkmgr_stress_all_with_rand_reset.2413527644 May 23 03:21:05 PM PDT 24 May 23 03:28:54 PM PDT 24 25921433601 ps
T812 /workspace/coverage/default/6.clkmgr_smoke.1216650589 May 23 03:15:19 PM PDT 24 May 23 03:15:23 PM PDT 24 51432345 ps
T813 /workspace/coverage/default/18.clkmgr_clk_handshake_intersig_mubi.2394955527 May 23 03:17:06 PM PDT 24 May 23 03:17:09 PM PDT 24 26314253 ps
T814 /workspace/coverage/default/1.clkmgr_peri.1780611268 May 23 03:14:29 PM PDT 24 May 23 03:14:31 PM PDT 24 16846071 ps
T815 /workspace/coverage/default/31.clkmgr_stress_all_with_rand_reset.4022860752 May 23 03:18:02 PM PDT 24 May 23 03:47:27 PM PDT 24 391366430944 ps
T816 /workspace/coverage/default/12.clkmgr_peri.3039273491 May 23 03:16:09 PM PDT 24 May 23 03:16:12 PM PDT 24 12928488 ps
T817 /workspace/coverage/default/23.clkmgr_regwen.2844713330 May 23 03:17:18 PM PDT 24 May 23 03:17:25 PM PDT 24 907668764 ps
T818 /workspace/coverage/default/38.clkmgr_smoke.2209537166 May 23 03:18:35 PM PDT 24 May 23 03:18:37 PM PDT 24 39090051 ps
T819 /workspace/coverage/default/31.clkmgr_stress_all.2355131088 May 23 03:18:06 PM PDT 24 May 23 03:18:12 PM PDT 24 183422338 ps
T820 /workspace/coverage/default/45.clkmgr_frequency_timeout.1890004832 May 23 03:19:09 PM PDT 24 May 23 03:19:27 PM PDT 24 1825522122 ps
T821 /workspace/coverage/default/16.clkmgr_clk_handshake_intersig_mubi.904360062 May 23 03:16:47 PM PDT 24 May 23 03:16:49 PM PDT 24 34731603 ps
T822 /workspace/coverage/default/44.clkmgr_frequency.2413218663 May 23 03:19:09 PM PDT 24 May 23 03:19:22 PM PDT 24 560575183 ps
T823 /workspace/coverage/default/22.clkmgr_idle_intersig_mubi.860073928 May 23 03:17:18 PM PDT 24 May 23 03:17:22 PM PDT 24 61769466 ps
T6 /workspace/coverage/default/9.clkmgr_regwen.428959351 May 23 03:15:48 PM PDT 24 May 23 03:15:55 PM PDT 24 1029582660 ps
T824 /workspace/coverage/default/14.clkmgr_peri.4144357381 May 23 03:16:30 PM PDT 24 May 23 03:16:33 PM PDT 24 17364542 ps
T825 /workspace/coverage/default/20.clkmgr_lc_ctrl_intersig_mubi.1490819308 May 23 03:17:03 PM PDT 24 May 23 03:17:06 PM PDT 24 77334664 ps
T7 /workspace/coverage/default/40.clkmgr_regwen.3741743766 May 23 03:18:52 PM PDT 24 May 23 03:19:04 PM PDT 24 1415548427 ps
T826 /workspace/coverage/default/31.clkmgr_clk_handshake_intersig_mubi.843523714 May 23 03:18:02 PM PDT 24 May 23 03:18:06 PM PDT 24 23186305 ps
T827 /workspace/coverage/default/46.clkmgr_frequency_timeout.1170750303 May 23 03:20:40 PM PDT 24 May 23 03:20:48 PM PDT 24 1043672457 ps
T153 /workspace/coverage/default/2.clkmgr_stress_all_with_rand_reset.2062416179 May 23 03:14:54 PM PDT 24 May 23 03:25:13 PM PDT 24 158208163168 ps
T828 /workspace/coverage/default/16.clkmgr_clk_status.3049454805 May 23 03:16:49 PM PDT 24 May 23 03:16:52 PM PDT 24 46954510 ps
T829 /workspace/coverage/default/2.clkmgr_idle_intersig_mubi.1265784209 May 23 03:14:54 PM PDT 24 May 23 03:14:57 PM PDT 24 34173577 ps
T830 /workspace/coverage/default/14.clkmgr_alert_test.1363442499 May 23 03:16:32 PM PDT 24 May 23 03:16:36 PM PDT 24 17696294 ps
T831 /workspace/coverage/default/24.clkmgr_regwen.2202091392 May 23 03:17:31 PM PDT 24 May 23 03:17:39 PM PDT 24 973463160 ps
T30 /workspace/coverage/default/5.clkmgr_stress_all.3090116464 May 23 03:15:17 PM PDT 24 May 23 03:16:38 PM PDT 24 10878244755 ps
T832 /workspace/coverage/default/40.clkmgr_frequency_timeout.356113540 May 23 03:18:53 PM PDT 24 May 23 03:19:13 PM PDT 24 2179192332 ps
T833 /workspace/coverage/default/46.clkmgr_idle_intersig_mubi.991467172 May 23 03:20:41 PM PDT 24 May 23 03:20:45 PM PDT 24 16452359 ps
T834 /workspace/coverage/default/12.clkmgr_stress_all_with_rand_reset.519185606 May 23 03:16:30 PM PDT 24 May 23 03:26:24 PM PDT 24 87325873235 ps
T835 /workspace/coverage/default/28.clkmgr_lc_clk_byp_req_intersig_mubi.896501252 May 23 03:17:47 PM PDT 24 May 23 03:17:52 PM PDT 24 166617266 ps
T836 /workspace/coverage/default/25.clkmgr_frequency.2392930023 May 23 03:17:34 PM PDT 24 May 23 03:17:48 PM PDT 24 1158452841 ps
T837 /workspace/coverage/default/23.clkmgr_stress_all.2480646305 May 23 03:17:20 PM PDT 24 May 23 03:17:42 PM PDT 24 4357778558 ps
T838 /workspace/coverage/default/26.clkmgr_idle_intersig_mubi.621464854 May 23 03:17:34 PM PDT 24 May 23 03:17:40 PM PDT 24 62480408 ps
T839 /workspace/coverage/default/28.clkmgr_frequency_timeout.3572889151 May 23 03:17:47 PM PDT 24 May 23 03:17:58 PM PDT 24 854245116 ps
T840 /workspace/coverage/default/15.clkmgr_frequency.3109154252 May 23 03:16:32 PM PDT 24 May 23 03:16:41 PM PDT 24 1045553275 ps
T841 /workspace/coverage/default/13.clkmgr_stress_all.450595252 May 23 03:16:19 PM PDT 24 May 23 03:16:25 PM PDT 24 1201005355 ps
T842 /workspace/coverage/default/31.clkmgr_clk_status.3438046091 May 23 03:18:08 PM PDT 24 May 23 03:18:13 PM PDT 24 16880943 ps
T843 /workspace/coverage/default/0.clkmgr_trans.91810456 May 23 03:14:30 PM PDT 24 May 23 03:14:33 PM PDT 24 104284993 ps
T844 /workspace/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.4019688694 May 23 03:21:02 PM PDT 24 May 23 03:21:06 PM PDT 24 212154605 ps
T845 /workspace/coverage/default/32.clkmgr_stress_all_with_rand_reset.4287769204 May 23 03:18:20 PM PDT 24 May 23 03:21:17 PM PDT 24 11327875028 ps
T846 /workspace/coverage/default/41.clkmgr_lc_clk_byp_req_intersig_mubi.3373543142 May 23 03:18:55 PM PDT 24 May 23 03:19:03 PM PDT 24 70617853 ps
T847 /workspace/coverage/default/32.clkmgr_extclk.990845979 May 23 03:18:04 PM PDT 24 May 23 03:18:09 PM PDT 24 69060533 ps
T848 /workspace/coverage/default/10.clkmgr_regwen.877499948 May 23 03:16:08 PM PDT 24 May 23 03:16:15 PM PDT 24 1271936203 ps
T849 /workspace/coverage/default/39.clkmgr_extclk.1112320432 May 23 03:18:56 PM PDT 24 May 23 03:19:05 PM PDT 24 188239449 ps
T850 /workspace/coverage/default/16.clkmgr_lc_clk_byp_req_intersig_mubi.1425714299 May 23 03:16:49 PM PDT 24 May 23 03:16:52 PM PDT 24 17965887 ps
T851 /workspace/coverage/default/19.clkmgr_stress_all_with_rand_reset.1601520713 May 23 03:17:03 PM PDT 24 May 23 03:29:05 PM PDT 24 87178666787 ps
T852 /workspace/coverage/default/11.clkmgr_regwen.3449360504 May 23 03:16:07 PM PDT 24 May 23 03:16:11 PM PDT 24 622922238 ps
T853 /workspace/coverage/default/18.clkmgr_lc_clk_byp_req_intersig_mubi.3425532350 May 23 03:17:03 PM PDT 24 May 23 03:17:06 PM PDT 24 17585830 ps
T41 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1876258105 May 23 02:56:55 PM PDT 24 May 23 02:56:58 PM PDT 24 59533572 ps
T854 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.4010702347 May 23 02:57:13 PM PDT 24 May 23 02:57:15 PM PDT 24 13515049 ps
T42 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3505190073 May 23 02:57:46 PM PDT 24 May 23 02:57:53 PM PDT 24 166511884 ps
T855 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.3045216491 May 23 02:56:57 PM PDT 24 May 23 02:57:00 PM PDT 24 12881264 ps
T43 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.3511865243 May 23 02:57:26 PM PDT 24 May 23 02:57:29 PM PDT 24 58179253 ps
T96 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.2977373303 May 23 02:56:59 PM PDT 24 May 23 02:57:07 PM PDT 24 251696570 ps
T47 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.2985091474 May 23 02:57:13 PM PDT 24 May 23 02:57:18 PM PDT 24 149716888 ps
T856 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.239171006 May 23 02:57:32 PM PDT 24 May 23 02:57:35 PM PDT 24 13969674 ps
T857 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.3882019400 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 11956450 ps
T858 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.389266851 May 23 02:57:49 PM PDT 24 May 23 02:57:55 PM PDT 24 54796145 ps
T46 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.3991590663 May 23 02:57:15 PM PDT 24 May 23 02:57:20 PM PDT 24 93870816 ps
T859 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.2675193440 May 23 02:56:58 PM PDT 24 May 23 02:57:03 PM PDT 24 44768747 ps
T860 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.570125919 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 34595130 ps
T861 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.3660718127 May 23 02:57:48 PM PDT 24 May 23 02:57:54 PM PDT 24 12909995 ps
T48 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.2098804413 May 23 02:57:18 PM PDT 24 May 23 02:57:25 PM PDT 24 530271001 ps
T90 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.2948435885 May 23 02:57:47 PM PDT 24 May 23 02:57:54 PM PDT 24 262869620 ps
T862 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.311600981 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 39752664 ps
T863 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.79597674 May 23 02:57:29 PM PDT 24 May 23 02:57:32 PM PDT 24 166998394 ps
T864 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.2443294233 May 23 02:57:15 PM PDT 24 May 23 02:57:19 PM PDT 24 33964135 ps
T865 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.1794932964 May 23 02:57:46 PM PDT 24 May 23 02:57:52 PM PDT 24 39957469 ps
T866 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.284977961 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 21188943 ps
T44 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.297124502 May 23 02:57:45 PM PDT 24 May 23 02:57:50 PM PDT 24 88969819 ps
T867 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.1092703216 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 21801503 ps
T67 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.1611511949 May 23 02:57:27 PM PDT 24 May 23 02:57:30 PM PDT 24 38415589 ps
T868 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1604978816 May 23 02:56:58 PM PDT 24 May 23 02:57:01 PM PDT 24 19083001 ps
T869 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.513992392 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 38587475 ps
T870 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.844935028 May 23 02:56:59 PM PDT 24 May 23 02:57:03 PM PDT 24 81381902 ps
T50 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3079632940 May 23 02:57:13 PM PDT 24 May 23 02:57:17 PM PDT 24 89674180 ps
T91 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2780016208 May 23 02:57:29 PM PDT 24 May 23 02:57:34 PM PDT 24 125554051 ps
T68 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.2380361311 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 150204095 ps
T69 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.3216441174 May 23 02:57:45 PM PDT 24 May 23 02:57:50 PM PDT 24 62910204 ps
T92 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.2885555495 May 23 02:57:17 PM PDT 24 May 23 02:57:23 PM PDT 24 101244975 ps
T70 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.290826371 May 23 02:57:00 PM PDT 24 May 23 02:57:05 PM PDT 24 104240787 ps
T871 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.485771268 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 445925993 ps
T71 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.95525939 May 23 02:57:44 PM PDT 24 May 23 02:57:47 PM PDT 24 60726039 ps
T72 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.1142265657 May 23 02:57:31 PM PDT 24 May 23 02:57:34 PM PDT 24 26409262 ps
T872 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.443155696 May 23 02:57:48 PM PDT 24 May 23 02:57:53 PM PDT 24 22852083 ps
T164 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.537997116 May 23 02:57:46 PM PDT 24 May 23 02:57:54 PM PDT 24 385967393 ps
T873 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.923925768 May 23 02:57:26 PM PDT 24 May 23 02:57:29 PM PDT 24 31562099 ps
T874 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.4261570884 May 23 02:56:56 PM PDT 24 May 23 02:57:00 PM PDT 24 98775146 ps
T875 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.1612939496 May 23 02:57:47 PM PDT 24 May 23 02:57:52 PM PDT 24 26394863 ps
T876 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1551346608 May 23 02:56:58 PM PDT 24 May 23 02:57:02 PM PDT 24 33772758 ps
T877 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1037481991 May 23 02:57:48 PM PDT 24 May 23 02:57:53 PM PDT 24 24564836 ps
T878 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.1555143293 May 23 02:57:15 PM PDT 24 May 23 02:57:18 PM PDT 24 16682421 ps
T49 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.3339920440 May 23 02:57:13 PM PDT 24 May 23 02:57:17 PM PDT 24 219494930 ps
T45 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.2440483137 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 239738620 ps
T879 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.3374930562 May 23 02:57:27 PM PDT 24 May 23 02:57:32 PM PDT 24 251743952 ps
T880 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.3399107097 May 23 02:57:20 PM PDT 24 May 23 02:57:24 PM PDT 24 107606275 ps
T109 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3005300593 May 23 02:57:13 PM PDT 24 May 23 02:57:17 PM PDT 24 66734690 ps
T881 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.2001675768 May 23 02:57:48 PM PDT 24 May 23 02:57:53 PM PDT 24 33822046 ps
T167 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.4020044064 May 23 02:57:18 PM PDT 24 May 23 02:57:23 PM PDT 24 76580471 ps
T165 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1762172592 May 23 02:56:57 PM PDT 24 May 23 02:57:02 PM PDT 24 132917896 ps
T882 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.2192314917 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 28527583 ps
T883 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.2648363395 May 23 02:57:26 PM PDT 24 May 23 02:57:28 PM PDT 24 24995741 ps
T884 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.2744578515 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 72871934 ps
T885 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.3751790296 May 23 02:57:12 PM PDT 24 May 23 02:57:16 PM PDT 24 43073296 ps
T113 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1729411756 May 23 02:57:17 PM PDT 24 May 23 02:57:24 PM PDT 24 958840697 ps
T886 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.4119060355 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 67622744 ps
T887 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1582761544 May 23 02:57:43 PM PDT 24 May 23 02:57:46 PM PDT 24 14019376 ps
T888 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.3625069607 May 23 02:57:30 PM PDT 24 May 23 02:57:32 PM PDT 24 17966639 ps
T889 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.165198703 May 23 02:57:45 PM PDT 24 May 23 02:57:50 PM PDT 24 369887239 ps
T100 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.2681294947 May 23 02:57:45 PM PDT 24 May 23 02:57:49 PM PDT 24 87627299 ps
T890 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.4242849477 May 23 02:57:47 PM PDT 24 May 23 02:57:52 PM PDT 24 29218981 ps
T891 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.2294547279 May 23 02:56:56 PM PDT 24 May 23 02:57:06 PM PDT 24 428715592 ps
T102 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.3682465279 May 23 02:57:18 PM PDT 24 May 23 02:57:24 PM PDT 24 194631639 ps
T110 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.688318394 May 23 02:57:15 PM PDT 24 May 23 02:57:20 PM PDT 24 69065742 ps
T111 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.618597334 May 23 02:57:24 PM PDT 24 May 23 02:57:27 PM PDT 24 171647269 ps
T892 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.1238729906 May 23 02:57:15 PM PDT 24 May 23 02:57:21 PM PDT 24 45617098 ps
T893 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.3215043443 May 23 02:57:29 PM PDT 24 May 23 02:57:34 PM PDT 24 327570698 ps
T894 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.2479104819 May 23 02:57:17 PM PDT 24 May 23 02:57:22 PM PDT 24 186735267 ps
T895 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.2279531997 May 23 02:57:44 PM PDT 24 May 23 02:57:47 PM PDT 24 12266407 ps
T896 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.1626426902 May 23 02:57:48 PM PDT 24 May 23 02:57:53 PM PDT 24 27491073 ps
T112 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.686769061 May 23 02:57:14 PM PDT 24 May 23 02:57:18 PM PDT 24 84632736 ps
T116 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.730571354 May 23 02:57:02 PM PDT 24 May 23 02:57:06 PM PDT 24 299635267 ps
T897 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.1573183673 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 30987929 ps
T898 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.601225779 May 23 02:57:14 PM PDT 24 May 23 02:57:17 PM PDT 24 24546728 ps
T899 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.3717792831 May 23 02:57:20 PM PDT 24 May 23 02:57:23 PM PDT 24 16659931 ps
T900 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.890272290 May 23 02:57:15 PM PDT 24 May 23 02:57:19 PM PDT 24 62533996 ps
T901 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.647580497 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 61367583 ps
T902 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.625592663 May 23 02:57:46 PM PDT 24 May 23 02:57:53 PM PDT 24 69438417 ps
T903 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.78022594 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 39526710 ps
T904 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.3219872099 May 23 02:57:46 PM PDT 24 May 23 02:57:52 PM PDT 24 35581109 ps
T905 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.2237672551 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 16289148 ps
T906 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.525859458 May 23 02:57:26 PM PDT 24 May 23 02:57:28 PM PDT 24 20963582 ps
T907 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.3694220245 May 23 02:57:16 PM PDT 24 May 23 02:57:20 PM PDT 24 47277826 ps
T908 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2891307131 May 23 02:57:18 PM PDT 24 May 23 02:57:23 PM PDT 24 156584253 ps
T909 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.1246036381 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 42106793 ps
T118 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.553008052 May 23 02:57:29 PM PDT 24 May 23 02:57:32 PM PDT 24 137009544 ps
T910 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.3428331309 May 23 02:57:48 PM PDT 24 May 23 02:57:54 PM PDT 24 10807352 ps
T911 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2409114005 May 23 02:57:18 PM PDT 24 May 23 02:57:23 PM PDT 24 67165398 ps
T912 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.4056431676 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 16473201 ps
T913 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.2547300676 May 23 02:57:44 PM PDT 24 May 23 02:57:46 PM PDT 24 33817025 ps
T914 /workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.1246421389 May 23 02:57:18 PM PDT 24 May 23 02:57:24 PM PDT 24 75651246 ps
T915 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.2160138619 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 143886489 ps
T114 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.1493929342 May 23 02:57:47 PM PDT 24 May 23 02:57:54 PM PDT 24 300927772 ps
T916 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.3415985067 May 23 02:57:27 PM PDT 24 May 23 02:57:30 PM PDT 24 19895886 ps
T95 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1009330394 May 23 02:56:58 PM PDT 24 May 23 02:57:03 PM PDT 24 147368735 ps
T917 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.854288825 May 23 02:57:27 PM PDT 24 May 23 02:57:31 PM PDT 24 230794628 ps
T918 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.3565852539 May 23 02:57:30 PM PDT 24 May 23 02:57:34 PM PDT 24 130172843 ps
T919 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.2409679603 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 83702477 ps
T119 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.70650487 May 23 02:57:28 PM PDT 24 May 23 02:57:32 PM PDT 24 131246343 ps
T920 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.2943554654 May 23 02:57:27 PM PDT 24 May 23 02:57:29 PM PDT 24 58632019 ps
T921 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.2348534657 May 23 02:57:17 PM PDT 24 May 23 02:57:21 PM PDT 24 27027403 ps
T126 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.2909495359 May 23 02:57:12 PM PDT 24 May 23 02:57:15 PM PDT 24 197874509 ps
T922 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.2141260363 May 23 02:57:29 PM PDT 24 May 23 02:57:33 PM PDT 24 111126549 ps
T923 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.319912164 May 23 02:57:14 PM PDT 24 May 23 02:57:18 PM PDT 24 74006405 ps
T924 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.219967847 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 46930295 ps
T925 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.628658618 May 23 02:57:26 PM PDT 24 May 23 02:57:29 PM PDT 24 146875348 ps
T926 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.2236913740 May 23 02:57:45 PM PDT 24 May 23 02:57:50 PM PDT 24 12662111 ps
T927 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.281035631 May 23 02:57:45 PM PDT 24 May 23 02:57:52 PM PDT 24 226410716 ps
T928 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.1857631034 May 23 02:57:21 PM PDT 24 May 23 02:57:25 PM PDT 24 155132465 ps
T120 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.2227582302 May 23 02:56:58 PM PDT 24 May 23 02:57:04 PM PDT 24 240090964 ps
T929 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.437909316 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 18048441 ps
T930 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.3355843391 May 23 02:57:31 PM PDT 24 May 23 02:57:34 PM PDT 24 38108634 ps
T931 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3920328210 May 23 02:56:56 PM PDT 24 May 23 02:57:00 PM PDT 24 22632965 ps
T932 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3182693330 May 23 02:57:45 PM PDT 24 May 23 02:57:49 PM PDT 24 44477280 ps
T933 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.2835281153 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 14791513 ps
T934 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.1378873303 May 23 02:57:13 PM PDT 24 May 23 02:57:15 PM PDT 24 15931085 ps
T935 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.3472595463 May 23 02:57:45 PM PDT 24 May 23 02:57:48 PM PDT 24 14886910 ps
T936 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.683420906 May 23 02:56:59 PM PDT 24 May 23 02:57:03 PM PDT 24 14939830 ps
T937 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.2495692926 May 23 02:57:21 PM PDT 24 May 23 02:57:26 PM PDT 24 134545656 ps
T938 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1812933048 May 23 02:57:17 PM PDT 24 May 23 02:57:21 PM PDT 24 50049590 ps
T939 /workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.2442938577 May 23 02:57:13 PM PDT 24 May 23 02:57:16 PM PDT 24 107415664 ps
T940 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.1155834628 May 23 02:57:44 PM PDT 24 May 23 02:57:49 PM PDT 24 139372100 ps
T941 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.1335452328 May 23 02:57:47 PM PDT 24 May 23 02:57:53 PM PDT 24 17160856 ps
T942 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.3078998151 May 23 02:57:13 PM PDT 24 May 23 02:57:17 PM PDT 24 110514983 ps
T943 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.3368156418 May 23 02:57:12 PM PDT 24 May 23 02:57:16 PM PDT 24 309137807 ps
T121 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.290948653 May 23 02:57:27 PM PDT 24 May 23 02:57:31 PM PDT 24 688444664 ps
T944 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.509657913 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 50586311 ps
T945 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2776740177 May 23 02:57:44 PM PDT 24 May 23 02:57:48 PM PDT 24 170681974 ps
T946 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.4294189579 May 23 02:57:17 PM PDT 24 May 23 02:57:21 PM PDT 24 62093979 ps
T947 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.3281714396 May 23 02:57:27 PM PDT 24 May 23 02:57:29 PM PDT 24 15636790 ps
T948 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.1509773828 May 23 02:57:28 PM PDT 24 May 23 02:57:31 PM PDT 24 35677666 ps
T949 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.470086342 May 23 02:57:11 PM PDT 24 May 23 02:57:13 PM PDT 24 25081658 ps
T950 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.966430591 May 23 02:56:56 PM PDT 24 May 23 02:57:00 PM PDT 24 121229091 ps
T951 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.1396777738 May 23 02:57:49 PM PDT 24 May 23 02:57:55 PM PDT 24 43538136 ps
T952 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.3965160320 May 23 02:57:48 PM PDT 24 May 23 02:57:53 PM PDT 24 27372781 ps
T953 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.2191137528 May 23 02:57:19 PM PDT 24 May 23 02:57:23 PM PDT 24 180537177 ps
T954 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.3586986403 May 23 02:57:28 PM PDT 24 May 23 02:57:33 PM PDT 24 134979452 ps
T955 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.1797292666 May 23 02:57:30 PM PDT 24 May 23 02:57:33 PM PDT 24 38952552 ps
T956 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.7216465 May 23 02:57:29 PM PDT 24 May 23 02:57:32 PM PDT 24 155116913 ps
T957 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.1640041707 May 23 02:57:17 PM PDT 24 May 23 02:57:23 PM PDT 24 239751269 ps
T958 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.2103755535 May 23 02:57:14 PM PDT 24 May 23 02:57:17 PM PDT 24 25043549 ps
T959 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.3827059844 May 23 02:57:00 PM PDT 24 May 23 02:57:04 PM PDT 24 17328601 ps
T960 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.583377569 May 23 02:57:16 PM PDT 24 May 23 02:57:20 PM PDT 24 21331734 ps
T961 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.261849052 May 23 02:57:45 PM PDT 24 May 23 02:57:48 PM PDT 24 36968595 ps
T962 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.996621026 May 23 02:57:29 PM PDT 24 May 23 02:57:33 PM PDT 24 85988157 ps
T963 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.23289255 May 23 02:57:12 PM PDT 24 May 23 02:57:15 PM PDT 24 280707394 ps
T115 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.3318125937 May 23 02:57:26 PM PDT 24 May 23 02:57:29 PM PDT 24 282431450 ps
T122 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.3713202952 May 23 02:57:18 PM PDT 24 May 23 02:57:23 PM PDT 24 333830443 ps
T964 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.3112889413 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 21877271 ps
T965 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.4075433477 May 23 02:57:17 PM PDT 24 May 23 02:57:22 PM PDT 24 74722058 ps
T966 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.1897504534 May 23 02:57:44 PM PDT 24 May 23 02:57:47 PM PDT 24 50443613 ps
T967 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.3507867292 May 23 02:57:14 PM PDT 24 May 23 02:57:17 PM PDT 24 62297613 ps
T968 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.2932125522 May 23 02:57:16 PM PDT 24 May 23 02:57:20 PM PDT 24 30521882 ps
T969 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1952605036 May 23 02:56:59 PM PDT 24 May 23 02:57:03 PM PDT 24 58740377 ps
T970 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.2723280174 May 23 02:57:13 PM PDT 24 May 23 02:57:19 PM PDT 24 229438733 ps
T971 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.154060284 May 23 02:57:11 PM PDT 24 May 23 02:57:16 PM PDT 24 449305966 ps
T972 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.3965048017 May 23 02:57:15 PM PDT 24 May 23 02:57:19 PM PDT 24 64751035 ps
T973 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.2580928369 May 23 02:57:45 PM PDT 24 May 23 02:57:49 PM PDT 24 33186107 ps
T974 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3058928230 May 23 02:57:48 PM PDT 24 May 23 02:57:55 PM PDT 24 64616462 ps
T975 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.1828411240 May 23 02:57:44 PM PDT 24 May 23 02:57:47 PM PDT 24 15724126 ps
T976 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.2861615331 May 23 02:57:45 PM PDT 24 May 23 02:57:48 PM PDT 24 35347373 ps
T98 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.940758175 May 23 02:57:20 PM PDT 24 May 23 02:57:25 PM PDT 24 123738819 ps
T977 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.2464341464 May 23 02:57:15 PM PDT 24 May 23 02:57:18 PM PDT 24 29191067 ps
T978 /workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.1329173420 May 23 02:56:56 PM PDT 24 May 23 02:57:01 PM PDT 24 104561523 ps
T979 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.2709408154 May 23 02:57:46 PM PDT 24 May 23 02:57:51 PM PDT 24 33085617 ps
T980 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.4214949686 May 23 02:57:13 PM PDT 24 May 23 02:57:17 PM PDT 24 43643255 ps
T981 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.2661206936 May 23 02:57:12 PM PDT 24 May 23 02:57:15 PM PDT 24 42259179 ps
T982 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1817314634 May 23 02:57:48 PM PDT 24 May 23 02:57:56 PM PDT 24 103026126 ps
T983 /workspace/coverage/cover_reg_top/24.clkmgr_intr_test.3664687478 May 23 02:57:47 PM PDT 24 May 23 02:57:53 PM PDT 24 14727080 ps
T166 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1615462162 May 23 02:57:15 PM PDT 24 May 23 02:57:21 PM PDT 24 137560516 ps
T984 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.4033873301 May 23 02:57:17 PM PDT 24 May 23 02:57:21 PM PDT 24 108058261 ps
T985 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.2525593709 May 23 02:57:27 PM PDT 24 May 23 02:57:30 PM PDT 24 57488035 ps
T986 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2364052999 May 23 02:57:25 PM PDT 24 May 23 02:57:27 PM PDT 24 88507223 ps
T987 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.1861303436 May 23 02:57:18 PM PDT 24 May 23 02:57:22 PM PDT 24 25913319 ps
T988 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.848037233 May 23 02:57:45 PM PDT 24 May 23 02:57:48 PM PDT 24 42586252 ps
T989 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.2951767576 May 23 02:57:16 PM PDT 24 May 23 02:57:20 PM PDT 24 31000647 ps
T990 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1931507595 May 23 02:57:12 PM PDT 24 May 23 02:57:15 PM PDT 24 17380416 ps
T991 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.2071545934 May 23 02:57:12 PM PDT 24 May 23 02:57:16 PM PDT 24 28706053 ps
T123 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.3506255394 May 23 02:57:15 PM PDT 24 May 23 02:57:21 PM PDT 24 168883915 ps
T99 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2852349448 May 23 02:57:29 PM PDT 24 May 23 02:57:34 PM PDT 24 128948532 ps
T992 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.230082147 May 23 02:57:14 PM PDT 24 May 23 02:57:24 PM PDT 24 403547771 ps
T993 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.233532232 May 23 02:57:21 PM PDT 24 May 23 02:57:25 PM PDT 24 75592221 ps
T994 /workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.3769205466 May 23 02:57:12 PM PDT 24 May 23 02:57:14 PM PDT 24 76242071 ps
T995 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1164573943 May 23 02:56:58 PM PDT 24 May 23 02:57:01 PM PDT 24 16132503 ps
T124 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.2289889126 May 23 02:57:18 PM PDT 24 May 23 02:57:23 PM PDT 24 288345154 ps
T996 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.4040608742 May 23 02:57:30 PM PDT 24 May 23 02:57:33 PM PDT 24 77993560 ps
T997 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.3650745396 May 23 02:57:48 PM PDT 24 May 23 02:57:56 PM PDT 24 78753110 ps
T117 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3598558827 May 23 02:57:30 PM PDT 24 May 23 02:57:34 PM PDT 24 232819140 ps
T125 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.419477756 May 23 02:57:47 PM PDT 24 May 23 02:57:54 PM PDT 24 263318047 ps
T998 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.3617689926 May 23 02:57:47 PM PDT 24 May 23 02:57:52 PM PDT 24 18618925 ps
T999 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.3694681892 May 23 02:57:28 PM PDT 24 May 23 02:57:33 PM PDT 24 323512552 ps
T1000 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.2105367662 May 23 02:57:12 PM PDT 24 May 23 02:57:14 PM PDT 24 48627262 ps
T1001 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.2101707700 May 23 02:57:17 PM PDT 24 May 23 02:57:22 PM PDT 24 88682615 ps
T1002 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.3770145277 May 23 02:57:29 PM PDT 24 May 23 02:57:31 PM PDT 24 141032598 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%