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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.51 99.15 95.80 100.00 100.00 98.81 97.02 98.80


Total test records in report: 1010
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T795 /workspace/coverage/default/30.clkmgr_idle_intersig_mubi.1217125831 May 28 02:04:34 PM PDT 24 May 28 02:04:40 PM PDT 24 233466574 ps
T796 /workspace/coverage/default/33.clkmgr_stress_all_with_rand_reset.578898953 May 28 02:04:47 PM PDT 24 May 28 02:15:54 PM PDT 24 92579596247 ps
T797 /workspace/coverage/default/9.clkmgr_smoke.2406760790 May 28 02:02:39 PM PDT 24 May 28 02:02:42 PM PDT 24 49809738 ps
T798 /workspace/coverage/default/13.clkmgr_regwen.2160872758 May 28 02:03:06 PM PDT 24 May 28 02:03:10 PM PDT 24 407112633 ps
T799 /workspace/coverage/default/11.clkmgr_extclk.1276972250 May 28 02:02:59 PM PDT 24 May 28 02:03:02 PM PDT 24 23210800 ps
T800 /workspace/coverage/default/28.clkmgr_frequency_timeout.2194746485 May 28 02:04:15 PM PDT 24 May 28 02:04:24 PM PDT 24 1220838209 ps
T801 /workspace/coverage/default/18.clkmgr_div_intersig_mubi.1765213309 May 28 02:03:40 PM PDT 24 May 28 02:03:43 PM PDT 24 44990909 ps
T802 /workspace/coverage/default/23.clkmgr_idle_intersig_mubi.3624940751 May 28 02:03:57 PM PDT 24 May 28 02:04:01 PM PDT 24 32921996 ps
T803 /workspace/coverage/default/0.clkmgr_alert_test.3144938145 May 28 02:01:43 PM PDT 24 May 28 02:01:46 PM PDT 24 42068813 ps
T804 /workspace/coverage/default/9.clkmgr_alert_test.3678049604 May 28 02:02:41 PM PDT 24 May 28 02:02:44 PM PDT 24 23571061 ps
T805 /workspace/coverage/default/22.clkmgr_stress_all_with_rand_reset.598965535 May 28 02:03:59 PM PDT 24 May 28 02:13:18 PM PDT 24 83534642000 ps
T806 /workspace/coverage/default/32.clkmgr_peri.1621545519 May 28 02:04:38 PM PDT 24 May 28 02:04:44 PM PDT 24 17620217 ps
T807 /workspace/coverage/default/43.clkmgr_stress_all.1239990580 May 28 02:05:28 PM PDT 24 May 28 02:05:32 PM PDT 24 35653284 ps
T808 /workspace/coverage/default/1.clkmgr_frequency_timeout.2991012293 May 28 02:01:42 PM PDT 24 May 28 02:02:00 PM PDT 24 2174502126 ps
T809 /workspace/coverage/default/38.clkmgr_frequency_timeout.498312290 May 28 02:04:56 PM PDT 24 May 28 02:05:03 PM PDT 24 380467756 ps
T810 /workspace/coverage/default/26.clkmgr_lc_clk_byp_req_intersig_mubi.3207260429 May 28 02:04:12 PM PDT 24 May 28 02:04:15 PM PDT 24 78525073 ps
T811 /workspace/coverage/default/13.clkmgr_lc_clk_byp_req_intersig_mubi.2496607790 May 28 02:03:11 PM PDT 24 May 28 02:03:13 PM PDT 24 27408231 ps
T812 /workspace/coverage/default/14.clkmgr_smoke.3201176773 May 28 02:03:07 PM PDT 24 May 28 02:03:11 PM PDT 24 68909852 ps
T813 /workspace/coverage/default/7.clkmgr_peri.3732491694 May 28 02:02:33 PM PDT 24 May 28 02:02:34 PM PDT 24 34523112 ps
T814 /workspace/coverage/default/45.clkmgr_alert_test.3819024802 May 28 02:05:41 PM PDT 24 May 28 02:05:45 PM PDT 24 103140849 ps
T46 /workspace/coverage/default/3.clkmgr_sec_cm.894959639 May 28 02:02:10 PM PDT 24 May 28 02:02:16 PM PDT 24 1045841104 ps
T815 /workspace/coverage/default/8.clkmgr_trans.2859815138 May 28 02:02:41 PM PDT 24 May 28 02:02:44 PM PDT 24 18446227 ps
T816 /workspace/coverage/default/37.clkmgr_stress_all_with_rand_reset.981710628 May 28 02:05:00 PM PDT 24 May 28 02:26:04 PM PDT 24 181513828981 ps
T817 /workspace/coverage/default/49.clkmgr_clk_handshake_intersig_mubi.279648190 May 28 02:05:57 PM PDT 24 May 28 02:06:00 PM PDT 24 42235267 ps
T818 /workspace/coverage/default/30.clkmgr_smoke.2378897492 May 28 02:04:19 PM PDT 24 May 28 02:04:23 PM PDT 24 18595562 ps
T819 /workspace/coverage/default/48.clkmgr_extclk.559844059 May 28 02:05:44 PM PDT 24 May 28 02:05:47 PM PDT 24 18248098 ps
T820 /workspace/coverage/default/18.clkmgr_peri.3638866659 May 28 02:03:39 PM PDT 24 May 28 02:03:42 PM PDT 24 42954478 ps
T821 /workspace/coverage/default/13.clkmgr_alert_test.3448006995 May 28 02:03:07 PM PDT 24 May 28 02:03:11 PM PDT 24 67742820 ps
T822 /workspace/coverage/default/20.clkmgr_clk_status.3117610747 May 28 02:03:55 PM PDT 24 May 28 02:03:58 PM PDT 24 15821378 ps
T823 /workspace/coverage/default/42.clkmgr_frequency.3915346144 May 28 02:05:14 PM PDT 24 May 28 02:05:24 PM PDT 24 1423468200 ps
T824 /workspace/coverage/default/47.clkmgr_peri.2103995589 May 28 02:05:39 PM PDT 24 May 28 02:05:41 PM PDT 24 23562975 ps
T825 /workspace/coverage/default/18.clkmgr_regwen.1539463130 May 28 02:03:41 PM PDT 24 May 28 02:03:50 PM PDT 24 1258566626 ps
T826 /workspace/coverage/default/11.clkmgr_frequency.2228604864 May 28 02:02:54 PM PDT 24 May 28 02:03:08 PM PDT 24 2610944617 ps
T827 /workspace/coverage/default/8.clkmgr_extclk.3756942010 May 28 02:02:40 PM PDT 24 May 28 02:02:43 PM PDT 24 189697188 ps
T828 /workspace/coverage/default/11.clkmgr_clk_handshake_intersig_mubi.3577938996 May 28 02:02:59 PM PDT 24 May 28 02:03:02 PM PDT 24 21422851 ps
T829 /workspace/coverage/default/45.clkmgr_idle_intersig_mubi.1356803369 May 28 02:05:28 PM PDT 24 May 28 02:05:33 PM PDT 24 238665385 ps
T830 /workspace/coverage/default/42.clkmgr_alert_test.89486104 May 28 02:05:31 PM PDT 24 May 28 02:05:34 PM PDT 24 50470049 ps
T831 /workspace/coverage/default/45.clkmgr_clk_handshake_intersig_mubi.2083795556 May 28 02:05:44 PM PDT 24 May 28 02:05:47 PM PDT 24 27885203 ps
T832 /workspace/coverage/default/45.clkmgr_extclk.910901060 May 28 02:05:25 PM PDT 24 May 28 02:05:26 PM PDT 24 62788284 ps
T833 /workspace/coverage/default/36.clkmgr_trans.576493868 May 28 02:04:57 PM PDT 24 May 28 02:05:03 PM PDT 24 445286669 ps
T834 /workspace/coverage/default/2.clkmgr_idle_intersig_mubi.2818999863 May 28 02:01:51 PM PDT 24 May 28 02:01:55 PM PDT 24 30912916 ps
T835 /workspace/coverage/default/19.clkmgr_stress_all_with_rand_reset.671712780 May 28 02:03:40 PM PDT 24 May 28 02:19:52 PM PDT 24 54721896891 ps
T836 /workspace/coverage/default/13.clkmgr_trans.1312196256 May 28 02:02:58 PM PDT 24 May 28 02:03:02 PM PDT 24 36335035 ps
T837 /workspace/coverage/default/44.clkmgr_frequency_timeout.1933800497 May 28 02:05:29 PM PDT 24 May 28 02:05:35 PM PDT 24 260114004 ps
T838 /workspace/coverage/default/4.clkmgr_clk_status.595095237 May 28 02:02:10 PM PDT 24 May 28 02:02:12 PM PDT 24 77360870 ps
T839 /workspace/coverage/default/43.clkmgr_clk_status.359415089 May 28 02:05:26 PM PDT 24 May 28 02:05:28 PM PDT 24 14459601 ps
T840 /workspace/coverage/default/27.clkmgr_stress_all_with_rand_reset.1826059888 May 28 02:04:18 PM PDT 24 May 28 02:18:41 PM PDT 24 208420005504 ps
T841 /workspace/coverage/default/4.clkmgr_div_intersig_mubi.3564602425 May 28 02:02:16 PM PDT 24 May 28 02:02:20 PM PDT 24 22632149 ps
T842 /workspace/coverage/default/48.clkmgr_smoke.4171019133 May 28 02:05:39 PM PDT 24 May 28 02:05:41 PM PDT 24 46845216 ps
T843 /workspace/coverage/default/7.clkmgr_regwen.2951590759 May 28 02:02:40 PM PDT 24 May 28 02:02:43 PM PDT 24 105881216 ps
T844 /workspace/coverage/default/39.clkmgr_div_intersig_mubi.2670657362 May 28 02:05:17 PM PDT 24 May 28 02:05:20 PM PDT 24 24498292 ps
T845 /workspace/coverage/default/16.clkmgr_clk_handshake_intersig_mubi.2691653236 May 28 02:03:19 PM PDT 24 May 28 02:03:21 PM PDT 24 23385898 ps
T846 /workspace/coverage/default/40.clkmgr_idle_intersig_mubi.1030520603 May 28 02:05:14 PM PDT 24 May 28 02:05:18 PM PDT 24 27590234 ps
T847 /workspace/coverage/default/9.clkmgr_idle_intersig_mubi.1450167664 May 28 02:02:41 PM PDT 24 May 28 02:02:45 PM PDT 24 15795801 ps
T848 /workspace/coverage/default/44.clkmgr_stress_all.749536354 May 28 02:05:27 PM PDT 24 May 28 02:06:40 PM PDT 24 9797082177 ps
T89 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.1319741469 May 28 01:21:18 PM PDT 24 May 28 01:21:25 PM PDT 24 200154362 ps
T74 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.1864977142 May 28 01:21:16 PM PDT 24 May 28 01:21:21 PM PDT 24 31933413 ps
T90 /workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.3276890599 May 28 01:20:39 PM PDT 24 May 28 01:20:42 PM PDT 24 137459608 ps
T849 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.4122452918 May 28 01:20:37 PM PDT 24 May 28 01:20:40 PM PDT 24 102639995 ps
T75 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3678005111 May 28 01:21:16 PM PDT 24 May 28 01:21:21 PM PDT 24 55841210 ps
T850 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.2451044341 May 28 01:21:32 PM PDT 24 May 28 01:21:36 PM PDT 24 30958938 ps
T47 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2063989741 May 28 01:20:24 PM PDT 24 May 28 01:20:32 PM PDT 24 1004171596 ps
T851 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.469052484 May 28 01:20:56 PM PDT 24 May 28 01:20:58 PM PDT 24 31884758 ps
T91 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.250032129 May 28 01:20:57 PM PDT 24 May 28 01:21:01 PM PDT 24 275694143 ps
T50 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.684604851 May 28 01:20:40 PM PDT 24 May 28 01:20:44 PM PDT 24 682812204 ps
T98 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2443049272 May 28 01:21:16 PM PDT 24 May 28 01:21:22 PM PDT 24 181802066 ps
T76 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.1641966244 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 29757086 ps
T95 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.3430853088 May 28 01:20:58 PM PDT 24 May 28 01:21:03 PM PDT 24 93183940 ps
T852 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.1934601516 May 28 01:21:15 PM PDT 24 May 28 01:21:22 PM PDT 24 115327782 ps
T77 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.963945291 May 28 01:21:26 PM PDT 24 May 28 01:21:28 PM PDT 24 18681478 ps
T853 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.4269962308 May 28 01:21:34 PM PDT 24 May 28 01:21:38 PM PDT 24 76423931 ps
T854 /workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.1704722967 May 28 01:21:00 PM PDT 24 May 28 01:21:04 PM PDT 24 99986406 ps
T855 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.3607291421 May 28 01:20:58 PM PDT 24 May 28 01:21:00 PM PDT 24 28528297 ps
T48 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.1194698226 May 28 01:20:25 PM PDT 24 May 28 01:20:31 PM PDT 24 94790816 ps
T54 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.4032182584 May 28 01:20:58 PM PDT 24 May 28 01:21:02 PM PDT 24 127607252 ps
T78 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.763909952 May 28 01:21:17 PM PDT 24 May 28 01:21:22 PM PDT 24 52222407 ps
T856 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.412233569 May 28 01:20:41 PM PDT 24 May 28 01:20:44 PM PDT 24 40913820 ps
T857 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1747939003 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 54677490 ps
T96 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.94316350 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 92789604 ps
T858 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.2848936640 May 28 01:20:59 PM PDT 24 May 28 01:21:03 PM PDT 24 87600396 ps
T859 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.762318006 May 28 01:21:14 PM PDT 24 May 28 01:21:19 PM PDT 24 187703223 ps
T49 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.253261535 May 28 01:21:15 PM PDT 24 May 28 01:21:19 PM PDT 24 41808885 ps
T860 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1013953964 May 28 01:20:40 PM PDT 24 May 28 01:20:42 PM PDT 24 11617378 ps
T861 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3452824092 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 43936403 ps
T862 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.4209381440 May 28 01:20:38 PM PDT 24 May 28 01:20:41 PM PDT 24 144083205 ps
T863 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.2238649303 May 28 01:21:31 PM PDT 24 May 28 01:21:34 PM PDT 24 60874801 ps
T149 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.3699661546 May 28 01:21:29 PM PDT 24 May 28 01:21:35 PM PDT 24 126419583 ps
T864 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.766382283 May 28 01:20:41 PM PDT 24 May 28 01:20:43 PM PDT 24 17708878 ps
T97 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1214800248 May 28 01:20:26 PM PDT 24 May 28 01:20:33 PM PDT 24 119834767 ps
T51 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.936668959 May 28 01:21:00 PM PDT 24 May 28 01:21:04 PM PDT 24 132948355 ps
T865 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.1132654034 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 31944650 ps
T866 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1713893456 May 28 01:20:57 PM PDT 24 May 28 01:21:02 PM PDT 24 121235466 ps
T867 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.278616291 May 28 01:21:17 PM PDT 24 May 28 01:21:23 PM PDT 24 27767317 ps
T868 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.1452821315 May 28 01:21:18 PM PDT 24 May 28 01:21:23 PM PDT 24 13519551 ps
T869 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.678831995 May 28 01:21:27 PM PDT 24 May 28 01:21:31 PM PDT 24 30035470 ps
T870 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.3532983597 May 28 01:21:30 PM PDT 24 May 28 01:21:34 PM PDT 24 58534532 ps
T79 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.59337474 May 28 01:21:14 PM PDT 24 May 28 01:21:16 PM PDT 24 44901523 ps
T55 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.1871810485 May 28 01:20:57 PM PDT 24 May 28 01:21:02 PM PDT 24 161927601 ps
T871 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.2006167267 May 28 01:21:33 PM PDT 24 May 28 01:21:37 PM PDT 24 42106772 ps
T872 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3310542958 May 28 01:21:00 PM PDT 24 May 28 01:21:04 PM PDT 24 384555358 ps
T873 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.4014206488 May 28 01:21:26 PM PDT 24 May 28 01:21:28 PM PDT 24 29469596 ps
T52 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.2111826113 May 28 01:20:37 PM PDT 24 May 28 01:20:40 PM PDT 24 164923820 ps
T874 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3951614732 May 28 01:21:27 PM PDT 24 May 28 01:21:31 PM PDT 24 63457304 ps
T875 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.3960011531 May 28 01:21:25 PM PDT 24 May 28 01:21:27 PM PDT 24 20643026 ps
T876 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.601849830 May 28 01:20:37 PM PDT 24 May 28 01:20:39 PM PDT 24 24131604 ps
T877 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.506232164 May 28 01:21:32 PM PDT 24 May 28 01:21:36 PM PDT 24 44527569 ps
T878 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.2313006172 May 28 01:21:27 PM PDT 24 May 28 01:21:30 PM PDT 24 47233335 ps
T879 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.513473568 May 28 01:20:58 PM PDT 24 May 28 01:21:02 PM PDT 24 79609295 ps
T880 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.4113510593 May 28 01:20:41 PM PDT 24 May 28 01:20:44 PM PDT 24 16052787 ps
T881 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3023640752 May 28 01:20:37 PM PDT 24 May 28 01:20:43 PM PDT 24 534735972 ps
T882 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.4271762733 May 28 01:21:33 PM PDT 24 May 28 01:21:36 PM PDT 24 13579958 ps
T53 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.1530771420 May 28 01:21:15 PM PDT 24 May 28 01:21:19 PM PDT 24 128197490 ps
T56 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.1972748192 May 28 01:21:29 PM PDT 24 May 28 01:21:34 PM PDT 24 167097637 ps
T883 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.907788020 May 28 01:21:28 PM PDT 24 May 28 01:21:31 PM PDT 24 14227327 ps
T884 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3287022901 May 28 01:20:38 PM PDT 24 May 28 01:20:52 PM PDT 24 2224640135 ps
T107 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.1236364540 May 28 01:21:15 PM PDT 24 May 28 01:21:21 PM PDT 24 185543686 ps
T885 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.1294775214 May 28 01:20:36 PM PDT 24 May 28 01:20:41 PM PDT 24 323436422 ps
T886 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.1444997187 May 28 01:21:14 PM PDT 24 May 28 01:21:16 PM PDT 24 88313662 ps
T887 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.3408564365 May 28 01:21:33 PM PDT 24 May 28 01:21:37 PM PDT 24 21765841 ps
T888 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.228331260 May 28 01:20:35 PM PDT 24 May 28 01:20:38 PM PDT 24 131606492 ps
T117 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2483684719 May 28 01:21:18 PM PDT 24 May 28 01:21:24 PM PDT 24 280611852 ps
T889 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.416783107 May 28 01:20:40 PM PDT 24 May 28 01:20:43 PM PDT 24 37659139 ps
T119 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.903119278 May 28 01:21:29 PM PDT 24 May 28 01:21:34 PM PDT 24 141926259 ps
T890 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.1780299244 May 28 01:21:15 PM PDT 24 May 28 01:21:21 PM PDT 24 49149706 ps
T891 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.2729343940 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 91425773 ps
T892 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.1330977768 May 28 01:21:27 PM PDT 24 May 28 01:21:29 PM PDT 24 19803024 ps
T893 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.4193069771 May 28 01:21:26 PM PDT 24 May 28 01:21:30 PM PDT 24 51511298 ps
T113 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.156457911 May 28 01:21:18 PM PDT 24 May 28 01:21:25 PM PDT 24 299532702 ps
T116 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.34539804 May 28 01:21:17 PM PDT 24 May 28 01:21:23 PM PDT 24 96155970 ps
T894 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.186129726 May 28 01:20:39 PM PDT 24 May 28 01:20:41 PM PDT 24 46973071 ps
T895 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.1309390111 May 28 01:20:36 PM PDT 24 May 28 01:20:40 PM PDT 24 356404815 ps
T896 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.4149763874 May 28 01:21:16 PM PDT 24 May 28 01:21:21 PM PDT 24 219842594 ps
T108 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.3976257215 May 28 01:20:59 PM PDT 24 May 28 01:21:04 PM PDT 24 332696652 ps
T897 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.3410019773 May 28 01:21:00 PM PDT 24 May 28 01:21:03 PM PDT 24 29534202 ps
T898 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.2208503186 May 28 01:21:30 PM PDT 24 May 28 01:21:35 PM PDT 24 53662183 ps
T115 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.4087777443 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 143775792 ps
T899 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.2823945246 May 28 01:21:14 PM PDT 24 May 28 01:21:16 PM PDT 24 25872264 ps
T900 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.3598675245 May 28 01:21:29 PM PDT 24 May 28 01:21:35 PM PDT 24 103204062 ps
T901 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.917002919 May 28 01:20:40 PM PDT 24 May 28 01:20:43 PM PDT 24 45938124 ps
T902 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.3750444450 May 28 01:21:33 PM PDT 24 May 28 01:21:36 PM PDT 24 33022463 ps
T903 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.4165639035 May 28 01:20:58 PM PDT 24 May 28 01:21:01 PM PDT 24 45266220 ps
T904 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.2290003799 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 16549166 ps
T905 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.1651757927 May 28 01:20:42 PM PDT 24 May 28 01:20:44 PM PDT 24 16910026 ps
T906 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.3114633395 May 28 01:21:27 PM PDT 24 May 28 01:21:30 PM PDT 24 41420515 ps
T99 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.3654150386 May 28 01:21:14 PM PDT 24 May 28 01:21:18 PM PDT 24 77586385 ps
T907 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.3473866858 May 28 01:20:58 PM PDT 24 May 28 01:21:04 PM PDT 24 333248814 ps
T109 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.4103295009 May 28 01:21:18 PM PDT 24 May 28 01:21:24 PM PDT 24 212761332 ps
T908 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.3411499990 May 28 01:21:33 PM PDT 24 May 28 01:21:37 PM PDT 24 72828191 ps
T909 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.701760491 May 28 01:21:33 PM PDT 24 May 28 01:21:37 PM PDT 24 20580260 ps
T910 /workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.3858627689 May 28 01:21:18 PM PDT 24 May 28 01:21:25 PM PDT 24 39316166 ps
T911 /workspace/coverage/cover_reg_top/24.clkmgr_intr_test.272828140 May 28 01:21:31 PM PDT 24 May 28 01:21:35 PM PDT 24 68792848 ps
T912 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.2592497051 May 28 01:21:34 PM PDT 24 May 28 01:21:37 PM PDT 24 12773003 ps
T913 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.3258632324 May 28 01:21:13 PM PDT 24 May 28 01:21:14 PM PDT 24 15180467 ps
T914 /workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1800032168 May 28 01:20:36 PM PDT 24 May 28 01:20:38 PM PDT 24 22091072 ps
T148 /workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1545236764 May 28 01:21:29 PM PDT 24 May 28 01:21:35 PM PDT 24 212420436 ps
T915 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3412805398 May 28 01:20:39 PM PDT 24 May 28 01:20:41 PM PDT 24 51547090 ps
T111 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.33231045 May 28 01:20:57 PM PDT 24 May 28 01:21:00 PM PDT 24 149244983 ps
T916 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.2651108296 May 28 01:21:32 PM PDT 24 May 28 01:21:36 PM PDT 24 14907625 ps
T917 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3629312795 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 43211658 ps
T918 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.509535106 May 28 01:21:16 PM PDT 24 May 28 01:21:21 PM PDT 24 24847627 ps
T919 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.1025848730 May 28 01:20:41 PM PDT 24 May 28 01:20:45 PM PDT 24 581288388 ps
T920 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.1377051530 May 28 01:21:16 PM PDT 24 May 28 01:21:21 PM PDT 24 11162252 ps
T921 /workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.3361972763 May 28 01:21:17 PM PDT 24 May 28 01:21:22 PM PDT 24 16673645 ps
T922 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.843995999 May 28 01:21:28 PM PDT 24 May 28 01:21:33 PM PDT 24 103667170 ps
T100 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.3687907457 May 28 01:21:25 PM PDT 24 May 28 01:21:29 PM PDT 24 392079038 ps
T923 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.767359952 May 28 01:20:36 PM PDT 24 May 28 01:20:39 PM PDT 24 57197703 ps
T924 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.201244926 May 28 01:21:26 PM PDT 24 May 28 01:21:29 PM PDT 24 22392749 ps
T925 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.3272879220 May 28 01:20:58 PM PDT 24 May 28 01:21:00 PM PDT 24 52155725 ps
T926 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.1073639084 May 28 01:21:29 PM PDT 24 May 28 01:21:32 PM PDT 24 10114796 ps
T927 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.654885527 May 28 01:21:29 PM PDT 24 May 28 01:21:33 PM PDT 24 45147833 ps
T928 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.1919543577 May 28 01:21:18 PM PDT 24 May 28 01:21:23 PM PDT 24 24893087 ps
T929 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.993207248 May 28 01:21:18 PM PDT 24 May 28 01:21:24 PM PDT 24 156585615 ps
T930 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.3291870707 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 80613863 ps
T931 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.2631780170 May 28 01:21:30 PM PDT 24 May 28 01:21:34 PM PDT 24 164972928 ps
T932 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.732442827 May 28 01:21:31 PM PDT 24 May 28 01:21:35 PM PDT 24 20279165 ps
T112 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1213197690 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 135181907 ps
T933 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3779364283 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 124099994 ps
T934 /workspace/coverage/cover_reg_top/23.clkmgr_intr_test.2125760539 May 28 01:21:33 PM PDT 24 May 28 01:21:36 PM PDT 24 18311167 ps
T935 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.3495011964 May 28 01:20:58 PM PDT 24 May 28 01:21:01 PM PDT 24 34023560 ps
T936 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.869743582 May 28 01:21:30 PM PDT 24 May 28 01:21:34 PM PDT 24 116297409 ps
T937 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.3823658637 May 28 01:20:58 PM PDT 24 May 28 01:21:01 PM PDT 24 73653522 ps
T938 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.2631959847 May 28 01:21:30 PM PDT 24 May 28 01:21:34 PM PDT 24 15040863 ps
T114 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.650810633 May 28 01:20:40 PM PDT 24 May 28 01:20:45 PM PDT 24 432972809 ps
T939 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.1280222589 May 28 01:21:15 PM PDT 24 May 28 01:21:19 PM PDT 24 110866195 ps
T940 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.2519916369 May 28 01:20:24 PM PDT 24 May 28 01:20:30 PM PDT 24 236989539 ps
T941 /workspace/coverage/cover_reg_top/44.clkmgr_intr_test.1131855610 May 28 01:21:33 PM PDT 24 May 28 01:21:36 PM PDT 24 57325968 ps
T942 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.3022077431 May 28 01:21:28 PM PDT 24 May 28 01:21:33 PM PDT 24 58975991 ps
T943 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.154911996 May 28 01:20:59 PM PDT 24 May 28 01:21:03 PM PDT 24 121785546 ps
T944 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.2500365826 May 28 01:21:17 PM PDT 24 May 28 01:21:23 PM PDT 24 63602253 ps
T945 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.616920130 May 28 01:21:28 PM PDT 24 May 28 01:21:31 PM PDT 24 70216346 ps
T946 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.3558467244 May 28 01:21:26 PM PDT 24 May 28 01:21:29 PM PDT 24 48807856 ps
T120 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.2947046123 May 28 01:21:14 PM PDT 24 May 28 01:21:18 PM PDT 24 170251562 ps
T947 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.2022453694 May 28 01:21:29 PM PDT 24 May 28 01:21:35 PM PDT 24 222865787 ps
T948 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.2755002247 May 28 01:20:59 PM PDT 24 May 28 01:21:01 PM PDT 24 15592104 ps
T949 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.1618273013 May 28 01:21:31 PM PDT 24 May 28 01:21:35 PM PDT 24 13477968 ps
T950 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.454758471 May 28 01:21:33 PM PDT 24 May 28 01:21:36 PM PDT 24 12470312 ps
T951 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.3698138569 May 28 01:20:59 PM PDT 24 May 28 01:21:02 PM PDT 24 91233718 ps
T952 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1828494613 May 28 01:21:28 PM PDT 24 May 28 01:21:32 PM PDT 24 63234673 ps
T953 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.3926889073 May 28 01:20:57 PM PDT 24 May 28 01:21:01 PM PDT 24 224408939 ps
T954 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1642659017 May 28 01:21:33 PM PDT 24 May 28 01:21:37 PM PDT 24 16358698 ps
T955 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.1488496634 May 28 01:21:34 PM PDT 24 May 28 01:21:37 PM PDT 24 37989484 ps
T956 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.3368409475 May 28 01:21:15 PM PDT 24 May 28 01:21:18 PM PDT 24 16137587 ps
T957 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.2160893247 May 28 01:20:40 PM PDT 24 May 28 01:20:43 PM PDT 24 125667285 ps
T958 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.2142147811 May 28 01:21:15 PM PDT 24 May 28 01:21:19 PM PDT 24 17823770 ps
T959 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.2564995393 May 28 01:20:40 PM PDT 24 May 28 01:20:51 PM PDT 24 1360520811 ps
T960 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.647915302 May 28 01:21:17 PM PDT 24 May 28 01:21:23 PM PDT 24 54149744 ps
T961 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.4081972432 May 28 01:21:17 PM PDT 24 May 28 01:21:22 PM PDT 24 15506520 ps
T962 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.3858508628 May 28 01:20:42 PM PDT 24 May 28 01:20:46 PM PDT 24 145635315 ps
T121 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3534027552 May 28 01:20:57 PM PDT 24 May 28 01:21:01 PM PDT 24 127667607 ps
T963 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.2492521289 May 28 01:20:36 PM PDT 24 May 28 01:20:38 PM PDT 24 20572479 ps
T101 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1686560143 May 28 01:21:15 PM PDT 24 May 28 01:21:19 PM PDT 24 94003690 ps
T964 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.2420012904 May 28 01:21:29 PM PDT 24 May 28 01:21:32 PM PDT 24 17395663 ps
T965 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.3308531432 May 28 01:21:14 PM PDT 24 May 28 01:21:17 PM PDT 24 101338477 ps
T966 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.490563739 May 28 01:20:38 PM PDT 24 May 28 01:20:42 PM PDT 24 120984835 ps
T967 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.1036029764 May 28 01:20:36 PM PDT 24 May 28 01:20:39 PM PDT 24 127935483 ps
T968 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.1427416359 May 28 01:21:25 PM PDT 24 May 28 01:21:27 PM PDT 24 84405599 ps
T969 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.2704244018 May 28 01:21:33 PM PDT 24 May 28 01:21:38 PM PDT 24 61044850 ps
T970 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.1631542599 May 28 01:21:14 PM PDT 24 May 28 01:21:18 PM PDT 24 131742915 ps
T971 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2841894315 May 28 01:20:57 PM PDT 24 May 28 01:21:01 PM PDT 24 213624997 ps
T972 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.702987975 May 28 01:21:17 PM PDT 24 May 28 01:21:24 PM PDT 24 119486236 ps
T118 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.3371189641 May 28 01:20:57 PM PDT 24 May 28 01:21:02 PM PDT 24 365173798 ps
T110 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.3976730010 May 28 01:21:28 PM PDT 24 May 28 01:21:32 PM PDT 24 148803186 ps
T973 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.3049333418 May 28 01:20:57 PM PDT 24 May 28 01:21:00 PM PDT 24 10983175 ps
T974 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3204542857 May 28 01:21:17 PM PDT 24 May 28 01:21:25 PM PDT 24 609855083 ps
T975 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.1885483499 May 28 01:21:15 PM PDT 24 May 28 01:21:19 PM PDT 24 89916726 ps
T976 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.700199489 May 28 01:20:36 PM PDT 24 May 28 01:20:39 PM PDT 24 317125540 ps
T977 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3552034114 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 139683487 ps
T978 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.1297085834 May 28 01:21:26 PM PDT 24 May 28 01:21:28 PM PDT 24 11960265 ps
T979 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.1933069836 May 28 01:21:15 PM PDT 24 May 28 01:21:20 PM PDT 24 25452393 ps
T980 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.3957233530 May 28 01:20:41 PM PDT 24 May 28 01:20:44 PM PDT 24 184977988 ps
T981 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.1364630264 May 28 01:21:32 PM PDT 24 May 28 01:21:36 PM PDT 24 34017899 ps
T982 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3862517643 May 28 01:20:56 PM PDT 24 May 28 01:21:00 PM PDT 24 104802601 ps
T983 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.65091419 May 28 01:21:17 PM PDT 24 May 28 01:21:23 PM PDT 24 59456358 ps
T984 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.3619196460 May 28 01:21:33 PM PDT 24 May 28 01:21:37 PM PDT 24 11087258 ps
T985 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3385983230 May 28 01:21:26 PM PDT 24 May 28 01:21:29 PM PDT 24 43272755 ps
T986 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.2137439456 May 28 01:21:27 PM PDT 24 May 28 01:21:30 PM PDT 24 78500583 ps
T987 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3285433700 May 28 01:21:31 PM PDT 24 May 28 01:21:35 PM PDT 24 54464395 ps
T988 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.4007914268 May 28 01:21:15 PM PDT 24 May 28 01:21:18 PM PDT 24 13200437 ps
T989 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.645883806 May 28 01:21:16 PM PDT 24 May 28 01:21:22 PM PDT 24 68490354 ps
T990 /workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.724791987 May 28 01:21:00 PM PDT 24 May 28 01:21:04 PM PDT 24 113473949 ps
T991 /workspace/coverage/cover_reg_top/3.clkmgr_intr_test.628410154 May 28 01:20:41 PM PDT 24 May 28 01:20:43 PM PDT 24 12791257 ps
T992 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2067993439 May 28 01:21:00 PM PDT 24 May 28 01:21:06 PM PDT 24 225134879 ps
T993 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.2693530886 May 28 01:21:30 PM PDT 24 May 28 01:21:34 PM PDT 24 15632167 ps
T994 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.3525872525 May 28 01:21:00 PM PDT 24 May 28 01:21:03 PM PDT 24 19793502 ps
T995 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.2660917433 May 28 01:20:37 PM PDT 24 May 28 01:20:41 PM PDT 24 178164378 ps
T996 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3190875395 May 28 01:20:56 PM PDT 24 May 28 01:20:59 PM PDT 24 54403963 ps
T997 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1964026569 May 28 01:21:26 PM PDT 24 May 28 01:21:30 PM PDT 24 66717859 ps
T998 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.995675598 May 28 01:21:18 PM PDT 24 May 28 01:21:23 PM PDT 24 10719564 ps
T999 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.1922298930 May 28 01:21:18 PM PDT 24 May 28 01:21:25 PM PDT 24 149466274 ps
T1000 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.1651870137 May 28 01:21:18 PM PDT 24 May 28 01:21:24 PM PDT 24 204326790 ps
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